diff --git b/Documentation/devicetree/bindings/power/pwrseq/pwrseq-generic.txt b/Documentation/devicetree/bindings/power/pwrseq/pwrseq-generic.txt
new file mode 100644
index 0000000..ebf0d47
--- /dev/null
+++ b/Documentation/devicetree/bindings/power/pwrseq/pwrseq-generic.txt
@@ -0,0 +1,48 @@
+The generic power sequence library
+
+Some hard-wired devices (eg USB/MMC) need to do power sequence before
+the device can be enumerated on the bus, the typical power sequence
+like: enable USB PHY clock, toggle reset pin, etc. But current
+Linux device driver lacks of such code to do it, it may cause some
+hard-wired devices works abnormal or can't be recognized by
+controller at all. The power sequence will be done before this device
+can be found at the bus.
+
+The power sequence properties is under the device node.
+
+Optional properties:
+- clocks: the input clocks for device.
+- reset-gpios: Should specify the GPIO for reset.
+- reset-duration-us: the duration in microsecond for assert reset signal.
+
+Below is the example of USB power sequence properties on USB device
+nodes which have two level USB hubs.
+
+&usbotg1 {
+ vbus-supply = <®_usb_otg1_vbus>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_otg1_id>;
+ status = "okay";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ genesys: hub@1 {
+ compatible = "usb5e3,608";
+ reg = <1>;
+
+ clocks = <&clks IMX6SX_CLK_CKO>;
+ reset-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; /* hub reset pin */
+ reset-duration-us = <10>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ asix: ethernet@1 {
+ compatible = "usbb95,1708";
+ reg = <1>;
+
+ clocks = <&clks IMX6SX_CLK_IPG>;
+ reset-gpios = <&gpio4 6 GPIO_ACTIVE_LOW>; /* ethernet_rst */
+ reset-duration-us = <15>;
+ };
+ };
+};
diff --git a/Documentation/devicetree/bindings/usb/usb-device.txt b/Documentation/devicetree/bindings/usb/usb-device.txt
index 036be17..cb85f82 100644
--- a/Documentation/devicetree/bindings/usb/usb-device.txt
+++ b/Documentation/devicetree/bindings/usb/usb-device.txt
@@ -65,6 +65,9 @@ Required properties for host-controller nodes with device nodes:
- #address-cells: shall be 1
- #size-cells: shall be 0
+Optional properties:
+power sequence properties, see
+Documentation/devicetree/bindings/power/pwrseq/pwrseq-generic.txt for detail
Example:
@@ -72,9 +75,13 @@ Example:
#address-cells = <1>;
#size-cells = <0>;
- hub@1 { /* hub connected to port 1 */
+ genesys: hub@1 { /* hub connected to port 1 */
compatible = "usb5e3,608";
reg = <1>;
+
+ clocks = <&clks IMX6SX_CLK_CKO>;
+ reset-gpios = <&gpio4 5 GPIO_ACTIVE_LOW>; /* hub reset pin */
+ reset-duration-us = <10>;
};
device@2 { /* device connected to port 2 */
diff --git b/Documentation/power/power-sequence/design.rst b/Documentation/power/power-sequence/design.rst
new file mode 100644
index 0000000..554608e
--- /dev/null
+++ b/Documentation/power/power-sequence/design.rst
@@ -0,0 +1,54 @@
+====================================
+Power Sequence Library
+====================================
+
+:Date: Feb, 2017
+:Author: Peter Chen <peter.chen@nxp.com>
+
+
+Introduction
+============
+
+We have an well-known problem that the device needs to do a power
+sequence before it can be recognized by related host, the typical
+examples are hard-wired mmc devices and usb devices. The host controller
+can't know what kinds of this device is in its bus if the power
+sequence has not done, since the related devices driver's probe calling
+is determined by runtime according to eunumeration results. Besides,
+the devices may have custom power sequence, so the power sequence library
+which is independent with the devices is needed.
+
+Design
+============
+
+The power sequence library includes the core file and customer power
+sequence library. The core file exports interfaces are called by
+host controller driver for power sequence and customer power sequence
+library files to register its power sequence instance to global
+power sequence list. The custom power sequence library creates power
+sequence instance and implement custom power sequence.
+
+Since the power sequence describes hardware design, the description is
+located at board description file, eg, device tree dts file. And
+a specific power sequence belongs to device, so its description
+is under the device node, please refer to:
+Documentation/devicetree/bindings/power/pwrseq/pwrseq-generic.txt
+
+Custom power sequence library allocates one power sequence instance at
+bootup periods using postcore_initcall, this static allocated instance is
+used to compare with device-tree (DT) node to see if this library can be
+used for the node or not. When the result is matched, the core API will
+try to get resourses (->get, implemented at each library) for power
+sequence, if all resources are got, it will try to allocate another
+instance for next possible request from host driver.
+
+Then, the host controller driver can carry out power sequence on for this
+DT node, the library will do corresponding operations, like open clocks,
+toggle gpio, etc. The power sequence off routine will close and free the
+resources, and is called when the parent is removed. And the power
+sequence suspend and resume routine can be called at host driver's
+suspend and resume routine if needed.
+
+The exported interfaces
+.. kernel-doc:: drivers/power/pwrseq/core.c
+ :export:
diff --git a/Documentation/pwm.txt b/Documentation/pwm.txt
index 8fbf0aa..72db8dd 100644
--- a/Documentation/pwm.txt
+++ b/Documentation/pwm.txt
@@ -85,9 +85,11 @@ will find:
The PWM channels are numbered using a per-chip index from 0 to npwm-1.
-When a PWM channel is exported a pwmX directory will be created in the
+When a PWM channel is exported a pwm-N:X directory will be created in the
pwmchipN directory it is associated with, where X is the number of the
-channel that was exported. The following properties will then be available:
+channel that was exported. It will also be exposed at /sys/class/pwm/ and
+can be identified by the pwm_channel device type.
+The following properties will then be available:
period
The total period of the PWM signal (read/write).
diff --git a/MAINTAINERS b/MAINTAINERS
index 677ef41..8905b9c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -12622,6 +12622,15 @@ F: drivers/firmware/psci/
F: include/linux/psci.h
F: include/uapi/linux/psci.h
+POWER SEQUENCE LIBRARY
+M: Peter Chen <Peter.Chen@nxp.com>
+T: git git://git.kernel.org/pub/scm/linux/kernel/git/peter.chen/usb.git
+L: linux-pm@vger.kernel.org
+S: Maintained
+F: Documentation/devicetree/bindings/power/pwrseq/
+F: drivers/power/pwrseq/
+F: include/linux/power/pwrseq.h
+
POWER SUPPLY CLASS/SUBSYSTEM and DRIVERS
M: Sebastian Reichel <sre@kernel.org>
L: linux-pm@vger.kernel.org
diff --git a/arch/arm/boot/Makefile b/arch/arm/boot/Makefile
index 0b3cd7a..87a8b8d 100644
--- a/arch/arm/boot/Makefile
+++ b/arch/arm/boot/Makefile
@@ -29,6 +29,10 @@ export ZRELADDR INITRD_PHYS PARAMS_PHYS
targets := Image zImage xipImage bootpImage uImage
+ifeq ($(CONFIG_OF_OVERLAY),y)
+DTC_FLAGS += -@
+endif
+
ifeq ($(CONFIG_XIP_KERNEL),y)
cmd_deflate_xip_data = $(CONFIG_SHELL) -c \
diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index dab2914..b64352f 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -1,4 +1,9 @@
# SPDX-License-Identifier: GPL-2.0
+
+ifeq ($(CONFIG_OF_OVERLAY),y)
+DTC_FLAGS += -@
+endif
+
dtb-$(CONFIG_ARCH_ALPINE) += \
alpine-db.dtb
dtb-$(CONFIG_MACH_ARTPEC6) += \
@@ -730,6 +735,11 @@ dtb-$(CONFIG_SOC_AM33XX) += \
am335x-base0033.dtb \
am335x-bone.dtb \
am335x-boneblack.dtb \
+ am335x-bonegreen-wireless-uboot-univ.dtb \
+ am335x-boneblack-uboot-univ.dtb \
+ am335x-bone-uboot-univ.dtb \
+ am335x-boneblack-uboot.dtb \
+ am335x-abbbi.dtb \
am335x-boneblack-wireless.dtb \
am335x-boneblue.dtb \
am335x-bonegreen.dtb \
@@ -759,6 +769,7 @@ dtb-$(CONFIG_ARCH_OMAP4) += \
omap4-duovero-parlor.dtb \
omap4-kc1.dtb \
omap4-panda.dtb \
+ omap4-panda-es-b3.dtb \
omap4-panda-a4.dtb \
omap4-panda-es.dtb \
omap4-sdp.dtb \
diff --git b/arch/arm/boot/dts/am335x-abbbi.dts b/arch/arm/boot/dts/am335x-abbbi.dts
new file mode 100644
index 0000000..7e924ce
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-abbbi.dts
@@ -0,0 +1,162 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ * Copyright 2015 Konsulko Group
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+
+/ {
+ model = "Arrow BeagleBone Black Industrial";
+ compatible = "arrow,am335x-abbbi", "ti,am335x-bone", "ti,am33xx";
+};
+
+&ldo3_reg {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+};
+
+&mmc1 {
+ vmmc-supply = <&vmmcsd_fixed>;
+};
+
+&mmc2 {
+ vmmc-supply = <&vmmcsd_fixed>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&emmc_pins>;
+ bus-width = <8>;
+ status = "okay";
+};
+
+&am33xx_pinmux {
+ adi_hdmi_bbbi_pins: adi_hdmi_bbbi_pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA3, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA4, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA5, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA6, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA7, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA10, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA11, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA12, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA13, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_HSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ >;
+ };
+
+ mcasp0_pins: mcasp0_pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
+ AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKR, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* mcasp0_ahclkr.mcasp0_axr2*/
+ AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a11.GPIO1_27 */
+ >;
+ };
+};
+
+&lcdc {
+ status = "okay";
+
+ /* If you want to get 24 bit RGB and 16 BGR mode instead of
+ * current 16 bit RGB and 24 BGR modes, set the propety
+ * below to "crossed" and uncomment the video-ports -property
+ * in tda19988 node.
+ */
+ blue-and-red-wiring = "straight";
+
+ port {
+ lcdc_0: endpoint@0 {
+ remote-endpoint = <&hdmi_0>;
+ };
+ };
+};
+
+&i2c0 {
+ adv7511: adv7511@39 {
+ compatible = "adi,adv7511";
+ reg = <0x39>;
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&adi_hdmi_bbbi_pins>;
+
+ /* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
+ /* video-ports = <0x234501>; */
+
+ #sound-dai-cells = <0>;
+
+ ports {
+ port@0 {
+ hdmi_0: endpoint@0 {
+ remote-endpoint = <&lcdc_0>;
+ };
+ };
+ };
+ };
+};
+
+&rtc {
+ system-power-controller;
+};
+
+&mcasp0 {
+ #sound-dai-cells = <0>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mcasp0_pins>;
+ status = "okay";
+ op-mode = <0>; /* MCASP_IIS_MODE */
+ tdm-slots = <2>;
+ serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
+ 0 0 1 0
+ >;
+ tx-num-evt = <1>;
+ rx-num-evt = <1>;
+};
+
+/ {
+ clk_mcasp0_fixed: clk_mcasp0_fixed {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <24576000>;
+ };
+
+ clk_mcasp0: clk_mcasp0 {
+ #clock-cells = <0>;
+ compatible = "gpio-gate-clock";
+ clocks = <&clk_mcasp0_fixed>;
+ enable-gpios = <&gpio1 27 0>; /* BeagleBone Black Clk enable on GPIO1_27 */
+ };
+
+ sound {
+ compatible = "simple-audio-card";
+ simple-audio-card,name = "TI BeagleBone Black";
+ simple-audio-card,format = "i2s";
+ simple-audio-card,bitclock-master = <&dailink0_master>;
+ simple-audio-card,frame-master = <&dailink0_master>;
+
+ dailink0_master: simple-audio-card,cpu {
+ sound-dai = <&mcasp0>;
+ clocks = <&clk_mcasp0>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai = <&adv7511>;
+ };
+ };
+};
diff --git b/arch/arm/boot/dts/am335x-bone-common-no-capemgr.dtsi b/arch/arm/boot/dts/am335x-bone-common-no-capemgr.dtsi
new file mode 100644
index 0000000..aa86a00
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-common-no-capemgr.dtsi
@@ -0,0 +1,376 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+/ {
+ cpus {
+ cpu@0 {
+ cpu0-supply = <&dcdc2_reg>;
+ };
+ };
+
+ memory@80000000 {
+ device_type = "memory";
+ reg = <0x80000000 0x10000000>; /* 256 MB */
+ };
+
+ chosen {
+ stdout-path = &uart0;
+ };
+
+ leds {
+ pinctrl-names = "default";
+ pinctrl-0 = <&user_leds_s0>;
+
+ compatible = "gpio-leds";
+
+ led2 {
+ label = "beaglebone:green:usr0";
+ gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "heartbeat";
+ default-state = "off";
+ };
+
+ led3 {
+ label = "beaglebone:green:usr1";
+ gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc0";
+ default-state = "off";
+ };
+
+ led4 {
+ label = "beaglebone:green:usr2";
+ gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "cpu0";
+ default-state = "off";
+ };
+
+ led5 {
+ label = "beaglebone:green:usr3";
+ gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
+ linux,default-trigger = "mmc1";
+ default-state = "off";
+ };
+ };
+
+ vmmcsd_fixed: fixedregulator0 {
+ compatible = "regulator-fixed";
+ regulator-name = "vmmcsd_fixed";
+ regulator-min-microvolt = <3300000>;
+ regulator-max-microvolt = <3300000>;
+ };
+};
+
+&am33xx_pinmux {
+ user_leds_s0: user_leds_s0 {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a6.gpio1_22 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a7.gpio1_23 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT_PULLUP, MUX_MODE7) /* gpmc_a8.gpio1_24 */
+ >;
+ };
+
+ i2c0_pins: pinmux_i2c0_pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0) /* i2c0_sda.i2c0_sda */
+ AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0) /* i2c0_scl.i2c0_scl */
+ >;
+ };
+
+ i2c2_pins: pinmux_i2c2_pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_ctsn.i2c2_sda */
+ AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* uart1_rtsn.i2c2_scl */
+ >;
+ };
+
+ uart0_pins: pinmux_uart0_pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ >;
+ };
+
+ cpsw_default: cpsw_default {
+ pinctrl-single,pins = <
+ /* Slave 1 */
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE0)
+ >;
+ };
+
+ cpsw_sleep: cpsw_sleep {
+ pinctrl-single,pins = <
+ /* Slave 1 reset value */
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ >;
+ };
+
+ davinci_mdio_default: davinci_mdio_default {
+ pinctrl-single,pins = <
+ /* MDIO */
+ AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
+ >;
+ };
+
+ davinci_mdio_sleep: davinci_mdio_sleep {
+ pinctrl-single,pins = <
+ /* MDIO reset value */
+ AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ AM33XX_PADCONF(AM335X_PIN_MDC, PIN_INPUT_PULLDOWN, MUX_MODE7)
+ >;
+ };
+
+ mmc1_pins: pinmux_mmc1_pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7) /* spio0_cs1.gpio0_6 */
+ AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
+ AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
+ >;
+ };
+
+ emmc_pins: pinmux_emmc_pins {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
+ AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
+ >;
+ };
+};
+
+&uart0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&uart0_pins>;
+
+ status = "okay";
+};
+
+&usb {
+ status = "okay";
+};
+
+&usb_ctrl_mod {
+ status = "okay";
+};
+
+&usb0_phy {
+ status = "okay";
+};
+
+&usb1_phy {
+ status = "okay";
+};
+
+&usb0 {
+ status = "okay";
+ dr_mode = "peripheral";
+ interrupts-extended = <&intc 18 &tps 0>;
+ interrupt-names = "mc", "vbus";
+};
+
+&usb1 {
+ status = "okay";
+ dr_mode = "host";
+};
+
+&cppi41dma {
+ status = "okay";
+};
+
+&i2c0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c0_pins>;
+
+ status = "okay";
+ clock-frequency = <400000>;
+
+ tps: tps@24 {
+ reg = <0x24>;
+ };
+
+ baseboard_eeprom: baseboard_eeprom@50 {
+ compatible = "atmel,24c256";
+ reg = <0x50>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+ baseboard_data: baseboard_data@0 {
+ reg = <0 0x100>;
+ };
+ };
+};
+
+&i2c2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&i2c2_pins>;
+
+ status = "okay";
+ clock-frequency = <100000>;
+};
+
+
+/include/ "tps65217.dtsi"
+
+&tps {
+ /*
+ * Configure pmic to enter OFF-state instead of SLEEP-state ("RTC-only
+ * mode") at poweroff. Most BeagleBone versions do not support RTC-only
+ * mode and risk hardware damage if this mode is entered.
+ *
+ * For details, see linux-omap mailing list May 2015 thread
+ * [PATCH] ARM: dts: am335x-bone* enable pmic-shutdown-controller
+ * In particular, messages:
+ * http://www.spinics.net/lists/linux-omap/msg118585.html
+ * http://www.spinics.net/lists/linux-omap/msg118615.html
+ *
+ * You can override this later with
+ * &tps { /delete-property/ ti,pmic-shutdown-controller; }
+ * if you want to use RTC-only mode and made sure you are not affected
+ * by the hardware problems. (Tip: double-check by performing a current
+ * measurement after shutdown: it should be less than 1 mA.)
+ */
+
+ interrupts = <7>; /* NMI */
+ interrupt-parent = <&intc>;
+
+ ti,pmic-shutdown-controller;
+
+ charger {
+ status = "okay";
+ };
+
+ pwrbutton {
+ status = "okay";
+ };
+
+ regulators {
+ dcdc1_reg: regulator@0 {
+ regulator-name = "vdds_dpr";
+ regulator-always-on;
+ };
+
+ dcdc2_reg: regulator@1 {
+ /* VDD_MPU voltage limits 0.95V - 1.26V with +/-4% tolerance */
+ regulator-name = "vdd_mpu";
+ regulator-min-microvolt = <925000>;
+ regulator-max-microvolt = <1351500>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ dcdc3_reg: regulator@2 {
+ /* VDD_CORE voltage limits 0.95V - 1.1V with +/-4% tolerance */
+ regulator-name = "vdd_core";
+ regulator-min-microvolt = <925000>;
+ regulator-max-microvolt = <1150000>;
+ regulator-boot-on;
+ regulator-always-on;
+ };
+
+ ldo1_reg: regulator@3 {
+ regulator-name = "vio,vrtc,vdds";
+ regulator-always-on;
+ };
+
+ ldo2_reg: regulator@4 {
+ regulator-name = "vdd_3v3aux";
+ regulator-always-on;
+ };
+
+ ldo3_reg: regulator@5 {
+ regulator-name = "vdd_1v8";
+ regulator-always-on;
+ };
+
+ ldo4_reg: regulator@6 {
+ regulator-name = "vdd_3v3a";
+ regulator-always-on;
+ };
+ };
+};
+
+&cpsw_emac0 {
+ phy-handle = <ðphy0>;
+ phy-mode = "mii";
+};
+
+&mac {
+ slaves = <1>;
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&cpsw_default>;
+ pinctrl-1 = <&cpsw_sleep>;
+ status = "okay";
+};
+
+&davinci_mdio {
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&davinci_mdio_default>;
+ pinctrl-1 = <&davinci_mdio_sleep>;
+ status = "okay";
+
+ ethphy0: ethernet-phy@0 {
+ reg = <0>;
+ };
+};
+
+&mmc1 {
+ status = "okay";
+ bus-width = <0x4>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&mmc1_pins>;
+ cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
+};
+
+&aes {
+ status = "okay";
+};
+
+&sham {
+ status = "okay";
+};
+
+&rtc {
+ clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
+ clock-names = "ext-clk", "int-clk";
+ system-power-controller;
+};
diff --git b/arch/arm/boot/dts/am335x-bone-common-univ.dtsi b/arch/arm/boot/dts/am335x-bone-common-univ.dtsi
new file mode 100644
index 0000000..0376839
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-common-univ.dtsi
@@ -0,0 +1,2923 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&am33xx_pinmux {
+ /************************/
+ /* P8 Header */
+ /************************/
+
+ /* P8_01 GND */
+
+ /* P8_02 GND */
+
+
+ /* P8_03 (ZCZ ball R9) emmc */
+ P8_03_default_pin: pinmux_P8_03_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03_gpio_pin: pinmux_P8_03_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03_gpio_pu_pin: pinmux_P8_03_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03_gpio_pd_pin: pinmux_P8_03_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03_gpio_input_pin: pinmux_P8_03_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+
+ /* P8_04 (ZCZ ball T9) emmc */
+ P8_04_default_pin: pinmux_P8_04_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04_gpio_pin: pinmux_P8_04_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04_gpio_pu_pin: pinmux_P8_04_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04_gpio_pd_pin: pinmux_P8_04_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04_gpio_input_pin: pinmux_P8_04_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+
+ /* P8_05 (ZCZ ball R8) emmc */
+ P8_05_default_pin: pinmux_P8_05_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05_gpio_pin: pinmux_P8_05_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05_gpio_pu_pin: pinmux_P8_05_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05_gpio_pd_pin: pinmux_P8_05_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05_gpio_input_pin: pinmux_P8_05_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+
+ /* P8_06 (ZCZ ball T8) emmc */
+ P8_06_default_pin: pinmux_P8_06_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06_gpio_pin: pinmux_P8_06_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06_gpio_pu_pin: pinmux_P8_06_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06_gpio_pd_pin: pinmux_P8_06_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06_gpio_input_pin: pinmux_P8_06_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+
+ /* P8_07 (ZCZ ball R7) gpio2_2 */
+ P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_gpio_pin: pinmux_P8_07_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_gpio_pd_pin: pinmux_P8_07_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_gpio_input_pin: pinmux_P8_07_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_timer_pin: pinmux_P8_07_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_advn_ale.timer4 */
+
+ /* P8_08 (ZCZ ball T7) gpio2_3 */
+ P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_gpio_pin: pinmux_P8_08_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_gpio_input_pin: pinmux_P8_08_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_timer_pin: pinmux_P8_08_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_oen_ren.timer7 */
+
+ /* P8_09 (ZCZ ball T6) gpio2_5 */
+ P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_gpio_pin: pinmux_P8_09_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_gpio_pd_pin: pinmux_P8_09_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_gpio_input_pin: pinmux_P8_09_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_timer_pin: pinmux_P8_09_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_be0n_cle.timer5 */
+
+ /* P8_10 (ZCZ ball U6) gpio2_4 */
+ P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_gpio_pin: pinmux_P8_10_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_gpio_pd_pin: pinmux_P8_10_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_gpio_input_pin: pinmux_P8_10_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_timer_pin: pinmux_P8_10_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_wen.timer6 */
+
+ /* P8_11 (ZCZ ball R12) gpio1_13 */
+ P8_11_default_pin: pinmux_P8_11_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_gpio_pin: pinmux_P8_11_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_gpio_pu_pin: pinmux_P8_11_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_gpio_pd_pin: pinmux_P8_11_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_gpio_input_pin: pinmux_P8_11_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_qep_pin: pinmux_P8_11_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad13.eqep2b_in */
+ P8_11_pruout_pin: pinmux_P8_11_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad13.pru0_out15 */
+
+ /* P8_12 (ZCZ ball T12) gpio1_12 */
+ P8_12_default_pin: pinmux_P8_12_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_gpio_pin: pinmux_P8_12_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_gpio_pu_pin: pinmux_P8_12_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_gpio_pd_pin: pinmux_P8_12_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_gpio_input_pin: pinmux_P8_12_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_qep_pin: pinmux_P8_12_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad12.eqep2a_in */
+ P8_12_pruout_pin: pinmux_P8_12_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad12.pru0_out14 */
+
+ /* P8_13 (ZCZ ball T10) gpio0_23 */
+ P8_13_default_pin: pinmux_P8_13_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_gpio_pin: pinmux_P8_13_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_gpio_pu_pin: pinmux_P8_13_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_gpio_pd_pin: pinmux_P8_13_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_gpio_input_pin: pinmux_P8_13_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_pwm_pin: pinmux_P8_13_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad9.ehrpwm2b */
+
+ /* P8_14 (ZCZ ball T11) gpio0_26 */
+ P8_14_default_pin: pinmux_P8_14_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P8_14_gpio_pin: pinmux_P8_14_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P8_14_gpio_pu_pin: pinmux_P8_14_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P8_14_gpio_pd_pin: pinmux_P8_14_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P8_14_gpio_input_pin: pinmux_P8_14_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P8_14_pwm_pin: pinmux_P8_14_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad10.ehrpwm2_tripzone_input */
+
+ /* P8_15 (ZCZ ball U13) gpio1_15 */
+ P8_15_default_pin: pinmux_P8_15_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_gpio_pin: pinmux_P8_15_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_gpio_input_pin: pinmux_P8_15_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_qep_pin: pinmux_P8_15_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad15.eqep2_strobe */
+ P8_15_pru_ecap_pin: pinmux_P8_15_pru_ecap_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_ad15.pr1_ecap0_ecap_capin_apwm_o */
+ P8_15_pruin_pin: pinmux_P8_15_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad15.pru0_in15 */
+
+ /* P8_16 (ZCZ ball V13) gpio1_14 */
+ P8_16_default_pin: pinmux_P8_16_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_gpio_pin: pinmux_P8_16_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_gpio_pu_pin: pinmux_P8_16_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_gpio_pd_pin: pinmux_P8_16_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_gpio_input_pin: pinmux_P8_16_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_qep_pin: pinmux_P8_16_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad14.eqep2_index */
+ P8_16_pruin_pin: pinmux_P8_16_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad14.pru0_in14 */
+
+ /* P8_17 (ZCZ ball U12) gpio0_27 */
+ P8_17_default_pin: pinmux_P8_17_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P8_17_gpio_pin: pinmux_P8_17_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P8_17_gpio_pu_pin: pinmux_P8_17_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P8_17_gpio_pd_pin: pinmux_P8_17_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P8_17_gpio_input_pin: pinmux_P8_17_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P8_17_pwm_pin: pinmux_P8_17_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad11.ehrpwm0_synco */
+
+ /* P8_18 (ZCZ ball V12) gpio2_1 */
+ P8_18_default_pin: pinmux_P8_18_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18_gpio_pin: pinmux_P8_18_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18_gpio_pu_pin: pinmux_P8_18_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18_gpio_pd_pin: pinmux_P8_18_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18_gpio_input_pin: pinmux_P8_18_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+
+ /* P8_19 (ZCZ ball U10) gpio0_22 */
+ P8_19_default_pin: pinmux_P8_19_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_gpio_pin: pinmux_P8_19_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_gpio_pu_pin: pinmux_P8_19_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_gpio_pd_pin: pinmux_P8_19_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_gpio_input_pin: pinmux_P8_19_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_pwm_pin: pinmux_P8_19_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad8.ehrpwm2a */
+
+ /* P8_20 (ZCZ ball V9) emmc */
+ P8_20_default_pin: pinmux_P8_20_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_gpio_pin: pinmux_P8_20_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_gpio_pu_pin: pinmux_P8_20_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_gpio_pd_pin: pinmux_P8_20_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_gpio_input_pin: pinmux_P8_20_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_pruout_pin: pinmux_P8_20_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_csn2.pru1_out13 */
+ P8_20_pruin_pin: pinmux_P8_20_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_csn2.pru1_in13 */
+
+ /* P8_21 (ZCZ ball U9) emmc */
+ P8_21_default_pin: pinmux_P8_21_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_gpio_pin: pinmux_P8_21_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_gpio_pu_pin: pinmux_P8_21_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_gpio_pd_pin: pinmux_P8_21_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_gpio_input_pin: pinmux_P8_21_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_pruout_pin: pinmux_P8_21_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_csn1.pru1_out12 */
+ P8_21_pruin_pin: pinmux_P8_21_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_csn1.pru1_in12 */
+
+ /* P8_22 (ZCZ ball V8) emmc */
+ P8_22_default_pin: pinmux_P8_22_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22_gpio_pin: pinmux_P8_22_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22_gpio_pu_pin: pinmux_P8_22_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22_gpio_pd_pin: pinmux_P8_22_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22_gpio_input_pin: pinmux_P8_22_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+
+ /* P8_23 (ZCZ ball U8) emmc */
+ P8_23_default_pin: pinmux_P8_23_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23_gpio_pin: pinmux_P8_23_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23_gpio_pu_pin: pinmux_P8_23_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23_gpio_pd_pin: pinmux_P8_23_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23_gpio_input_pin: pinmux_P8_23_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+
+ /* P8_24 (ZCZ ball V7) emmc */
+ P8_24_default_pin: pinmux_P8_24_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24_gpio_pin: pinmux_P8_24_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24_gpio_pu_pin: pinmux_P8_24_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24_gpio_pd_pin: pinmux_P8_24_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24_gpio_input_pin: pinmux_P8_24_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+
+ /* P8_25 (ZCZ ball U7) emmc */
+ P8_25_default_pin: pinmux_P8_25_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25_gpio_pin: pinmux_P8_25_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25_gpio_pu_pin: pinmux_P8_25_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25_gpio_pd_pin: pinmux_P8_25_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25_gpio_input_pin: pinmux_P8_25_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+
+ /* P8_26 (ZCZ ball V6) gpio1_29 */
+ P8_26_default_pin: pinmux_P8_26_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x087c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
+ P8_26_gpio_pin: pinmux_P8_26_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x087c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
+ P8_26_gpio_pu_pin: pinmux_P8_26_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x087c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
+ P8_26_gpio_pd_pin: pinmux_P8_26_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x087c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
+ P8_26_gpio_input_pin: pinmux_P8_26_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x087c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn0.gpio1_29 */
+
+ /* P8_27 (ZCZ ball U5) hdmi */
+ P8_27_default_pin: pinmux_P8_27_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_gpio_pin: pinmux_P8_27_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_gpio_pu_pin: pinmux_P8_27_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_gpio_pd_pin: pinmux_P8_27_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_gpio_input_pin: pinmux_P8_27_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_pruout_pin: pinmux_P8_27_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_vsync.pru1_out8 */
+ P8_27_pruin_pin: pinmux_P8_27_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_vsync.pru1_in8 */
+
+ /* P8_28 (ZCZ ball V5) hdmi */
+ P8_28_default_pin: pinmux_P8_28_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_gpio_pin: pinmux_P8_28_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_gpio_pu_pin: pinmux_P8_28_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_gpio_pd_pin: pinmux_P8_28_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_gpio_input_pin: pinmux_P8_28_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_pruout_pin: pinmux_P8_28_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_pclk.pru1_out10 */
+ P8_28_pruin_pin: pinmux_P8_28_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_pclk.pru1_in10 */
+
+ /* P8_29 (ZCZ ball R5) hdmi */
+ P8_29_default_pin: pinmux_P8_29_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_gpio_pin: pinmux_P8_29_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_gpio_pu_pin: pinmux_P8_29_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_gpio_pd_pin: pinmux_P8_29_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_gpio_input_pin: pinmux_P8_29_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_pruout_pin: pinmux_P8_29_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_hsync.pru1_out9 */
+ P8_29_pruin_pin: pinmux_P8_29_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_hsync.pru1_in9 */
+
+ /* P8_30 (ZCZ ball R6) hdmi */
+ P8_30_default_pin: pinmux_P8_30_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_gpio_pin: pinmux_P8_30_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_gpio_pu_pin: pinmux_P8_30_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_gpio_pd_pin: pinmux_P8_30_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_gpio_input_pin: pinmux_P8_30_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_pruout_pin: pinmux_P8_30_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_ac_bias_en.pru1_out11 */
+ P8_30_pruin_pin: pinmux_P8_30_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE6) >; }; /* lcd_ac_bias_en.pru1_in11 */
+
+ /* P8_31 (ZCZ ball V4) hdmi */
+ P8_31_default_pin: pinmux_P8_31_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_gpio_pin: pinmux_P8_31_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_gpio_pu_pin: pinmux_P8_31_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_gpio_pd_pin: pinmux_P8_31_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_gpio_input_pin: pinmux_P8_31_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_qep_pin: pinmux_P8_31_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data14.eqep1_index */
+ P8_31_uart_pin: pinmux_P8_31_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data14.uart5_rxd */
+
+ /* P8_32 (ZCZ ball T5) hdmi */
+ P8_32_default_pin: pinmux_P8_32_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_gpio_pin: pinmux_P8_32_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_gpio_pu_pin: pinmux_P8_32_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_gpio_pd_pin: pinmux_P8_32_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_gpio_input_pin: pinmux_P8_32_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_qep_pin: pinmux_P8_32_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data15.eqep1_strobe */
+
+ /* P8_33 (ZCZ ball V3) hdmi */
+ P8_33_default_pin: pinmux_P8_33_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_gpio_pin: pinmux_P8_33_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_gpio_pu_pin: pinmux_P8_33_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_gpio_pd_pin: pinmux_P8_33_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_gpio_input_pin: pinmux_P8_33_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_qep_pin: pinmux_P8_33_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data13.eqep1b_in */
+
+ /* P8_34 (ZCZ ball U4) hdmi */
+ P8_34_default_pin: pinmux_P8_34_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_gpio_pin: pinmux_P8_34_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_gpio_pu_pin: pinmux_P8_34_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_gpio_pd_pin: pinmux_P8_34_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_gpio_input_pin: pinmux_P8_34_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_pwm_pin: pinmux_P8_34_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data11.ehrpwm1b */
+
+ /* P8_35 (ZCZ ball V2) hdmi */
+ P8_35_default_pin: pinmux_P8_35_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_gpio_pin: pinmux_P8_35_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_gpio_pu_pin: pinmux_P8_35_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_gpio_pd_pin: pinmux_P8_35_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_gpio_input_pin: pinmux_P8_35_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_qep_pin: pinmux_P8_35_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data12.eqep1a_in */
+
+ /* P8_36 (ZCZ ball U3) hdmi */
+ P8_36_default_pin: pinmux_P8_36_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_gpio_pin: pinmux_P8_36_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_gpio_pu_pin: pinmux_P8_36_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_gpio_pd_pin: pinmux_P8_36_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_gpio_input_pin: pinmux_P8_36_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_pwm_pin: pinmux_P8_36_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data10.ehrpwm1a */
+
+ /* P8_37 (ZCZ ball U1) hdmi */
+ P8_37_default_pin: pinmux_P8_37_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_gpio_pin: pinmux_P8_37_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_gpio_pu_pin: pinmux_P8_37_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_gpio_pd_pin: pinmux_P8_37_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_gpio_input_pin: pinmux_P8_37_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_pwm_pin: pinmux_P8_37_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data8.ehrpwm1_tripzone_input */
+ P8_37_uart_pin: pinmux_P8_37_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data8.uart5_txd */
+
+ /* P8_38 (ZCZ ball U2) hdmi */
+ P8_38_default_pin: pinmux_P8_38_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_gpio_pin: pinmux_P8_38_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_gpio_pu_pin: pinmux_P8_38_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_gpio_pd_pin: pinmux_P8_38_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_gpio_input_pin: pinmux_P8_38_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_pwm_pin: pinmux_P8_38_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data9.ehrpwm0_synco */
+ P8_38_uart_pin: pinmux_P8_38_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data9.uart5_rxd */
+
+ /* P8_39 (ZCZ ball T3) hdmi */
+ P8_39_default_pin: pinmux_P8_39_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_gpio_pin: pinmux_P8_39_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_gpio_pu_pin: pinmux_P8_39_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_gpio_pd_pin: pinmux_P8_39_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_gpio_input_pin: pinmux_P8_39_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_qep_pin: pinmux_P8_39_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data6.eqep2_index */
+ P8_39_pruout_pin: pinmux_P8_39_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data6.pru1_out6 */
+ P8_39_pruin_pin: pinmux_P8_39_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data6.pru1_in6 */
+
+ /* P8_40 (ZCZ ball T4) hdmi */
+ P8_40_default_pin: pinmux_P8_40_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_gpio_pin: pinmux_P8_40_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_gpio_pu_pin: pinmux_P8_40_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_gpio_pd_pin: pinmux_P8_40_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_gpio_input_pin: pinmux_P8_40_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_qep_pin: pinmux_P8_40_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data7.eqep2_strobe */
+ P8_40_pruout_pin: pinmux_P8_40_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data7.pru1_out7 */
+ P8_40_pruin_pin: pinmux_P8_40_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data7.pru1_in7 */
+
+ /* P8_41 (ZCZ ball T1) hdmi */
+ P8_41_default_pin: pinmux_P8_41_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_gpio_pin: pinmux_P8_41_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_gpio_pu_pin: pinmux_P8_41_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_gpio_pd_pin: pinmux_P8_41_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_gpio_input_pin: pinmux_P8_41_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_qep_pin: pinmux_P8_41_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data4.eqep2a_in */
+ P8_41_pruout_pin: pinmux_P8_41_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data4.pru1_out4 */
+ P8_41_pruin_pin: pinmux_P8_41_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data4.pru1_in4 */
+
+ /* P8_42 (ZCZ ball T2) hdmi */
+ P8_42_default_pin: pinmux_P8_42_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_gpio_pin: pinmux_P8_42_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_gpio_pu_pin: pinmux_P8_42_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_gpio_pd_pin: pinmux_P8_42_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_gpio_input_pin: pinmux_P8_42_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_qep_pin: pinmux_P8_42_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data5.eqep2b_in */
+ P8_42_pruout_pin: pinmux_P8_42_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data5.pru1_out5 */
+ P8_42_pruin_pin: pinmux_P8_42_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data5.pru1_in5 */
+
+ /* P8_43 (ZCZ ball R3) hdmi */
+ P8_43_default_pin: pinmux_P8_43_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_gpio_pin: pinmux_P8_43_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_gpio_pu_pin: pinmux_P8_43_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_gpio_pd_pin: pinmux_P8_43_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_gpio_input_pin: pinmux_P8_43_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_pwm_pin: pinmux_P8_43_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data2.ehrpwm2_tripzone_input */
+ P8_43_pruout_pin: pinmux_P8_43_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data2.pru1_out2 */
+ P8_43_pruin_pin: pinmux_P8_43_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data2.pru1_in2 */
+
+ /* P8_44 (ZCZ ball R4) hdmi */
+ P8_44_default_pin: pinmux_P8_44_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_gpio_pin: pinmux_P8_44_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_gpio_pu_pin: pinmux_P8_44_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_gpio_pd_pin: pinmux_P8_44_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_gpio_input_pin: pinmux_P8_44_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_pwm_pin: pinmux_P8_44_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data3.ehrpwm0_synco */
+ P8_44_pruout_pin: pinmux_P8_44_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data3.pru1_out3 */
+ P8_44_pruin_pin: pinmux_P8_44_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data3.pru1_in3 */
+
+ /* P8_45 (ZCZ ball R1) hdmi */
+ P8_45_default_pin: pinmux_P8_45_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_gpio_pin: pinmux_P8_45_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_gpio_pu_pin: pinmux_P8_45_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_gpio_pd_pin: pinmux_P8_45_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_gpio_input_pin: pinmux_P8_45_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_pwm_pin: pinmux_P8_45_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data0.ehrpwm2a */
+ P8_45_pruout_pin: pinmux_P8_45_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data0.pru1_out0 */
+ P8_45_pruin_pin: pinmux_P8_45_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data0.pru1_in0 */
+
+ /* P8_46 (ZCZ ball R2) hdmi */
+ P8_46_default_pin: pinmux_P8_46_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_gpio_pin: pinmux_P8_46_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_gpio_pu_pin: pinmux_P8_46_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_gpio_pd_pin: pinmux_P8_46_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_gpio_input_pin: pinmux_P8_46_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_pwm_pin: pinmux_P8_46_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data1.ehrpwm2b */
+ P8_46_pruout_pin: pinmux_P8_46_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data1.pru1_out1 */
+ P8_46_pruin_pin: pinmux_P8_46_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data1.pru1_in1 */
+
+ /************************/
+ /* P9 Header */
+ /************************/
+
+ /* P9_01 GND */
+
+ /* P9_02 GND */
+
+ /* P9_03 3V3 */
+
+ /* P9_04 3V3 */
+
+ /* P9_05 VDD_5V */
+
+ /* P9_06 VDD_5V */
+
+ /* P9_07 SYS_5V */
+
+ /* P9_08 SYS_5V */
+
+ /* P9_09 PWR_BUT */
+
+ /* P9_10 RSTn */
+
+ /* P9_11 (ZCZ ball T17) gpio0_30 */
+ P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_gpio_pin: pinmux_P9_11_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_gpio_input_pin: pinmux_P9_11_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_uart_pin: pinmux_P9_11_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wait0.uart4_rxd */
+
+ /* P9_12 (ZCZ ball U18) gpio1_28 */
+ P9_12_default_pin: pinmux_P9_12_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12_gpio_pin: pinmux_P9_12_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12_gpio_pd_pin: pinmux_P9_12_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12_gpio_input_pin: pinmux_P9_12_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+
+ /* P9_13 (ZCZ ball U17) gpio0_31 */
+ P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_gpio_pin: pinmux_P9_13_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_gpio_pd_pin: pinmux_P9_13_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_gpio_input_pin: pinmux_P9_13_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_uart_pin: pinmux_P9_13_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wpn.uart4_txd */
+
+ /* P9_14 (ZCZ ball U14) gpio1_18 */
+ P9_14_default_pin: pinmux_P9_14_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_gpio_pin: pinmux_P9_14_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_gpio_pu_pin: pinmux_P9_14_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_gpio_pd_pin: pinmux_P9_14_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_gpio_input_pin: pinmux_P9_14_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_pwm_pin: pinmux_P9_14_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a2.ehrpwm1a */
+
+ /* P9_15 (ZCZ ball R13) gpio1_16 */
+ P9_15_default_pin: pinmux_P9_15_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_gpio_pin: pinmux_P9_15_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_gpio_pu_pin: pinmux_P9_15_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_gpio_pd_pin: pinmux_P9_15_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_gpio_input_pin: pinmux_P9_15_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_pwm_pin: pinmux_P9_15_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a0.ehrpwm1_tripzone_input */
+
+ /* P9_16 (ZCZ ball T14) gpio1_19 */
+ P9_16_default_pin: pinmux_P9_16_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_gpio_pin: pinmux_P9_16_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_gpio_pu_pin: pinmux_P9_16_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_gpio_pd_pin: pinmux_P9_16_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_gpio_input_pin: pinmux_P9_16_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_pwm_pin: pinmux_P9_16_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a3.ehrpwm1b */
+
+ /* P9_17 (ZCZ ball A16) gpio0_5 */
+ P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_gpio_pd_pin: pinmux_P9_17_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_gpio_input_pin: pinmux_P9_17_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_INPUT | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_spi_cs_pin: pinmux_P9_17_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_cs0.spi0_cs0 */
+ P9_17_i2c_pin: pinmux_P9_17_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_cs0.i2c1_scl */
+ P9_17_pwm_pin: pinmux_P9_17_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_cs0.ehrpwm0_synci */
+ P9_17_pru_uart_pin: pinmux_P9_17_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_cs0.pr1_uart0_txd */
+
+ /* P9_18 (ZCZ ball B16) gpio0_4 */
+ P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_gpio_pin: pinmux_P9_18_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_gpio_pd_pin: pinmux_P9_18_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_gpio_input_pin: pinmux_P9_18_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_spi_pin: pinmux_P9_18_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d1.spi0_d1 */
+ P9_18_i2c_pin: pinmux_P9_18_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d1.i2c1_sda */
+ P9_18_pwm_pin: pinmux_P9_18_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d1.ehrpwm0_tripzone_input */
+ P9_18_pru_uart_pin: pinmux_P9_18_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d1.pr1_uart0_rxd */
+
+ /* P9_19 (ZCZ ball D17) i2c2_scl */
+ P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
+ P9_19_gpio_pin: pinmux_P9_19_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_gpio_input_pin: pinmux_P9_19_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_timer_pin: pinmux_P9_19_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart1_rtsn.timer5 */
+ P9_19_can_pin: pinmux_P9_19_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rtsn.dcan0_rx */
+ P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
+ P9_19_spi_cs_pin: pinmux_P9_19_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_rtsn.spi1_cs1 */
+ P9_19_pru_uart_pin: pinmux_P9_19_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rtsn.pr1_uart0_rts_n */
+
+ /* P9_20 (ZCZ ball D18) i2c2_sda */
+ P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
+ P9_20_gpio_pin: pinmux_P9_20_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_gpio_input_pin: pinmux_P9_20_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_INPUT | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_timer_pin: pinmux_P9_20_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart1_ctsn.timer6 */
+ P9_20_can_pin: pinmux_P9_20_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_ctsn.dcan0_tx */
+ P9_20_i2c_pin: pinmux_P9_20_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
+ P9_20_spi_cs_pin: pinmux_P9_20_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_ctsn.spi1_cs0 */
+ P9_20_pru_uart_pin: pinmux_P9_20_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_ctsn.pr1_uart0_cts_n */
+
+ /* P9_21 (ZCZ ball B17) gpio0_3 */
+ P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_gpio_pin: pinmux_P9_21_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_gpio_pd_pin: pinmux_P9_21_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_gpio_input_pin: pinmux_P9_21_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_spi_pin: pinmux_P9_21_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d0.spi0_d0 */
+ P9_21_uart_pin: pinmux_P9_21_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_d0.uart2_txd */
+ P9_21_i2c_pin: pinmux_P9_21_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d0.i2c2_scl */
+ P9_21_pwm_pin: pinmux_P9_21_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d0.ehrpwm0b */
+ P9_21_pru_uart_pin: pinmux_P9_21_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d0.pr1_uart0_rts_n */
+
+ /* P9_22 (ZCZ ball A17) gpio0_2 */
+ P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_gpio_pin: pinmux_P9_22_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_gpio_pd_pin: pinmux_P9_22_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_gpio_input_pin: pinmux_P9_22_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_INPUT | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_spi_sclk_pin: pinmux_P9_22_spi_sclk_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_sclk.spi0_sclk */
+ P9_22_uart_pin: pinmux_P9_22_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_sclk.uart2_rxd */
+ P9_22_i2c_pin: pinmux_P9_22_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_sclk.i2c2_sda */
+ P9_22_pwm_pin: pinmux_P9_22_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_sclk.ehrpwm0a */
+ P9_22_pru_uart_pin: pinmux_P9_22_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_sclk.pr1_uart0_cts_n */
+
+ /* P9_23 (ZCZ ball V14) gpio1_17 */
+ P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_gpio_pin: pinmux_P9_23_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_gpio_input_pin: pinmux_P9_23_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_pwm_pin: pinmux_P9_23_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a1.ehrpwm0_synco */
+
+ /* P9_24 (ZCZ ball D15) gpio0_15 */
+ P9_24_default_pin: pinmux_P9_24_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_gpio_pin: pinmux_P9_24_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_gpio_pd_pin: pinmux_P9_24_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_gpio_input_pin: pinmux_P9_24_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_uart_pin: pinmux_P9_24_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_txd.uart1_txd */
+ P9_24_can_pin: pinmux_P9_24_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_txd.dcan1_rx */
+ P9_24_i2c_pin: pinmux_P9_24_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_txd.i2c1_scl */
+ P9_24_pru_uart_pin: pinmux_P9_24_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_txd.pr1_uart0_txd */
+ P9_24_pruin_pin: pinmux_P9_24_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE6) >; }; /* uart1_txd.pru0_in16 */
+
+ /* P9_25 (ZCZ ball A14) audio */
+ P9_25_default_pin: pinmux_P9_25_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_gpio_pin: pinmux_P9_25_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_gpio_pu_pin: pinmux_P9_25_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_gpio_pd_pin: pinmux_P9_25_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_gpio_input_pin: pinmux_P9_25_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_qep_pin: pinmux_P9_25_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkx.eqep0_strobe */
+ P9_25_pruout_pin: pinmux_P9_25_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkx.pru0_out7 */
+ P9_25_pruin_pin: pinmux_P9_25_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkx.pru0_in7 */
+
+ /* P9_26 (ZCZ ball D16) gpio0_14 */
+ P9_26_default_pin: pinmux_P9_26_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_gpio_pin: pinmux_P9_26_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_gpio_pd_pin: pinmux_P9_26_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_gpio_input_pin: pinmux_P9_26_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_uart_pin: pinmux_P9_26_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_rxd.uart1_rxd */
+ P9_26_can_pin: pinmux_P9_26_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rxd.dcan1_tx */
+ P9_26_i2c_pin: pinmux_P9_26_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rxd.i2c1_sda */
+ P9_26_pru_uart_pin: pinmux_P9_26_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rxd.pr1_uart0_rxd */
+ P9_26_pruin_pin: pinmux_P9_26_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE6) >; }; /* uart1_rxd.pru1_in16 */
+
+ /* P9_27 (ZCZ ball C13) gpio3_19 */
+ P9_27_default_pin: pinmux_P9_27_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_gpio_pin: pinmux_P9_27_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_gpio_pu_pin: pinmux_P9_27_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_gpio_pd_pin: pinmux_P9_27_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_gpio_input_pin: pinmux_P9_27_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_qep_pin: pinmux_P9_27_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsr.eqep0b_in */
+ P9_27_pruout_pin: pinmux_P9_27_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsr.pru0_out5 */
+ P9_27_pruin_pin: pinmux_P9_27_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsr.pru0_in5 */
+
+ /* P9_28 (ZCZ ball C12) audio */
+ P9_28_default_pin: pinmux_P9_28_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_gpio_pin: pinmux_P9_28_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_gpio_input_pin: pinmux_P9_28_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_pwm_pin: pinmux_P9_28_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkr.ehrpwm0_synci */
+ P9_28_spi_cs_pin: pinmux_P9_28_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_ahclkr.spi1_cs0 */
+ P9_28_pwm2_pin: pinmux_P9_28_pwm2_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* mcasp0_ahclkr.ecap2_in_pwm2_out */
+ P9_28_pruout_pin: pinmux_P9_28_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkr.pru0_out3 */
+ P9_28_pruin_pin: pinmux_P9_28_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkr.pru0_in3 */
+
+ /* P9_29 (ZCZ ball B13) audio */
+ P9_29_default_pin: pinmux_P9_29_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_gpio_pin: pinmux_P9_29_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_gpio_pu_pin: pinmux_P9_29_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_gpio_pd_pin: pinmux_P9_29_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_gpio_input_pin: pinmux_P9_29_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_pwm_pin: pinmux_P9_29_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsx.ehrpwm0b */
+ P9_29_spi_pin: pinmux_P9_29_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_fsx.spi1_d0 */
+ P9_29_pruout_pin: pinmux_P9_29_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsx.pru0_out1 */
+ P9_29_pruin_pin: pinmux_P9_29_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsx.pru0_in1 */
+
+ /* P9_30 (ZCZ ball D12) gpio3_16 */
+ P9_30_default_pin: pinmux_P9_30_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P9_30_gpio_pin: pinmux_P9_30_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P9_30_gpio_pu_pin: pinmux_P9_30_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P9_30_gpio_pd_pin: pinmux_P9_30_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P9_30_gpio_input_pin: pinmux_P9_30_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P9_30_pwm_pin: pinmux_P9_30_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr0.ehrpwm0_tripzone_input */
+ P9_30_spi_pin: pinmux_P9_30_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_axr0.spi1_d1 */
+ P9_30_pruout_pin: pinmux_P9_30_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr0.pru0_out2 */
+ P9_30_pruin_pin: pinmux_P9_30_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr0.pru0_in2 */
+
+ /* P9_31 (ZCZ ball A13) audio */
+ P9_31_default_pin: pinmux_P9_31_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_gpio_pin: pinmux_P9_31_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_gpio_pu_pin: pinmux_P9_31_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_gpio_pd_pin: pinmux_P9_31_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_gpio_input_pin: pinmux_P9_31_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_pwm_pin: pinmux_P9_31_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkx.ehrpwm0a */
+ P9_31_spi_sclk_pin: pinmux_P9_31_spi_sclk_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_aclkx.spi1_sclk */
+ P9_31_pruout_pin: pinmux_P9_31_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkx.pru0_out0 */
+ P9_31_pruin_pin: pinmux_P9_31_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkx.pru0_in0 */
+
+ /* P9_32 VADC */
+
+ /* P9_33 (ZCZ ball C8) AIN4 */
+
+ /* P9_34 AGND */
+
+ /* P9_35 (ZCZ ball A8) AIN6 */
+
+ /* P9_36 (ZCZ ball B8) AIN5 */
+
+ /* P9_37 (ZCZ ball B7) AIN2 */
+
+ /* P9_38 (ZCZ ball A7) AIN3 */
+
+ /* P9_39 (ZCZ ball B6) AIN0 */
+
+ /* P9_40 (ZCZ ball C7) AIN1 */
+
+ /* P9_41 (ZCZ ball D14) gpio0_20 */
+ P9_41_default_pin: pinmux_P9_41_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_gpio_pin: pinmux_P9_41_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_gpio_pu_pin: pinmux_P9_41_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_gpio_pd_pin: pinmux_P9_41_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_gpio_input_pin: pinmux_P9_41_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_timer_pin: pinmux_P9_41_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* xdma_event_intr1.timer7 */
+ P9_41_pruin_pin: pinmux_P9_41_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE5) >; }; /* xdma_event_intr1.pru0_in16 */
+
+ /* P9_41.1 */
+ /* P9_91 (ZCZ ball D13) gpio3_20 */
+ P9_91_default_pin: pinmux_P9_91_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_gpio_pin: pinmux_P9_91_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_gpio_pu_pin: pinmux_P9_91_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_gpio_pd_pin: pinmux_P9_91_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_gpio_input_pin: pinmux_P9_91_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_qep_pin: pinmux_P9_91_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr1.eqep0_index */
+ P9_91_pruout_pin: pinmux_P9_91_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr1.pru0_out6 */
+ P9_91_pruin_pin: pinmux_P9_91_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr1.pru0_in6 */
+
+ /* P9_42 (ZCZ ball C18) gpio0_7 */
+ P9_42_default_pin: pinmux_P9_42_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_gpio_pin: pinmux_P9_42_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_gpio_pu_pin: pinmux_P9_42_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_gpio_pd_pin: pinmux_P9_42_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_gpio_input_pin: pinmux_P9_42_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_INPUT | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_pwm_pin: pinmux_P9_42_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE0) >; }; /* eCAP0_in_PWM0_out.ecap0_in_pwm0_out */
+ P9_42_uart_pin: pinmux_P9_42_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* eCAP0_in_PWM0_out.uart3_txd */
+ P9_42_spi_cs_pin: pinmux_P9_42_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* eCAP0_in_PWM0_out.spi1_cs1 */
+ P9_42_pru_ecap_pin: pinmux_P9_42_pru_ecap_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* eCAP0_in_PWM0_out.pr1_ecap0_ecap_capin_apwm_o */
+ P9_42_spi_sclk_pin: pinmux_P9_42_spi_sclk_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* eCAP0_in_PWM0_out.spi1_sclk */
+
+ /* P9_42.1 */
+ /* P9_92 (ZCZ ball B12) gpio3_18 */
+ P9_92_default_pin: pinmux_P9_92_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_gpio_pin: pinmux_P9_92_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_gpio_pu_pin: pinmux_P9_92_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_gpio_pd_pin: pinmux_P9_92_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_gpio_input_pin: pinmux_P9_92_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_qep_pin: pinmux_P9_92_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkr.eqep0a_in */
+ P9_92_pruout_pin: pinmux_P9_92_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkr.pru0_out4 */
+ P9_92_pruin_pin: pinmux_P9_92_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkr.pru0_in4 */
+
+ /* P9_43 GND */
+
+ /* P9_44 GND */
+
+ /* P9_45 GND */
+
+ /* P9_46 GND */
+};
+
+&i2c1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ clock-frequency = <100000>;
+};
+
+&i2c2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ clock-frequency = <100000>;
+};
+
+&uart1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&uart2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&uart3 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&uart4 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&uart5 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&dcan0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&dcan1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&eqep0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
+ invert_qa = <1>; /* Should we invert the channel A input? */
+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
+ invert_qi = <0>; /* Should we invert the index input? */
+ invert_qs = <0>; /* Should we invert the strobe input? */
+};
+
+&eqep1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
+ invert_qa = <1>; /* Should we invert the channel A input? */
+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
+ invert_qi = <0>; /* Should we invert the index input? */
+ invert_qs = <0>; /* Should we invert the strobe input? */
+};
+
+&eqep2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
+ invert_qa = <1>; /* Should we invert the channel A input? */
+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
+ invert_qi = <0>; /* Should we invert the index input? */
+ invert_qs = <0>; /* Should we invert the strobe input? */
+};
+
+&epwmss0 {
+ status = "okay";
+};
+
+&epwmss1 {
+ status = "okay";
+};
+
+&epwmss2 {
+ status = "okay";
+};
+
+&ehrpwm0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ehrpwm1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ehrpwm2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ecap0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ecap1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ecap2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&spi0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+ symlink = "spi/0.0";
+
+ reg = <0>;
+ spi-max-frequency = <16000000>;
+ spi-cpha;
+ };
+
+ channel@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+ symlink = "spi/0.1";
+
+ reg = <1>;
+ spi-max-frequency = <16000000>;
+ };
+};
+
+&spi1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+ symlink = "spi/1.0";
+
+ reg = <0>;
+ spi-max-frequency = <16000000>;
+ spi-cpha;
+ };
+
+ channel@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+ symlink = "spi/1.1";
+
+ reg = <1>;
+ spi-max-frequency = <16000000>;
+ };
+};
+
+/**********************************************************************/
+/* Pin Multiplex Helpers */
+/* */
+/* These provide userspace runtime pin configuration for the */
+/* BeagleBone cape expansion headers */
+/**********************************************************************/
+
+&ocp {
+ /************************/
+ /* P8 Header */
+ /************************/
+
+ /* P8_01 GND */
+
+ /* P8_02 GND */
+
+
+ /* P8_03 (ZCZ ball R9) emmc */
+ P8_03_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_03_default_pin>;
+ pinctrl-1 = <&P8_03_gpio_pin>;
+ pinctrl-2 = <&P8_03_gpio_pu_pin>;
+ pinctrl-3 = <&P8_03_gpio_pd_pin>;
+ pinctrl-4 = <&P8_03_gpio_input_pin>;
+ };
+
+ /* P8_04 (ZCZ ball T9) emmc */
+ P8_04_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_04_default_pin>;
+ pinctrl-1 = <&P8_04_gpio_pin>;
+ pinctrl-2 = <&P8_04_gpio_pu_pin>;
+ pinctrl-3 = <&P8_04_gpio_pd_pin>;
+ pinctrl-4 = <&P8_04_gpio_input_pin>;
+ };
+
+ /* P8_05 (ZCZ ball R8) emmc */
+ P8_05_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_05_default_pin>;
+ pinctrl-1 = <&P8_05_gpio_pin>;
+ pinctrl-2 = <&P8_05_gpio_pu_pin>;
+ pinctrl-3 = <&P8_05_gpio_pd_pin>;
+ pinctrl-4 = <&P8_05_gpio_input_pin>;
+ };
+
+ /* P8_06 (ZCZ ball T8) emmc */
+ P8_06_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_06_default_pin>;
+ pinctrl-1 = <&P8_06_gpio_pin>;
+ pinctrl-2 = <&P8_06_gpio_pu_pin>;
+ pinctrl-3 = <&P8_06_gpio_pd_pin>;
+ pinctrl-4 = <&P8_06_gpio_input_pin>;
+ };
+
+ /* P8_07 (ZCZ ball R7) */
+ P8_07_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_07_default_pin>;
+ pinctrl-1 = <&P8_07_gpio_pin>;
+ pinctrl-2 = <&P8_07_gpio_pu_pin>;
+ pinctrl-3 = <&P8_07_gpio_pd_pin>;
+ pinctrl-4 = <&P8_07_gpio_input_pin>;
+ pinctrl-5 = <&P8_07_timer_pin>;
+ };
+
+ /* P8_08 (ZCZ ball T7) */
+ P8_08_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_08_default_pin>;
+ pinctrl-1 = <&P8_08_gpio_pin>;
+ pinctrl-2 = <&P8_08_gpio_pu_pin>;
+ pinctrl-3 = <&P8_08_gpio_pd_pin>;
+ pinctrl-4 = <&P8_08_gpio_input_pin>;
+ pinctrl-5 = <&P8_08_timer_pin>;
+ };
+
+ /* P8_09 (ZCZ ball T6) */
+ P8_09_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_09_default_pin>;
+ pinctrl-1 = <&P8_09_gpio_pin>;
+ pinctrl-2 = <&P8_09_gpio_pu_pin>;
+ pinctrl-3 = <&P8_09_gpio_pd_pin>;
+ pinctrl-4 = <&P8_09_gpio_input_pin>;
+ pinctrl-5 = <&P8_09_timer_pin>;
+ };
+
+ /* P8_10 (ZCZ ball U6) */
+ P8_10_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_10_default_pin>;
+ pinctrl-1 = <&P8_10_gpio_pin>;
+ pinctrl-2 = <&P8_10_gpio_pu_pin>;
+ pinctrl-3 = <&P8_10_gpio_pd_pin>;
+ pinctrl-4 = <&P8_10_gpio_input_pin>;
+ pinctrl-5 = <&P8_10_timer_pin>;
+ };
+
+ /* P8_11 (ZCZ ball R12) */
+ P8_11_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
+ pinctrl-0 = <&P8_11_default_pin>;
+ pinctrl-1 = <&P8_11_gpio_pin>;
+ pinctrl-2 = <&P8_11_gpio_pu_pin>;
+ pinctrl-3 = <&P8_11_gpio_pd_pin>;
+ pinctrl-4 = <&P8_11_gpio_input_pin>;
+ pinctrl-5 = <&P8_11_qep_pin>;
+ pinctrl-6 = <&P8_11_pruout_pin>;
+ };
+
+ /* P8_12 (ZCZ ball T12) */
+ P8_12_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
+ pinctrl-0 = <&P8_12_default_pin>;
+ pinctrl-1 = <&P8_12_gpio_pin>;
+ pinctrl-2 = <&P8_12_gpio_pu_pin>;
+ pinctrl-3 = <&P8_12_gpio_pd_pin>;
+ pinctrl-4 = <&P8_12_gpio_input_pin>;
+ pinctrl-5 = <&P8_12_qep_pin>;
+ pinctrl-6 = <&P8_12_pruout_pin>;
+ };
+
+ /* P8_13 (ZCZ ball T10) */
+ P8_13_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_13_default_pin>;
+ pinctrl-1 = <&P8_13_gpio_pin>;
+ pinctrl-2 = <&P8_13_gpio_pu_pin>;
+ pinctrl-3 = <&P8_13_gpio_pd_pin>;
+ pinctrl-4 = <&P8_13_gpio_input_pin>;
+ pinctrl-5 = <&P8_13_pwm_pin>;
+ };
+
+ /* P8_14 (ZCZ ball T11) */
+ P8_14_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_14_default_pin>;
+ pinctrl-1 = <&P8_14_gpio_pin>;
+ pinctrl-2 = <&P8_14_gpio_pu_pin>;
+ pinctrl-3 = <&P8_14_gpio_pd_pin>;
+ pinctrl-4 = <&P8_14_gpio_input_pin>;
+ pinctrl-5 = <&P8_14_pwm_pin>;
+ };
+
+ /* P8_15 (ZCZ ball U13) */
+ P8_15_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pru_ecap", "pruin";
+ pinctrl-0 = <&P8_15_default_pin>;
+ pinctrl-1 = <&P8_15_gpio_pin>;
+ pinctrl-2 = <&P8_15_gpio_pu_pin>;
+ pinctrl-3 = <&P8_15_gpio_pd_pin>;
+ pinctrl-4 = <&P8_15_gpio_input_pin>;
+ pinctrl-5 = <&P8_15_qep_pin>;
+ pinctrl-6 = <&P8_15_pru_ecap_pin>;
+ pinctrl-7 = <&P8_15_pruin_pin>;
+ };
+
+ /* P8_16 (ZCZ ball V13) */
+ P8_16_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruin";
+ pinctrl-0 = <&P8_16_default_pin>;
+ pinctrl-1 = <&P8_16_gpio_pin>;
+ pinctrl-2 = <&P8_16_gpio_pu_pin>;
+ pinctrl-3 = <&P8_16_gpio_pd_pin>;
+ pinctrl-4 = <&P8_16_gpio_input_pin>;
+ pinctrl-5 = <&P8_16_qep_pin>;
+ pinctrl-6 = <&P8_16_pruin_pin>;
+ };
+
+ /* P8_17 (ZCZ ball U12) */
+ P8_17_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_17_default_pin>;
+ pinctrl-1 = <&P8_17_gpio_pin>;
+ pinctrl-2 = <&P8_17_gpio_pu_pin>;
+ pinctrl-3 = <&P8_17_gpio_pd_pin>;
+ pinctrl-4 = <&P8_17_gpio_input_pin>;
+ pinctrl-5 = <&P8_17_pwm_pin>;
+ };
+
+ /* P8_18 (ZCZ ball V12) */
+ P8_18_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_18_default_pin>;
+ pinctrl-1 = <&P8_18_gpio_pin>;
+ pinctrl-2 = <&P8_18_gpio_pu_pin>;
+ pinctrl-3 = <&P8_18_gpio_pd_pin>;
+ pinctrl-4 = <&P8_18_gpio_input_pin>;
+ };
+
+ /* P8_19 (ZCZ ball U10) */
+ P8_19_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_19_default_pin>;
+ pinctrl-1 = <&P8_19_gpio_pin>;
+ pinctrl-2 = <&P8_19_gpio_pu_pin>;
+ pinctrl-3 = <&P8_19_gpio_pd_pin>;
+ pinctrl-4 = <&P8_19_gpio_input_pin>;
+ pinctrl-5 = <&P8_19_pwm_pin>;
+ };
+
+ /* P8_20 (ZCZ ball V9) emmc */
+ P8_20_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_20_default_pin>;
+ pinctrl-1 = <&P8_20_gpio_pin>;
+ pinctrl-2 = <&P8_20_gpio_pu_pin>;
+ pinctrl-3 = <&P8_20_gpio_pd_pin>;
+ pinctrl-4 = <&P8_20_gpio_input_pin>;
+ pinctrl-5 = <&P8_20_pruout_pin>;
+ pinctrl-6 = <&P8_20_pruin_pin>;
+ };
+
+ /* P8_21 (ZCZ ball U9) emmc */
+ P8_21_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_21_default_pin>;
+ pinctrl-1 = <&P8_21_gpio_pin>;
+ pinctrl-2 = <&P8_21_gpio_pu_pin>;
+ pinctrl-3 = <&P8_21_gpio_pd_pin>;
+ pinctrl-4 = <&P8_21_gpio_input_pin>;
+ pinctrl-5 = <&P8_21_pruout_pin>;
+ pinctrl-6 = <&P8_21_pruin_pin>;
+ };
+
+ /* P8_22 (ZCZ ball V8) emmc */
+ P8_22_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_22_default_pin>;
+ pinctrl-1 = <&P8_22_gpio_pin>;
+ pinctrl-2 = <&P8_22_gpio_pu_pin>;
+ pinctrl-3 = <&P8_22_gpio_pd_pin>;
+ pinctrl-4 = <&P8_22_gpio_input_pin>;
+ };
+
+ /* P8_23 (ZCZ ball U8) emmc */
+ P8_23_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_23_default_pin>;
+ pinctrl-1 = <&P8_23_gpio_pin>;
+ pinctrl-2 = <&P8_23_gpio_pu_pin>;
+ pinctrl-3 = <&P8_23_gpio_pd_pin>;
+ pinctrl-4 = <&P8_23_gpio_input_pin>;
+ };
+
+ /* P8_24 (ZCZ ball V7) emmc */
+ P8_24_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_24_default_pin>;
+ pinctrl-1 = <&P8_24_gpio_pin>;
+ pinctrl-2 = <&P8_24_gpio_pu_pin>;
+ pinctrl-3 = <&P8_24_gpio_pd_pin>;
+ pinctrl-4 = <&P8_24_gpio_input_pin>;
+ };
+
+ /* P8_25 (ZCZ ball U7) emmc */
+ P8_25_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_25_default_pin>;
+ pinctrl-1 = <&P8_25_gpio_pin>;
+ pinctrl-2 = <&P8_25_gpio_pu_pin>;
+ pinctrl-3 = <&P8_25_gpio_pd_pin>;
+ pinctrl-4 = <&P8_25_gpio_input_pin>;
+ };
+
+ /* P8_26 (ZCZ ball V6) */
+ P8_26_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_26_default_pin>;
+ pinctrl-1 = <&P8_26_gpio_pin>;
+ pinctrl-2 = <&P8_26_gpio_pu_pin>;
+ pinctrl-3 = <&P8_26_gpio_pd_pin>;
+ pinctrl-4 = <&P8_26_gpio_input_pin>;
+ };
+
+ /* P8_27 (ZCZ ball U5) hdmi */
+ P8_27_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_27_default_pin>;
+ pinctrl-1 = <&P8_27_gpio_pin>;
+ pinctrl-2 = <&P8_27_gpio_pu_pin>;
+ pinctrl-3 = <&P8_27_gpio_pd_pin>;
+ pinctrl-4 = <&P8_27_gpio_input_pin>;
+ pinctrl-5 = <&P8_27_pruout_pin>;
+ pinctrl-6 = <&P8_27_pruin_pin>;
+ };
+
+ /* P8_28 (ZCZ ball V5) hdmi */
+ P8_28_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_28_default_pin>;
+ pinctrl-1 = <&P8_28_gpio_pin>;
+ pinctrl-2 = <&P8_28_gpio_pu_pin>;
+ pinctrl-3 = <&P8_28_gpio_pd_pin>;
+ pinctrl-4 = <&P8_28_gpio_input_pin>;
+ pinctrl-5 = <&P8_28_pruout_pin>;
+ pinctrl-6 = <&P8_28_pruin_pin>;
+ };
+
+ /* P8_29 (ZCZ ball R5) hdmi */
+ P8_29_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_29_default_pin>;
+ pinctrl-1 = <&P8_29_gpio_pin>;
+ pinctrl-2 = <&P8_29_gpio_pu_pin>;
+ pinctrl-3 = <&P8_29_gpio_pd_pin>;
+ pinctrl-4 = <&P8_29_gpio_input_pin>;
+ pinctrl-5 = <&P8_29_pruout_pin>;
+ pinctrl-6 = <&P8_29_pruin_pin>;
+ };
+
+ /* P8_30 (ZCZ ball R6) hdmi */
+ P8_30_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_30_default_pin>;
+ pinctrl-1 = <&P8_30_gpio_pin>;
+ pinctrl-2 = <&P8_30_gpio_pu_pin>;
+ pinctrl-3 = <&P8_30_gpio_pd_pin>;
+ pinctrl-4 = <&P8_30_gpio_input_pin>;
+ pinctrl-5 = <&P8_30_pruout_pin>;
+ pinctrl-6 = <&P8_30_pruin_pin>;
+ };
+
+ /* P8_31 (ZCZ ball V4) hdmi */
+ P8_31_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "qep";
+ pinctrl-0 = <&P8_31_default_pin>;
+ pinctrl-1 = <&P8_31_gpio_pin>;
+ pinctrl-2 = <&P8_31_gpio_pu_pin>;
+ pinctrl-3 = <&P8_31_gpio_pd_pin>;
+ pinctrl-4 = <&P8_31_gpio_input_pin>;
+ pinctrl-5 = <&P8_31_uart_pin>;
+ pinctrl-6 = <&P8_31_qep_pin>;
+ };
+
+ /* P8_32 (ZCZ ball T5) hdmi */
+ P8_32_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
+ pinctrl-0 = <&P8_32_default_pin>;
+ pinctrl-1 = <&P8_32_gpio_pin>;
+ pinctrl-2 = <&P8_32_gpio_pu_pin>;
+ pinctrl-3 = <&P8_32_gpio_pd_pin>;
+ pinctrl-4 = <&P8_32_gpio_input_pin>;
+ pinctrl-5 = <&P8_32_qep_pin>;
+ };
+
+ /* P8_33 (ZCZ ball V3) hdmi */
+ P8_33_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
+ pinctrl-0 = <&P8_33_default_pin>;
+ pinctrl-1 = <&P8_33_gpio_pin>;
+ pinctrl-2 = <&P8_33_gpio_pu_pin>;
+ pinctrl-3 = <&P8_33_gpio_pd_pin>;
+ pinctrl-4 = <&P8_33_gpio_input_pin>;
+ pinctrl-5 = <&P8_33_qep_pin>;
+ };
+
+ /* P8_34 (ZCZ ball U4) hdmi */
+ P8_34_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_34_default_pin>;
+ pinctrl-1 = <&P8_34_gpio_pin>;
+ pinctrl-2 = <&P8_34_gpio_pu_pin>;
+ pinctrl-3 = <&P8_34_gpio_pd_pin>;
+ pinctrl-4 = <&P8_34_gpio_input_pin>;
+ pinctrl-5 = <&P8_34_pwm_pin>;
+ };
+
+ /* P8_35 (ZCZ ball V2) hdmi */
+ P8_35_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
+ pinctrl-0 = <&P8_35_default_pin>;
+ pinctrl-1 = <&P8_35_gpio_pin>;
+ pinctrl-2 = <&P8_35_gpio_pu_pin>;
+ pinctrl-3 = <&P8_35_gpio_pd_pin>;
+ pinctrl-4 = <&P8_35_gpio_input_pin>;
+ pinctrl-5 = <&P8_35_qep_pin>;
+ };
+
+ /* P8_36 (ZCZ ball U3) hdmi */
+ P8_36_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_36_default_pin>;
+ pinctrl-1 = <&P8_36_gpio_pin>;
+ pinctrl-2 = <&P8_36_gpio_pu_pin>;
+ pinctrl-3 = <&P8_36_gpio_pd_pin>;
+ pinctrl-4 = <&P8_36_gpio_input_pin>;
+ pinctrl-5 = <&P8_36_pwm_pin>;
+ };
+
+ /* P8_37 (ZCZ ball U1) hdmi */
+ P8_37_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "pwm";
+ pinctrl-0 = <&P8_37_default_pin>;
+ pinctrl-1 = <&P8_37_gpio_pin>;
+ pinctrl-2 = <&P8_37_gpio_pu_pin>;
+ pinctrl-3 = <&P8_37_gpio_pd_pin>;
+ pinctrl-4 = <&P8_37_gpio_input_pin>;
+ pinctrl-5 = <&P8_37_uart_pin>;
+ pinctrl-6 = <&P8_37_pwm_pin>;
+ };
+
+ /* P8_38 (ZCZ ball U2) hdmi */
+ P8_38_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "pwm";
+ pinctrl-0 = <&P8_38_default_pin>;
+ pinctrl-1 = <&P8_38_gpio_pin>;
+ pinctrl-2 = <&P8_38_gpio_pu_pin>;
+ pinctrl-3 = <&P8_38_gpio_pd_pin>;
+ pinctrl-4 = <&P8_38_gpio_input_pin>;
+ pinctrl-5 = <&P8_38_uart_pin>;
+ pinctrl-6 = <&P8_38_pwm_pin>;
+ };
+
+ /* P8_39 (ZCZ ball T3) hdmi */
+ P8_39_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P8_39_default_pin>;
+ pinctrl-1 = <&P8_39_gpio_pin>;
+ pinctrl-2 = <&P8_39_gpio_pu_pin>;
+ pinctrl-3 = <&P8_39_gpio_pd_pin>;
+ pinctrl-4 = <&P8_39_gpio_input_pin>;
+ pinctrl-5 = <&P8_39_qep_pin>;
+ pinctrl-6 = <&P8_39_pruout_pin>;
+ pinctrl-7 = <&P8_39_pruin_pin>;
+ };
+
+ /* P8_40 (ZCZ ball T4) hdmi */
+ P8_40_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P8_40_default_pin>;
+ pinctrl-1 = <&P8_40_gpio_pin>;
+ pinctrl-2 = <&P8_40_gpio_pu_pin>;
+ pinctrl-3 = <&P8_40_gpio_pd_pin>;
+ pinctrl-4 = <&P8_40_gpio_input_pin>;
+ pinctrl-5 = <&P8_40_qep_pin>;
+ pinctrl-6 = <&P8_40_pruout_pin>;
+ pinctrl-7 = <&P8_40_pruin_pin>;
+ };
+
+ /* P8_41 (ZCZ ball T1) hdmi */
+ P8_41_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P8_41_default_pin>;
+ pinctrl-1 = <&P8_41_gpio_pin>;
+ pinctrl-2 = <&P8_41_gpio_pu_pin>;
+ pinctrl-3 = <&P8_41_gpio_pd_pin>;
+ pinctrl-4 = <&P8_41_gpio_input_pin>;
+ pinctrl-5 = <&P8_41_qep_pin>;
+ pinctrl-6 = <&P8_41_pruout_pin>;
+ pinctrl-7 = <&P8_41_pruin_pin>;
+ };
+
+ /* P8_42 (ZCZ ball T2) hdmi */
+ P8_42_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P8_42_default_pin>;
+ pinctrl-1 = <&P8_42_gpio_pin>;
+ pinctrl-2 = <&P8_42_gpio_pu_pin>;
+ pinctrl-3 = <&P8_42_gpio_pd_pin>;
+ pinctrl-4 = <&P8_42_gpio_input_pin>;
+ pinctrl-5 = <&P8_42_qep_pin>;
+ pinctrl-6 = <&P8_42_pruout_pin>;
+ pinctrl-7 = <&P8_42_pruin_pin>;
+ };
+
+ /* P8_43 (ZCZ ball R3) hdmi */
+ P8_43_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P8_43_default_pin>;
+ pinctrl-1 = <&P8_43_gpio_pin>;
+ pinctrl-2 = <&P8_43_gpio_pu_pin>;
+ pinctrl-3 = <&P8_43_gpio_pd_pin>;
+ pinctrl-4 = <&P8_43_gpio_input_pin>;
+ pinctrl-5 = <&P8_43_pwm_pin>;
+ pinctrl-6 = <&P8_43_pruout_pin>;
+ pinctrl-7 = <&P8_43_pruin_pin>;
+ };
+
+ /* P8_44 (ZCZ ball R4) hdmi */
+ P8_44_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P8_44_default_pin>;
+ pinctrl-1 = <&P8_44_gpio_pin>;
+ pinctrl-2 = <&P8_44_gpio_pu_pin>;
+ pinctrl-3 = <&P8_44_gpio_pd_pin>;
+ pinctrl-4 = <&P8_44_gpio_input_pin>;
+ pinctrl-5 = <&P8_44_pwm_pin>;
+ pinctrl-6 = <&P8_44_pruout_pin>;
+ pinctrl-7 = <&P8_44_pruin_pin>;
+ };
+
+ /* P8_45 (ZCZ ball R1) hdmi */
+ P8_45_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P8_45_default_pin>;
+ pinctrl-1 = <&P8_45_gpio_pin>;
+ pinctrl-2 = <&P8_45_gpio_pu_pin>;
+ pinctrl-3 = <&P8_45_gpio_pd_pin>;
+ pinctrl-4 = <&P8_45_gpio_input_pin>;
+ pinctrl-5 = <&P8_45_pwm_pin>;
+ pinctrl-6 = <&P8_45_pruout_pin>;
+ pinctrl-7 = <&P8_45_pruin_pin>;
+ };
+
+ /* P8_46 (ZCZ ball R2) hdmi */
+ P8_46_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P8_46_default_pin>;
+ pinctrl-1 = <&P8_46_gpio_pin>;
+ pinctrl-2 = <&P8_46_gpio_pu_pin>;
+ pinctrl-3 = <&P8_46_gpio_pd_pin>;
+ pinctrl-4 = <&P8_46_gpio_input_pin>;
+ pinctrl-5 = <&P8_46_pwm_pin>;
+ pinctrl-6 = <&P8_46_pruout_pin>;
+ pinctrl-7 = <&P8_46_pruin_pin>;
+ };
+
+ /************************/
+ /* P9 Header */
+ /************************/
+
+ /* P9_01 GND */
+
+ /* P9_02 GND */
+
+ /* P9_03 3V3 */
+
+ /* P9_04 3V3 */
+
+ /* P9_05 VDD_5V */
+
+ /* P9_06 VDD_5V */
+
+ /* P9_07 SYS_5V */
+
+ /* P9_08 SYS_5V */
+
+ /* P9_09 PWR_BUT */
+
+ /* P9_10 RSTn */
+
+ /* P9_11 (ZCZ ball T17) */
+ P9_11_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
+ pinctrl-0 = <&P9_11_default_pin>;
+ pinctrl-1 = <&P9_11_gpio_pin>;
+ pinctrl-2 = <&P9_11_gpio_pu_pin>;
+ pinctrl-3 = <&P9_11_gpio_pd_pin>;
+ pinctrl-4 = <&P9_11_gpio_input_pin>;
+ pinctrl-5 = <&P9_11_uart_pin>;
+ };
+
+ /* P9_12 (ZCZ ball U18) */
+ P9_12_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P9_12_default_pin>;
+ pinctrl-1 = <&P9_12_gpio_pin>;
+ pinctrl-2 = <&P9_12_gpio_pu_pin>;
+ pinctrl-3 = <&P9_12_gpio_pd_pin>;
+ pinctrl-4 = <&P9_12_gpio_input_pin>;
+ };
+
+ /* P9_13 (ZCZ ball U17) */
+ P9_13_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
+ pinctrl-0 = <&P9_13_default_pin>;
+ pinctrl-1 = <&P9_13_gpio_pin>;
+ pinctrl-2 = <&P9_13_gpio_pu_pin>;
+ pinctrl-3 = <&P9_13_gpio_pd_pin>;
+ pinctrl-4 = <&P9_13_gpio_input_pin>;
+ pinctrl-5 = <&P9_13_uart_pin>;
+ };
+
+ /* P9_14 (ZCZ ball U14) */
+ P9_14_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P9_14_default_pin>;
+ pinctrl-1 = <&P9_14_gpio_pin>;
+ pinctrl-2 = <&P9_14_gpio_pu_pin>;
+ pinctrl-3 = <&P9_14_gpio_pd_pin>;
+ pinctrl-4 = <&P9_14_gpio_input_pin>;
+ pinctrl-5 = <&P9_14_pwm_pin>;
+ };
+
+ /* P9_15 (ZCZ ball R13) */
+ P9_15_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P9_15_default_pin>;
+ pinctrl-1 = <&P9_15_gpio_pin>;
+ pinctrl-2 = <&P9_15_gpio_pu_pin>;
+ pinctrl-3 = <&P9_15_gpio_pd_pin>;
+ pinctrl-4 = <&P9_15_gpio_input_pin>;
+ pinctrl-5 = <&P9_15_pwm_pin>;
+ };
+
+ /* P9_16 (ZCZ ball T14) */
+ P9_16_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P9_16_default_pin>;
+ pinctrl-1 = <&P9_16_gpio_pin>;
+ pinctrl-2 = <&P9_16_gpio_pu_pin>;
+ pinctrl-3 = <&P9_16_gpio_pd_pin>;
+ pinctrl-4 = <&P9_16_gpio_input_pin>;
+ pinctrl-5 = <&P9_16_pwm_pin>;
+ };
+
+ /* P9_17 (ZCZ ball A16) */
+ P9_17_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P9_17_default_pin>;
+ pinctrl-1 = <&P9_17_gpio_pin>;
+ pinctrl-2 = <&P9_17_gpio_pu_pin>;
+ pinctrl-3 = <&P9_17_gpio_pd_pin>;
+ pinctrl-4 = <&P9_17_gpio_input_pin>;
+ pinctrl-5 = <&P9_17_spi_cs_pin>;
+ pinctrl-6 = <&P9_17_i2c_pin>;
+ pinctrl-7 = <&P9_17_pwm_pin>;
+ pinctrl-8 = <&P9_17_pru_uart_pin>;
+ };
+
+ /* P9_18 (ZCZ ball B16) */
+ P9_18_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P9_18_default_pin>;
+ pinctrl-1 = <&P9_18_gpio_pin>;
+ pinctrl-2 = <&P9_18_gpio_pu_pin>;
+ pinctrl-3 = <&P9_18_gpio_pd_pin>;
+ pinctrl-4 = <&P9_18_gpio_input_pin>;
+ pinctrl-5 = <&P9_18_spi_pin>;
+ pinctrl-6 = <&P9_18_i2c_pin>;
+ pinctrl-7 = <&P9_18_pwm_pin>;
+ pinctrl-8 = <&P9_18_pru_uart_pin>;
+ };
+
+ /* P9_19 (ZCZ ball D17) i2c */
+ P9_19_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart", "timer";
+ pinctrl-0 = <&P9_19_default_pin>;
+ pinctrl-1 = <&P9_19_gpio_pin>;
+ pinctrl-2 = <&P9_19_gpio_pu_pin>;
+ pinctrl-3 = <&P9_19_gpio_pd_pin>;
+ pinctrl-4 = <&P9_19_gpio_input_pin>;
+ pinctrl-5 = <&P9_19_spi_cs_pin>;
+ pinctrl-6 = <&P9_19_can_pin>;
+ pinctrl-7 = <&P9_19_i2c_pin>;
+ pinctrl-8 = <&P9_19_pru_uart_pin>;
+ pinctrl-9 = <&P9_19_timer_pin>;
+ };
+
+ /* P9_20 (ZCZ ball D18) i2c */
+ P9_20_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart", "timer";
+ pinctrl-0 = <&P9_20_default_pin>;
+ pinctrl-1 = <&P9_20_gpio_pin>;
+ pinctrl-2 = <&P9_20_gpio_pu_pin>;
+ pinctrl-3 = <&P9_20_gpio_pd_pin>;
+ pinctrl-4 = <&P9_20_gpio_input_pin>;
+ pinctrl-5 = <&P9_20_spi_cs_pin>;
+ pinctrl-6 = <&P9_20_can_pin>;
+ pinctrl-7 = <&P9_20_i2c_pin>;
+ pinctrl-8 = <&P9_20_pru_uart_pin>;
+ pinctrl-9 = <&P9_20_timer_pin>;
+ };
+
+ /* P9_21 (ZCZ ball B17) */
+ P9_21_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "uart", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P9_21_default_pin>;
+ pinctrl-1 = <&P9_21_gpio_pin>;
+ pinctrl-2 = <&P9_21_gpio_pu_pin>;
+ pinctrl-3 = <&P9_21_gpio_pd_pin>;
+ pinctrl-4 = <&P9_21_gpio_input_pin>;
+ pinctrl-5 = <&P9_21_spi_pin>;
+ pinctrl-6 = <&P9_21_uart_pin>;
+ pinctrl-7 = <&P9_21_i2c_pin>;
+ pinctrl-8 = <&P9_21_pwm_pin>;
+ pinctrl-9 = <&P9_21_pru_uart_pin>;
+ };
+
+ /* P9_22 (ZCZ ball A17) */
+ P9_22_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "uart", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P9_22_default_pin>;
+ pinctrl-1 = <&P9_22_gpio_pin>;
+ pinctrl-2 = <&P9_22_gpio_pu_pin>;
+ pinctrl-3 = <&P9_22_gpio_pd_pin>;
+ pinctrl-4 = <&P9_22_gpio_input_pin>;
+ pinctrl-5 = <&P9_22_spi_sclk_pin>;
+ pinctrl-6 = <&P9_22_uart_pin>;
+ pinctrl-7 = <&P9_22_i2c_pin>;
+ pinctrl-8 = <&P9_22_pwm_pin>;
+ pinctrl-9 = <&P9_22_pru_uart_pin>;
+ };
+
+ /* P9_23 (ZCZ ball V14) */
+ P9_23_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P9_23_default_pin>;
+ pinctrl-1 = <&P9_23_gpio_pin>;
+ pinctrl-2 = <&P9_23_gpio_pu_pin>;
+ pinctrl-3 = <&P9_23_gpio_pd_pin>;
+ pinctrl-4 = <&P9_23_gpio_input_pin>;
+ pinctrl-5 = <&P9_23_pwm_pin>;
+ };
+
+ /* P9_24 (ZCZ ball D15) */
+ P9_24_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
+ pinctrl-0 = <&P9_24_default_pin>;
+ pinctrl-1 = <&P9_24_gpio_pin>;
+ pinctrl-2 = <&P9_24_gpio_pu_pin>;
+ pinctrl-3 = <&P9_24_gpio_pd_pin>;
+ pinctrl-4 = <&P9_24_gpio_input_pin>;
+ pinctrl-5 = <&P9_24_uart_pin>;
+ pinctrl-6 = <&P9_24_can_pin>;
+ pinctrl-7 = <&P9_24_i2c_pin>;
+ pinctrl-8 = <&P9_24_pru_uart_pin>;
+ pinctrl-9 = <&P9_24_pruin_pin>;
+ };
+
+ /* P9_25 (ZCZ ball A14) audio */
+ P9_25_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P9_25_default_pin>;
+ pinctrl-1 = <&P9_25_gpio_pin>;
+ pinctrl-2 = <&P9_25_gpio_pu_pin>;
+ pinctrl-3 = <&P9_25_gpio_pd_pin>;
+ pinctrl-4 = <&P9_25_gpio_input_pin>;
+ pinctrl-5 = <&P9_25_qep_pin>;
+ pinctrl-6 = <&P9_25_pruout_pin>;
+ pinctrl-7 = <&P9_25_pruin_pin>;
+ };
+
+ /* P9_26 (ZCZ ball D16) */
+ P9_26_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
+ pinctrl-0 = <&P9_26_default_pin>;
+ pinctrl-1 = <&P9_26_gpio_pin>;
+ pinctrl-2 = <&P9_26_gpio_pu_pin>;
+ pinctrl-3 = <&P9_26_gpio_pd_pin>;
+ pinctrl-4 = <&P9_26_gpio_input_pin>;
+ pinctrl-5 = <&P9_26_uart_pin>;
+ pinctrl-6 = <&P9_26_can_pin>;
+ pinctrl-7 = <&P9_26_i2c_pin>;
+ pinctrl-8 = <&P9_26_pru_uart_pin>;
+ pinctrl-9 = <&P9_26_pruin_pin>;
+ };
+
+ /* P9_27 (ZCZ ball C13) */
+ P9_27_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P9_27_default_pin>;
+ pinctrl-1 = <&P9_27_gpio_pin>;
+ pinctrl-2 = <&P9_27_gpio_pu_pin>;
+ pinctrl-3 = <&P9_27_gpio_pd_pin>;
+ pinctrl-4 = <&P9_27_gpio_input_pin>;
+ pinctrl-5 = <&P9_27_qep_pin>;
+ pinctrl-6 = <&P9_27_pruout_pin>;
+ pinctrl-7 = <&P9_27_pruin_pin>;
+ };
+
+ /* P9_28 (ZCZ ball C12) audio */
+ P9_28_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "pwm", "pwm2", "pruout", "pruin";
+ pinctrl-0 = <&P9_28_default_pin>;
+ pinctrl-1 = <&P9_28_gpio_pin>;
+ pinctrl-2 = <&P9_28_gpio_pu_pin>;
+ pinctrl-3 = <&P9_28_gpio_pd_pin>;
+ pinctrl-4 = <&P9_28_gpio_input_pin>;
+ pinctrl-5 = <&P9_28_spi_cs_pin>;
+ pinctrl-6 = <&P9_28_pwm_pin>;
+ pinctrl-7 = <&P9_28_pwm2_pin>;
+ pinctrl-8 = <&P9_28_pruout_pin>;
+ pinctrl-9 = <&P9_28_pruin_pin>;
+ };
+
+ /* P9_29 (ZCZ ball B13) audio */
+ P9_29_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P9_29_default_pin>;
+ pinctrl-1 = <&P9_29_gpio_pin>;
+ pinctrl-2 = <&P9_29_gpio_pu_pin>;
+ pinctrl-3 = <&P9_29_gpio_pd_pin>;
+ pinctrl-4 = <&P9_29_gpio_input_pin>;
+ pinctrl-5 = <&P9_29_spi_pin>;
+ pinctrl-6 = <&P9_29_pwm_pin>;
+ pinctrl-7 = <&P9_29_pruout_pin>;
+ pinctrl-8 = <&P9_29_pruin_pin>;
+ };
+
+ /* P9_30 (ZCZ ball D12) */
+ P9_30_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P9_30_default_pin>;
+ pinctrl-1 = <&P9_30_gpio_pin>;
+ pinctrl-2 = <&P9_30_gpio_pu_pin>;
+ pinctrl-3 = <&P9_30_gpio_pd_pin>;
+ pinctrl-4 = <&P9_30_gpio_input_pin>;
+ pinctrl-5 = <&P9_30_spi_pin>;
+ pinctrl-6 = <&P9_30_pwm_pin>;
+ pinctrl-7 = <&P9_30_pruout_pin>;
+ pinctrl-8 = <&P9_30_pruin_pin>;
+ };
+
+ /* P9_31 (ZCZ ball A13) audio */
+ P9_31_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P9_31_default_pin>;
+ pinctrl-1 = <&P9_31_gpio_pin>;
+ pinctrl-2 = <&P9_31_gpio_pu_pin>;
+ pinctrl-3 = <&P9_31_gpio_pd_pin>;
+ pinctrl-4 = <&P9_31_gpio_input_pin>;
+ pinctrl-5 = <&P9_31_spi_sclk_pin>;
+ pinctrl-6 = <&P9_31_pwm_pin>;
+ pinctrl-7 = <&P9_31_pruout_pin>;
+ pinctrl-8 = <&P9_31_pruin_pin>;
+ };
+
+ /* P9_32 VADC */
+
+ /* P9_33 (ZCZ ball C8) AIN4 */
+
+ /* P9_34 AGND */
+
+ /* P9_35 (ZCZ ball A8) AIN6 */
+
+ /* P9_36 (ZCZ ball B8) AIN5 */
+
+ /* P9_37 (ZCZ ball B7) AIN2 */
+
+ /* P9_38 (ZCZ ball A7) AIN3 */
+
+ /* P9_39 (ZCZ ball B6) AIN0 */
+
+ /* P9_40 (ZCZ ball C7) AIN1 */
+
+ /* P9_41 (ZCZ ball D14) */
+ P9_41_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer", "pruin";
+ pinctrl-0 = <&P9_41_default_pin>;
+ pinctrl-1 = <&P9_41_gpio_pin>;
+ pinctrl-2 = <&P9_41_gpio_pu_pin>;
+ pinctrl-3 = <&P9_41_gpio_pd_pin>;
+ pinctrl-4 = <&P9_41_gpio_input_pin>;
+ pinctrl-5 = <&P9_41_timer_pin>;
+ pinctrl-6 = <&P9_41_pruin_pin>;
+ };
+
+ /* P9_41.1 */
+ /* P9_91 (ZCZ ball D13) */
+ P9_91_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P9_91_default_pin>;
+ pinctrl-1 = <&P9_91_gpio_pin>;
+ pinctrl-2 = <&P9_91_gpio_pu_pin>;
+ pinctrl-3 = <&P9_91_gpio_pd_pin>;
+ pinctrl-4 = <&P9_91_gpio_input_pin>;
+ pinctrl-5 = <&P9_91_qep_pin>;
+ pinctrl-6 = <&P9_91_pruout_pin>;
+ pinctrl-7 = <&P9_91_pruin_pin>;
+ };
+
+ /* P9_42 (ZCZ ball C18) */
+ P9_42_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "spi_sclk", "uart", "pwm", "pru_ecap";
+ pinctrl-0 = <&P9_42_default_pin>;
+ pinctrl-1 = <&P9_42_gpio_pin>;
+ pinctrl-2 = <&P9_42_gpio_pu_pin>;
+ pinctrl-3 = <&P9_42_gpio_pd_pin>;
+ pinctrl-4 = <&P9_42_gpio_input_pin>;
+ pinctrl-5 = <&P9_42_spi_cs_pin>;
+ pinctrl-6 = <&P9_42_spi_sclk_pin>;
+ pinctrl-7 = <&P9_42_uart_pin>;
+ pinctrl-8 = <&P9_42_pwm_pin>;
+ pinctrl-9 = <&P9_42_pru_ecap_pin>;
+ };
+
+ /* P9_42.1 */
+ /* P9_92 (ZCZ ball B12) */
+ P9_92_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P9_92_default_pin>;
+ pinctrl-1 = <&P9_92_gpio_pin>;
+ pinctrl-2 = <&P9_92_gpio_pu_pin>;
+ pinctrl-3 = <&P9_92_gpio_pd_pin>;
+ pinctrl-4 = <&P9_92_gpio_input_pin>;
+ pinctrl-5 = <&P9_92_qep_pin>;
+ pinctrl-6 = <&P9_92_pruout_pin>;
+ pinctrl-7 = <&P9_92_pruin_pin>;
+ };
+
+ /* P9_43 GND */
+
+ /* P9_44 GND */
+
+ /* P9_45 GND */
+
+ /* P9_46 GND */
+
+
+ cape-universal {
+ compatible = "gpio-of-helper";
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ P8_03 {
+ gpio-name = "P8_03";
+ gpio = <&gpio1 6 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_04 {
+ gpio-name = "P8_04";
+ gpio = <&gpio1 7 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_05 {
+ gpio-name = "P8_05";
+ gpio = <&gpio1 2 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_06 {
+ gpio-name = "P8_06";
+ gpio = <&gpio1 3 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_07 {
+ gpio-name = "P8_07";
+ gpio = <&gpio2 2 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_08 {
+ gpio-name = "P8_08";
+ gpio = <&gpio2 3 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_09 {
+ gpio-name = "P8_09";
+ gpio = <&gpio2 5 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_10 {
+ gpio-name = "P8_10";
+ gpio = <&gpio2 4 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_11 {
+ gpio-name = "P8_11";
+ gpio = <&gpio1 13 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_12 {
+ gpio-name = "P8_12";
+ gpio = <&gpio1 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_13 {
+ gpio-name = "P8_13";
+ gpio = <&gpio0 23 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_14 {
+ gpio-name = "P8_14";
+ gpio = <&gpio0 26 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_15 {
+ gpio-name = "P8_15";
+ gpio = <&gpio1 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_16 {
+ gpio-name = "P8_16";
+ gpio = <&gpio1 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_17 {
+ gpio-name = "P8_17";
+ gpio = <&gpio0 27 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_18 {
+ gpio-name = "P8_18";
+ gpio = <&gpio2 1 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_19 {
+ gpio-name = "P8_19";
+ gpio = <&gpio0 22 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_20 {
+ gpio-name = "P8_20";
+ gpio = <&gpio1 31 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_21 {
+ gpio-name = "P8_21";
+ gpio = <&gpio1 30 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_22 {
+ gpio-name = "P8_22";
+ gpio = <&gpio1 5 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_23 {
+ gpio-name = "P8_23";
+ gpio = <&gpio1 4 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_24 {
+ gpio-name = "P8_24";
+ gpio = <&gpio1 1 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_25 {
+ gpio-name = "P8_25";
+ gpio = <&gpio1 0 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_26 {
+ gpio-name = "P8_26";
+ gpio = <&gpio1 29 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_27 {
+ gpio-name = "P8_27";
+ gpio = <&gpio2 22 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_28 {
+ gpio-name = "P8_28";
+ gpio = <&gpio2 24 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_29 {
+ gpio-name = "P8_29";
+ gpio = <&gpio2 23 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_30 {
+ gpio-name = "P8_30";
+ gpio = <&gpio2 25 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_31 {
+ gpio-name = "P8_31";
+ gpio = <&gpio0 10 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_32 {
+ gpio-name = "P8_32";
+ gpio = <&gpio0 11 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_33 {
+ gpio-name = "P8_33";
+ gpio = <&gpio0 9 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_34 {
+ gpio-name = "P8_34";
+ gpio = <&gpio2 17 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_35 {
+ gpio-name = "P8_35";
+ gpio = <&gpio0 8 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_36 {
+ gpio-name = "P8_36";
+ gpio = <&gpio2 16 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_37 {
+ gpio-name = "P8_37";
+ gpio = <&gpio2 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_38 {
+ gpio-name = "P8_38";
+ gpio = <&gpio2 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_39 {
+ gpio-name = "P8_39";
+ gpio = <&gpio2 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_40 {
+ gpio-name = "P8_40";
+ gpio = <&gpio2 13 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_41 {
+ gpio-name = "P8_41";
+ gpio = <&gpio2 10 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_42 {
+ gpio-name = "P8_42";
+ gpio = <&gpio2 11 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_43 {
+ gpio-name = "P8_43";
+ gpio = <&gpio2 8 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_44 {
+ gpio-name = "P8_44";
+ gpio = <&gpio2 9 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_45 {
+ gpio-name = "P8_45";
+ gpio = <&gpio2 6 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_46 {
+ gpio-name = "P8_46";
+ gpio = <&gpio2 7 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_11 {
+ gpio-name = "P9_11";
+ gpio = <&gpio0 30 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_12 {
+ gpio-name = "P9_12";
+ gpio = <&gpio1 28 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_13 {
+ gpio-name = "P9_13";
+ gpio = <&gpio0 31 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_14 {
+ gpio-name = "P9_14";
+ gpio = <&gpio1 18 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_15 {
+ gpio-name = "P9_15";
+ gpio = <&gpio1 16 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_16 {
+ gpio-name = "P9_16";
+ gpio = <&gpio1 19 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_17 {
+ gpio-name = "P9_17";
+ gpio = <&gpio0 5 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_18 {
+ gpio-name = "P9_18";
+ gpio = <&gpio0 4 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_19 {
+ gpio-name = "P9_19";
+ gpio = <&gpio0 13 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_20 {
+ gpio-name = "P9_20";
+ gpio = <&gpio0 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_21 {
+ gpio-name = "P9_21";
+ gpio = <&gpio0 3 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_22 {
+ gpio-name = "P9_22";
+ gpio = <&gpio0 2 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_23 {
+ gpio-name = "P9_23";
+ gpio = <&gpio1 17 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_24 {
+ gpio-name = "P9_24";
+ gpio = <&gpio0 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_25 {
+ gpio-name = "P9_25";
+ gpio = <&gpio3 21 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_26 {
+ gpio-name = "P9_26";
+ gpio = <&gpio0 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_27 {
+ gpio-name = "P9_27";
+ gpio = <&gpio3 19 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_28 {
+ gpio-name = "P9_28";
+ gpio = <&gpio3 17 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_29 {
+ gpio-name = "P9_29";
+ gpio = <&gpio3 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_30 {
+ gpio-name = "P9_30";
+ gpio = <&gpio3 16 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_31 {
+ gpio-name = "P9_31";
+ gpio = <&gpio3 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_41 {
+ gpio-name = "P9_41";
+ gpio = <&gpio0 20 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_91 {
+ gpio-name = "P9_91";
+ gpio = <&gpio3 20 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_42 {
+ gpio-name = "P9_42";
+ gpio = <&gpio0 7 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_92 {
+ gpio-name = "P9_92";
+ gpio = <&gpio3 18 0>;
+ input;
+ dir-changeable;
+ };
+
+ };
+};
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index 89b4cf2..914f23b 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -26,14 +26,14 @@
compatible = "gpio-leds";
led2 {
- label = "beaglebone:green:heartbeat";
+ label = "beaglebone:green:usr0";
gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "heartbeat";
default-state = "off";
};
led3 {
- label = "beaglebone:green:mmc0";
+ label = "beaglebone:green:usr1";
gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "mmc0";
default-state = "off";
@@ -63,9 +63,6 @@
};
&am33xx_pinmux {
- pinctrl-names = "default";
- pinctrl-0 = <&clkout2_pin>;
-
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */
@@ -96,12 +93,6 @@
>;
};
- clkout2_pin: pinmux_clkout2_pin {
- pinctrl-single,pins = <
- AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */
- >;
- };
-
cpsw_default: cpsw_default {
pinctrl-single,pins = <
/* Slave 1 */
@@ -418,4 +409,5 @@
&rtc {
clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
clock-names = "ext-clk", "int-clk";
+ system-power-controller;
};
diff --git b/arch/arm/boot/dts/am335x-bone-jtag.dtsi b/arch/arm/boot/dts/am335x-bone-jtag.dtsi
new file mode 100644
index 0000000..959f4e2
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-jtag.dtsi
@@ -0,0 +1,20 @@
+/*
+ * Device Tree Source for bone jtag
+ *
+ * Copyright (C) 2015 Robert Nelson <robertcnelson@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&am33xx_pinmux {
+ pinctrl-names = "default";
+ pinctrl-0 = <&clkout2_pin>;
+
+ clkout2_pin: pinmux_clkout2_pin {
+ pinctrl-single,pins = <
+ AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */
+ >;
+ };
+};
diff --git b/arch/arm/boot/dts/am335x-bone-uboot-univ.dts b/arch/arm/boot/dts/am335x-bone-uboot-univ.dts
new file mode 100644
index 0000000..24cc695
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bone-uboot-univ.dts
@@ -0,0 +1,27 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+#include "am335x-bone-common-univ.dtsi"
+
+/ {
+ model = "TI AM335x BeagleBone";
+ compatible = "ti,am335x-bone", "ti,am33xx";
+};
+
+&ldo3_reg {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <3300000>;
+ regulator-always-on;
+};
+
+&mmc1 {
+ vmmc-supply = <&ldo3_reg>;
+};
diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
index 43bfbce..ef128ba 100644
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -6,6 +6,7 @@
#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
+/* #include "am335x-bone-jtag.dtsi" */
/ {
model = "TI AM335x BeagleBone";
diff --git a/arch/arm/boot/dts/am335x-boneblack-common.dtsi b/arch/arm/boot/dts/am335x-boneblack-common.dtsi
index 7ad0798..40e88b1 100644
--- a/arch/arm/boot/dts/am335x-boneblack-common.dtsi
+++ b/arch/arm/boot/dts/am335x-boneblack-common.dtsi
@@ -27,7 +27,6 @@
&am33xx_pinmux {
nxp_hdmi_bonelt_pins: nxp_hdmi_bonelt_pins {
pinctrl-single,pins = <
- AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
@@ -51,12 +50,6 @@
>;
};
- nxp_hdmi_bonelt_off_pins: nxp_hdmi_bonelt_off_pins {
- pinctrl-single,pins = <
- AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
- >;
- };
-
mcasp0_pins: mcasp0_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0) /* mcasp0_ahcklx.mcasp0_ahclkx */
@@ -92,9 +85,8 @@
nxp,calib-gpios = <&gpio1 25 0>;
interrupts-extended = <&gpio1 25 IRQ_TYPE_LEVEL_LOW>;
- pinctrl-names = "default", "off";
+ pinctrl-names = "default";
pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
- pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
/* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
/* video-ports = <0x234501>; */
diff --git b/arch/arm/boot/dts/am335x-boneblack-uboot-univ.dts b/arch/arm/boot/dts/am335x-boneblack-uboot-univ.dts
new file mode 100644
index 0000000..7b4bf96
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-boneblack-uboot-univ.dts
@@ -0,0 +1,38 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+#include "am335x-bone-common-univ.dtsi"
+
+/ {
+ model = "TI AM335x BeagleBone Black";
+ compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
+};
+
+&cpu0_opp_table {
+ /*
+ * All PG 2.0 silicon may not support 1GHz but some of the early
+ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
+ * to support 1GHz OPP so enable it for PG 2.0 on this board.
+ */
+ oppnitro-1000000000 {
+ opp-supported-hw = <0x06 0x0100>;
+ };
+};
+
+&ldo3_reg {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+};
+
+&mmc1 {
+ vmmc-supply = <&vmmcsd_fixed>;
+};
diff --git b/arch/arm/boot/dts/am335x-boneblack-uboot.dts b/arch/arm/boot/dts/am335x-boneblack-uboot.dts
new file mode 100644
index 0000000..738fa39
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-boneblack-uboot.dts
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+
+/ {
+ model = "TI AM335x BeagleBone Black";
+ compatible = "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
+};
+
+&cpu0_opp_table {
+ /*
+ * All PG 2.0 silicon may not support 1GHz but some of the early
+ * BeagleBone Blacks have PG 2.0 silicon which is guaranteed
+ * to support 1GHz OPP so enable it for PG 2.0 on this board.
+ */
+ oppnitro-1000000000 {
+ opp-supported-hw = <0x06 0x0100>;
+ };
+};
+
+&ldo3_reg {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+};
+
+&mmc1 {
+ vmmc-supply = <&vmmcsd_fixed>;
+};
diff --git a/arch/arm/boot/dts/am335x-boneblack-wireless.dts b/arch/arm/boot/dts/am335x-boneblack-wireless.dts
index 3124d94..6ecafaa 100644
--- a/arch/arm/boot/dts/am335x-boneblack-wireless.dts
+++ b/arch/arm/boot/dts/am335x-boneblack-wireless.dts
@@ -8,6 +8,7 @@
#include "am335x-bone-common.dtsi"
#include "am335x-boneblack-common.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
+/* #include "am335x-bone-jtag.dtsi" */
/ {
model = "TI AM335x BeagleBone Black Wireless";
diff --git a/arch/arm/boot/dts/am335x-boneblack.dts b/arch/arm/boot/dts/am335x-boneblack.dts
index d392866..3279484 100644
--- a/arch/arm/boot/dts/am335x-boneblack.dts
+++ b/arch/arm/boot/dts/am335x-boneblack.dts
@@ -7,6 +7,7 @@
#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
#include "am335x-boneblack-common.dtsi"
+/* #include "am335x-bone-jtag.dtsi" */
/ {
model = "TI AM335x BeagleBone Black";
diff --git a/arch/arm/boot/dts/am335x-boneblue.dts b/arch/arm/boot/dts/am335x-boneblue.dts
index 0257576..3fdeb8e 100644
--- a/arch/arm/boot/dts/am335x-boneblue.dts
+++ b/arch/arm/boot/dts/am335x-boneblue.dts
@@ -122,9 +122,183 @@
gpio = <&gpio3 9 0>;
enable-active-high;
};
+
+ bt_en {
+ pinctrl-names = "default";
+ pinctrl-0 = <&bt_pins>;
+ compatible = "gpio-leds";
+
+ wl18xx_bt_en {
+ label = "wl18xx_bt_en";
+ gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
+ default-state = "off";
+ };
+ };
+};
+
+&cpu0_opp_table {
+ /*
+ * Octavo Systems:
+ * The EFUSE_SMA register is not programmed for any of the AM335x wafers
+ * we get and we are not programming them during our production test.
+ * Therefore, from a DEVICE_ID revision point of view, the silicon looks
+ * like it is Revision 2.1. However, from an EFUSE_SMA point of view for
+ * the HW OPP table, the silicon looks like it is Revision 1.0 (ie the
+ * EFUSE_SMA register reads as all zeros).
+ */
+ oppnitro-1000000000 {
+ opp-supported-hw = <0x06 0x0100>;
+ };
};
&am33xx_pinmux {
+ /***************************************************************************
+ * Static Pinmux
+ ***************************************************************************/
+ mux_helper_pins: pins {
+ pinctrl-single,pins = <
+
+ /* GPIO Inputs */
+ 0x09c 0x37 /*P8.9 Pause BUTTON, input pullup*/
+ 0x098 0x37 /*P8.10 MODE BUTTON input pullup*/
+ 0x1AC 0x37 /*P9.25 MPU-9150 INTERRUPT IN*/
+
+ /* Motor Control GPIO Out*/
+ 0x088 ( PIN_OUTPUT | MUX_MODE7 ) /* (T13) gpmc_csn3.gpio2[0] - MDIR_1A different from cape! */
+ 0x074 ( PIN_OUTPUT | MUX_MODE7 ) /* (U17) gpmc_wpn.gpio0[31] - P9.13, MDIR_1B */
+ 0x040 ( PIN_OUTPUT | MUX_MODE7 ) /* (R13) gpmc_a0.gpio1[16] - P9.15, MDIR_2A */
+ 0x0D8 ( PIN_OUTPUT | MUX_MODE7 ) /* (V4) lcd_data14.gpio0[10] - P8.31, MDIR_2B different from cape! */
+ 0x0AC ( PIN_OUTPUT | MUX_MODE7 ) /* (R4) lcd_data3.gpio2[9] - P8.44, MDIR_3A */
+ 0x0A8 ( PIN_OUTPUT | MUX_MODE7 ) /* (R3) lcd_data2.gpio2[8] - P8.43, MDIR_3B */
+ 0x0A0 ( PIN_OUTPUT | MUX_MODE7 ) /* (R1) lcd_data0.gpio2[6] - P8.45, MDIR_4A */
+ 0x0A4 ( PIN_OUTPUT | MUX_MODE7 ) /* (R2) lcd_data1.gpio2[7] - P8.46, MDIR_4B */
+ 0x1B4 ( PIN_OUTPUT | MUX_MODE7 ) /* (D14) xdma_event_intr1.gpio0[20] - P9.41, MOT_STBY */
+
+ /* PRU encoder input */
+ 0x038 0x36 /* P8_16,PRU0_r31_16,MODE6 */
+
+ /* PRU Servo output */
+ 0x0e0 0x05 /*pru1_pru_r30_8, MODE5*/
+ 0x0e8 0x05 /*pru1_pru_r30_10, MODE5 */
+ 0x0e4 0x05 /*pr1_pru1_pru_r30_9, MODE5 */
+ 0x0ec 0x05 /*pru1_pru_r30_11, MODE5 */
+ 0x0b8 0x05 /*pru1_pru_r30_6, MODE5 */
+ 0x0bc 0x05 /*pru1_pru_r30_7, MODE5 */
+ 0x0b0 0x05 /*pru1_pru_r30_4, MODE5 */
+ 0x0b4 0x05 /*pru1_pru_r30_5, MODE5 */
+ 0x0C8 0x0F /*P8.36, SERVO_PWR GPIO OUT*/
+
+ /* WILINK 8 */
+ 0x08c 0x0F /*P8.18 V12 A2DP FSYNC */
+ 0x078 0x0F /*P9.12 A2DP_CLOCK*/
+ >;
+
+ /* D13 BLUE_GP0_PIN_5 gpio 3_20 */
+ D13_default_pin: pinmux_D13_default_pin {
+ pinctrl-single,pins = < 0x1A8 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
+ D13_gpio_pin: pinmux_D13_gpio_pin {
+ pinctrl-single,pins = < 0x1A8 ( PIN_OUTPUT | MUX_MODE7 ) >; };
+ D13_gpio_pu_pin: pinmux_D13_gpio_pu_pin {
+ pinctrl-single,pins = < 0x1A8 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
+ D13_gpio_pd_pin: pinmux_D13_gpio_pd_pin {
+ pinctrl-single,pins = < 0x1A8 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) >; };
+
+ /* H17 BLUE_GP1_PIN_4 gpio 3_1 */
+ H17_default_pin: pinmux_H17_default_pin {
+ pinctrl-single,pins = < 0x10C ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
+ H17_gpio_pin: pinmux_H17_gpio_pin {
+ pinctrl-single,pins = < 0x10C ( PIN_OUTPUT | MUX_MODE7 ) >; };
+ H17_gpio_pu_pin: pinmux_H17_gpio_pu_pin {
+ pinctrl-single,pins = < 0x10C ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
+ H17_gpio_pd_pin: pinmux_H17_gpio_pd_pin {
+ pinctrl-single,pins = < 0x10C ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) >; };
+
+ /* J15 BLUE_GP1_PIN_3 gpio 3_2 */
+ J15_default_pin: pinmux_J15_default_pin {
+ pinctrl-single,pins = < 0x110 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
+ J15_gpio_pin: pinmux_J15_gpio_pin {
+ pinctrl-single,pins = < 0x110 ( PIN_OUTPUT | MUX_MODE7 ) >; };
+ J15_gpio_pu_pin: pinmux_J15_gpio_pu_pin {
+ pinctrl-single,pins = < 0x110 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
+ J15_gpio_pd_pin: pinmux_J15_gpio_pd_pin {
+ pinctrl-single,pins = < 0x110 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) >; };
+
+ /* P8_15 (ZCZ ball U13) */
+ P8_15_default_pin: pinmux_P8_15_default_pin {
+ pinctrl-single,pins = <0x03c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
+ P8_15_gpio_pin: pinmux_P8_15_gpio_pin {
+ pinctrl-single,pins = <0x03c 0x2F>; }; /* Mode 7, RxActive */
+ P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin {
+ pinctrl-single,pins = <0x03c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
+ P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin {
+ pinctrl-single,pins = <0x03c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
+ P8_15_pruin_pin: pinmux_P8_15_pruin_pin {
+ pinctrl-single,pins = <0x03c 0x26>; }; /* Mode 6, Pull-Down, RxActive */
+ P8_15_qep_pin: pinmux_P8_15_qep_pin {
+ pinctrl-single,pins = <0x03c 0x24>; }; /* Mode 4, Pull-Down, RxActive */
+ P8_15_pruin_pu_pin: pinmux_P8_15_pruin_pu_pin {
+ pinctrl-single,pins = <0x03c 0x36>; }; /* Mode 6, Pull-Up, RxActive */
+ P8_15_pruecapin_pu_pin: pinmux_P8_15_pruecapin_pu_pin {
+ pinctrl-single,pins = <0x03c 0x35>; }; /* Mode 5, Pull-Up, RxActive */
+
+ /* P9_11 (ZCZ ball T17) */
+ P9_11_default_pin: pinmux_P9_11_default_pin {
+ pinctrl-single,pins = <0x070 0x37>; }; /* Mode 7, Pull-Up, RxActive */
+ P9_11_gpio_pin: pinmux_P9_11_gpio_pin {
+ pinctrl-single,pins = <0x070 0x2F>; }; /* Mode 7, RxActive */
+ P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin {
+ pinctrl-single,pins = <0x070 0x37>; }; /* Mode 7, Pull-Up, RxActive */
+ P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin {
+ pinctrl-single,pins = <0x070 0x27>; }; /* Mode 7, Pull-Down, RxActive */
+ P9_11_uart_pin: pinmux_P9_11_uart_pin {
+ pinctrl-single,pins = <0x070 0x36>; }; /* Mode 6, Pull-Up, RxActive */
+
+ /* P9_23 (ZCZ ball V14) */
+ P9_23_default_pin: pinmux_P9_23_default_pin {
+ pinctrl-single,pins = <0x044 0x27>; }; /* Mode 7, Pull-Down, RxActive */
+ P9_23_gpio_pin: pinmux_P9_23_gpio_pin {
+ pinctrl-single,pins = <0x044 0x2F>; }; /* Mode 7, RxActive */
+ P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin {
+ pinctrl-single,pins = <0x044 0x37>; }; /* Mode 7, Pull-Up, RxActive */
+ P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin {
+ pinctrl-single,pins = <0x044 0x27>; }; /* Mode 7, Pull-Down, RxActive */
+ P9_23_pwm_pin: pinmux_P9_23_pwm_pin {
+ pinctrl-single,pins = <0x044 0x26>; }; /* Mode 6, Pull-Down, RxActive */
+
+ /* P9_28 (ZCZ ball C12) Audio */
+ P9_28_default_pin: pinmux_P9_28_default_pin {
+ pinctrl-single,pins = <0x19c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
+ P9_28_gpio_pin: pinmux_P9_28_gpio_pin {
+ pinctrl-single,pins = <0x19c 0x2F>; }; /* Mode 7, RxActive */
+ P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin {
+ pinctrl-single,pins = <0x19c 0x37>; }; /* Mode 7, Pull-Up, RxActive */
+ P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin {
+ pinctrl-single,pins = <0x19c 0x27>; }; /* Mode 7, Pull-Down, RxActive */
+ P9_28_pwm_pin: pinmux_P9_28_pwm_pin {
+ pinctrl-single,pins = <0x19c 0x21>; }; /* Mode 1, Pull-Down, RxActive */
+ P9_28_spi_pin: pinmux_P9_28_spi_pin {
+ pinctrl-single,pins = <0x19c 0x23>; }; /* Mode 3, Pull-Down, RxActive */
+ P9_28_pwm2_pin: pinmux_P9_28_pwm2_pin {
+ pinctrl-single,pins = <0x19c 0x24>; }; /* Mode 4, Pull-Down, RxActive */
+ P9_28_pruout_pin: pinmux_P9_28_pruout_pin {
+ pinctrl-single,pins = <0x19c 0x25>; }; /* Mode 5, Pull-Down, RxActive */
+ P9_28_pruin_pin: pinmux_P9_28_pruin_pin {
+ pinctrl-single,pins = <0x19c 0x26>; }; /* Mode 6, Pull-Down, RxActive */
+ P9_28_audio_pin: pinmux_P9_28_audio_pin {
+ pinctrl-single,pins = <0x19c (PIN_OUTPUT_PULLDOWN | MUX_MODE2)>; }; /* mcasp0_ahclkr.mcasp0_axr2 */
+
+ /* U16 BLUE_GP0_PIN_3 gpio 1_25 */
+ U16_default_pin: pinmux_U16_default_pin {
+ pinctrl-single,pins = < 0x064 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
+ U16_gpio_pin: pinmux_U16_gpio_pin {
+ pinctrl-single,pins = < 0x064 ( PIN_OUTPUT | MUX_MODE7 ) >; };
+ U16_gpio_pu_pin: pinmux_U16_gpio_pu_pin {
+ pinctrl-single,pins = < 0x064 ( PIN_INPUT_PULLUP | MUX_MODE7 ) >; };
+ U16_gpio_pd_pin: pinmux_U16_gpio_pd_pin {
+ pinctrl-single,pins = < 0x064 ( PIN_INPUT_PULLDOWN | MUX_MODE7 ) >; };
+
+ };
+
user_leds_s0: user_leds_s0 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */
@@ -181,11 +355,11 @@
};
/* DSM2 */
- uart4_pins: pinmux_uart4_pins {
- pinctrl-single,pins = <
- AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
- >;
- };
+ //uart4_pins: pinmux_uart4_pins {
+ // pinctrl-single,pins = <
+ // AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
+ // >;
+ //};
/* UT5 */
uart5_pins: pinmux_uart5_pins {
@@ -258,6 +432,51 @@
AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_OUTPUT, MUX_MODE7) /* (M16) gmii1_rxd0.gpio2[21] */
>;
};
+
+ ehrpwm1_pins: pinmux_ehrpwm1_pins {
+ pinctrl-single,pins = <
+ 0x020 0x24 /* P8_19_pwm_pin */
+ 0x024 0x24 /* P8_13_pwm_pin */
+ >;
+ };
+
+ ehrpwm2_pins: pinmux_ehrpwm2_pins {
+ pinctrl-single,pins = <
+ 0x048 0x26 /* P9_14_pwm_pin */
+ 0x04c 0x26 /* P9_16_pwm_pin */
+ >;
+ };
+
+ eqep0_pins: pinmux_eqep0_pins {
+ pinctrl-single,pins = <
+ 0x1a0 0x21 /* P9_92_qep_pin */
+ 0x1a4 0x21 /* P9_27_qep_pin */
+ >;
+ };
+
+ eqep1_pins: pinmux_eqep1_pins {
+ pinctrl-single,pins = <
+ 0x0d4 0x22 /* P8_33_qep_pin */
+ 0x0d0 0x22 /* P8_35_qep_pin */
+ >;
+ };
+
+ eqep2_pins: pinmux_eqep2_pins {
+ pinctrl-single,pins = <
+ 0x030 0x24 /* P8_12_qep_pin */
+ 0x034 0x24 /* P8_11_qep_pin */
+ >;
+ };
+
+ spi1_pins: pinmux_spi1_pins {
+ pinctrl-single,pins = <
+ 0x190 0x23 /* spi1_sclk */
+ 0x194 0x23 /* spi1_d0 */
+ 0x198 0x23 /* spi1_d1 */
+ 0x144 ( PIN_OUTPUT | MUX_MODE2 ) /* spi1_cs0 */
+ 0x164 ( PIN_OUTPUT | MUX_MODE2 ) /* spi1_cs1 */
+ >;
+ };
};
&uart0 {
@@ -281,12 +500,12 @@
status = "okay";
};
-&uart4 {
- pinctrl-names = "default";
- pinctrl-0 = <&uart4_pins>;
-
- status = "okay";
-};
+//&uart4 {
+// pinctrl-names = "default";
+// pinctrl-0 = <&uart4_pins>;
+//
+// status = "okay";
+//};
&uart5 {
pinctrl-names = "default";
@@ -384,6 +603,8 @@
interrupts = <7>; /* NMI */
interrupt-parent = <&intc>;
+ ti,pmic-shutdown-controller;
+
charger {
interrupts = <0>, <1>;
interrupt-names = "USB", "AC";
@@ -484,22 +705,23 @@
};
};
-&tscadc {
- status = "okay";
- adc {
- ti,adc-channels = <0 1 2 3 4 5 6 7>;
- };
-};
+//&tscadc {
+// status = "okay";
+// adc {
+// ti,adc-channels = <0 1 2 3 4 5 6 7>;
+// };
+//};
&uart3 {
pinctrl-names = "default";
- pinctrl-0 = <&uart3_pins &bt_pins>;
+ //pinctrl-0 = <&uart3_pins &bt_pins>;
+ pinctrl-0 = <&uart3_pins>;
status = "okay";
- bluetooth {
- compatible = "ti,wl1835-st";
- enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
- };
+// bluetooth {
+// compatible = "ti,wl1835-st";
+// enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
+// };
};
&aes {
@@ -512,8 +734,10 @@
&rtc {
system-power-controller;
- clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
- clock-names = "ext-clk", "int-clk";
+};
+
+&wkup_m3_ipc {
+ ti,scale-data-fw = "am335x-bone-scale-data.bin";
};
&dcan1 {
@@ -530,3 +754,217 @@
line-name = "LS_BUF_EN";
};
};
+
+&ocp {
+ /* activate the static pinmux helper list of pin modes above */
+ test_helper: helper {
+ compatible = "bone-pinmux-helper";
+ pinctrl-names = "default";
+ pinctrl-0 = <&mux_helper_pins>;
+
+ status = "okay";
+ };
+
+ /* Encoder 4 (U13) */
+ P8_15_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "pruin_pu", "gpio", "gpio_pu", "gpio_pd", "pruin", "qep", "pruecapin_pu";
+ pinctrl-0 = <&P8_15_pruin_pu_pin>;
+ pinctrl-1 = <&P8_15_pruin_pu_pin>;
+ pinctrl-2 = <&P8_15_gpio_pin>;
+ pinctrl-3 = <&P8_15_gpio_pu_pin>;
+ pinctrl-4 = <&P8_15_gpio_pd_pin>;
+ pinctrl-5 = <&P8_15_pruin_pin>;
+ pinctrl-6 = <&P8_15_qep_pin>;
+ pinctrl-7 = <&P8_15_pruecapin_pu_pin>;
+ };
+
+ /* UART4 RX DSM */
+ P9_11_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "uart", "gpio", "gpio_pu", "gpio_pd";
+ pinctrl-0 = <&P9_11_uart_pin>;
+ pinctrl-1 = <&P9_11_uart_pin>;
+ pinctrl-2 = <&P9_11_gpio_pin>;
+ pinctrl-3 = <&P9_11_gpio_pu_pin>;
+ pinctrl-4 = <&P9_11_gpio_pd_pin>;
+ };
+
+ /* U16 BLUE_GP0_PIN_3 gpio 1_25*/
+ U16_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
+ pinctrl-0 = <&U16_default_pin>;
+ pinctrl-1 = <&U16_gpio_pin>;
+ pinctrl-2 = <&U16_gpio_pu_pin>;
+ pinctrl-3 = <&U16_gpio_pd_pin>;
+ };
+
+
+ /* BLUE_GP0_PIN_3 gpio1_17*/
+ P9_23_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm";
+ pinctrl-0 = <&P9_23_default_pin>;
+ pinctrl-1 = <&P9_23_gpio_pin>;
+ pinctrl-2 = <&P9_23_gpio_pu_pin>;
+ pinctrl-3 = <&P9_23_gpio_pd_pin>;
+ pinctrl-4 = <&P9_23_pwm_pin>;
+ };
+
+ /* BLUE_GP0_PIN_5 gpio3_20 */
+ D13_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
+ pinctrl-0 = <&D13_default_pin>;
+ pinctrl-1 = <&D13_gpio_pin>;
+ pinctrl-2 = <&D13_gpio_pu_pin>;
+ pinctrl-3 = <&D13_gpio_pd_pin>;
+ };
+
+ /* BLUE_GP0_PIN_6 gpio3_17 */
+ P9_28_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "pwm", "spi", "pwm2", "pruout", "pruin";
+ pinctrl-0 = <&P9_28_default_pin>;
+ pinctrl-1 = <&P9_28_gpio_pin>;
+ pinctrl-2 = <&P9_28_gpio_pu_pin>;
+ pinctrl-3 = <&P9_28_gpio_pd_pin>;
+ pinctrl-4 = <&P9_28_pwm_pin>;
+ pinctrl-5 = <&P9_28_spi_pin>;
+ pinctrl-6 = <&P9_28_pwm2_pin>;
+ pinctrl-7 = <&P9_28_pruout_pin>;
+ pinctrl-8 = <&P9_28_pruin_pin>;
+ };
+
+ /* BLUE_GP1_PIN_3 gpio3_2 */
+ J15_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
+ pinctrl-0 = <&J15_default_pin>;
+ pinctrl-1 = <&J15_gpio_pin>;
+ pinctrl-2 = <&J15_gpio_pu_pin>;
+ pinctrl-3 = <&J15_gpio_pd_pin>;
+ };
+
+ /* BLUE_GP1_PIN_4 gpio3_1 */
+ H17_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd";
+ pinctrl-0 = <&H17_default_pin>;
+ pinctrl-1 = <&H17_gpio_pin>;
+ pinctrl-2 = <&H17_gpio_pu_pin>;
+ pinctrl-3 = <&H17_gpio_pd_pin>;
+ };
+};
+
+/*******************************************************************************
+* PWMSS
+*******************************************************************************/
+&epwmss0 {
+ status = "okay";
+};
+
+&epwmss1 {
+ status = "okay";
+};
+
+&epwmss2 {
+ status = "okay";
+};
+
+&ehrpwm0 {
+ status = "okay";
+};
+
+&ehrpwm1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ehrpwm1_pins>;
+ status = "okay";
+};
+
+&ehrpwm2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&ehrpwm2_pins>;
+ status = "okay";
+};
+
+/*******************************************************************************
+* EQEP
+*******************************************************************************/
+&eqep0 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&eqep0_pins>;
+
+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
+ invert_qa = <1>; /* Should we invert the channel A input? */
+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
+ invert_qi = <0>; /* Should we invert the index input? */
+ invert_qs = <0>; /* Should we invert the strobe input? */
+ status = "okay";
+};
+
+&eqep1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&eqep1_pins>;
+
+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
+ invert_qa = <1>; /* Should we invert the channel A input? */
+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
+ invert_qi = <0>; /* Should we invert the index input? */
+ invert_qs = <0>; /* Should we invert the strobe input? */
+ status = "okay";
+};
+
+&eqep2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&eqep2_pins>;
+
+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
+ invert_qa = <1>; /* Should we invert the channel A input? */
+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
+ invert_qi = <0>; /* Should we invert the index input? */
+ invert_qs = <0>; /* Should we invert the strobe input? */
+ status = "okay";
+};
+
+/*******************************************************************************
+ SPI
+*******************************************************************************/
+&spi1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi1_pins>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "spidev";
+ symlink = "spi/1.0";
+ reg = <0>;
+ spi-max-frequency = <24000000>;
+ };
+
+ channel@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "spidev";
+ symlink = "spi/1.1";
+ reg = <1>;
+ spi-max-frequency = <24000000>;
+ };
+};
diff --git b/arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi b/arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi
new file mode 100644
index 0000000..455a8fa
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bonegreen-wireless-common-univ.dtsi
@@ -0,0 +1,2797 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+&am33xx_pinmux {
+ /************************/
+ /* P8 Header */
+ /************************/
+
+ /* P8_01 GND */
+
+ /* P8_02 GND */
+
+
+ /* P8_03 (ZCZ ball R9) emmc */
+ P8_03_default_pin: pinmux_P8_03_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03_gpio_pin: pinmux_P8_03_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03_gpio_pu_pin: pinmux_P8_03_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03_gpio_pd_pin: pinmux_P8_03_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+ P8_03_gpio_input_pin: pinmux_P8_03_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0818, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad6.gpio1_6 */
+
+ /* P8_04 (ZCZ ball T9) emmc */
+ P8_04_default_pin: pinmux_P8_04_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04_gpio_pin: pinmux_P8_04_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04_gpio_pu_pin: pinmux_P8_04_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04_gpio_pd_pin: pinmux_P8_04_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+ P8_04_gpio_input_pin: pinmux_P8_04_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x081c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad7.gpio1_7 */
+
+ /* P8_05 (ZCZ ball R8) emmc */
+ P8_05_default_pin: pinmux_P8_05_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05_gpio_pin: pinmux_P8_05_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05_gpio_pu_pin: pinmux_P8_05_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05_gpio_pd_pin: pinmux_P8_05_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+ P8_05_gpio_input_pin: pinmux_P8_05_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0808, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad2.gpio1_2 */
+
+ /* P8_06 (ZCZ ball T8) emmc */
+ P8_06_default_pin: pinmux_P8_06_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06_gpio_pin: pinmux_P8_06_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06_gpio_pu_pin: pinmux_P8_06_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06_gpio_pd_pin: pinmux_P8_06_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+ P8_06_gpio_input_pin: pinmux_P8_06_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x080c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad3.gpio1_3 */
+
+ /* P8_07 (ZCZ ball R7) gpio2_2 */
+ P8_07_default_pin: pinmux_P8_07_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_gpio_pin: pinmux_P8_07_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_gpio_pu_pin: pinmux_P8_07_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_gpio_pd_pin: pinmux_P8_07_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_gpio_input_pin: pinmux_P8_07_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_advn_ale.gpio2_2 */
+ P8_07_timer_pin: pinmux_P8_07_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0890, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_advn_ale.timer4 */
+
+ /* P8_08 (ZCZ ball T7) gpio2_3 */
+ P8_08_default_pin: pinmux_P8_08_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_gpio_pin: pinmux_P8_08_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_gpio_pu_pin: pinmux_P8_08_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_gpio_pd_pin: pinmux_P8_08_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_gpio_input_pin: pinmux_P8_08_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_oen_ren.gpio2_3 */
+ P8_08_timer_pin: pinmux_P8_08_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0894, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_oen_ren.timer7 */
+
+ /* P8_09 (ZCZ ball T6) gpio2_5 */
+ P8_09_default_pin: pinmux_P8_09_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_gpio_pin: pinmux_P8_09_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_gpio_pu_pin: pinmux_P8_09_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_gpio_pd_pin: pinmux_P8_09_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_gpio_input_pin: pinmux_P8_09_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be0n_cle.gpio2_5 */
+ P8_09_timer_pin: pinmux_P8_09_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x089c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_be0n_cle.timer5 */
+
+ /* P8_10 (ZCZ ball U6) gpio2_4 */
+ P8_10_default_pin: pinmux_P8_10_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_gpio_pin: pinmux_P8_10_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_gpio_pu_pin: pinmux_P8_10_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_gpio_pd_pin: pinmux_P8_10_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_gpio_input_pin: pinmux_P8_10_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wen.gpio2_4 */
+ P8_10_timer_pin: pinmux_P8_10_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0898, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* gpmc_wen.timer6 */
+
+ /* P8_11 (ZCZ ball R12) gpio1_13 */
+ P8_11_default_pin: pinmux_P8_11_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_gpio_pin: pinmux_P8_11_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_gpio_pu_pin: pinmux_P8_11_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_gpio_pd_pin: pinmux_P8_11_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_gpio_input_pin: pinmux_P8_11_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P8_11_qep_pin: pinmux_P8_11_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad13.eqep2b_in */
+ P8_11_pruout_pin: pinmux_P8_11_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad13.pru0_out15 */
+
+ /* P8_12 (ZCZ ball T12) gpio1_12 */
+ P8_12_default_pin: pinmux_P8_12_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_gpio_pin: pinmux_P8_12_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_gpio_pu_pin: pinmux_P8_12_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_gpio_pd_pin: pinmux_P8_12_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_gpio_input_pin: pinmux_P8_12_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P8_12_qep_pin: pinmux_P8_12_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad12.eqep2a_in */
+ P8_12_pruout_pin: pinmux_P8_12_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad12.pru0_out14 */
+
+ /* P8_13 (ZCZ ball T10) gpio0_23 */
+ P8_13_default_pin: pinmux_P8_13_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_gpio_pin: pinmux_P8_13_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_gpio_pu_pin: pinmux_P8_13_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_gpio_pd_pin: pinmux_P8_13_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_gpio_input_pin: pinmux_P8_13_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P8_13_pwm_pin: pinmux_P8_13_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad9.ehrpwm2b */
+
+ /* P8_14 (ZCZ ball T11) wl1835: wl_en */
+
+ /* P8_15 (ZCZ ball U13) gpio1_15 */
+ P8_15_default_pin: pinmux_P8_15_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_gpio_pin: pinmux_P8_15_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_gpio_pu_pin: pinmux_P8_15_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_gpio_pd_pin: pinmux_P8_15_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_gpio_input_pin: pinmux_P8_15_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P8_15_qep_pin: pinmux_P8_15_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad15.eqep2_strobe */
+ P8_15_pru_ecap_pin: pinmux_P8_15_pru_ecap_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_ad15.pr1_ecap0_ecap_capin_apwm_o */
+ P8_15_pruin_pin: pinmux_P8_15_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad15.pru0_in15 */
+
+ /* P8_16 (ZCZ ball V13) gpio1_14 */
+ P8_16_default_pin: pinmux_P8_16_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_gpio_pin: pinmux_P8_16_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_gpio_pu_pin: pinmux_P8_16_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_gpio_pd_pin: pinmux_P8_16_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_gpio_input_pin: pinmux_P8_16_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P8_16_qep_pin: pinmux_P8_16_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad14.eqep2_index */
+ P8_16_pruin_pin: pinmux_P8_16_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad14.pru0_in14 */
+
+ /* P8_17 (ZCZ ball U12) wl1835: wl_irq */
+
+ /* P8_18 (ZCZ ball V12) gpio2_1 */
+ P8_18_default_pin: pinmux_P8_18_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18_gpio_pin: pinmux_P8_18_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18_gpio_pu_pin: pinmux_P8_18_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18_gpio_pd_pin: pinmux_P8_18_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P8_18_gpio_input_pin: pinmux_P8_18_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+
+ /* P8_19 (ZCZ ball U10) gpio0_22 */
+ P8_19_default_pin: pinmux_P8_19_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_gpio_pin: pinmux_P8_19_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_gpio_pu_pin: pinmux_P8_19_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_gpio_pd_pin: pinmux_P8_19_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_gpio_input_pin: pinmux_P8_19_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad8.gpio0_22 */
+ P8_19_pwm_pin: pinmux_P8_19_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0820, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad8.ehrpwm2a */
+
+ /* P8_20 (ZCZ ball V9) emmc */
+ P8_20_default_pin: pinmux_P8_20_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_gpio_pin: pinmux_P8_20_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_gpio_pu_pin: pinmux_P8_20_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_gpio_pd_pin: pinmux_P8_20_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_gpio_input_pin: pinmux_P8_20_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn2.gpio1_31 */
+ P8_20_pruout_pin: pinmux_P8_20_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_csn2.pru1_out13 */
+ P8_20_pruin_pin: pinmux_P8_20_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0884, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_csn2.pru1_in13 */
+
+ /* P8_21 (ZCZ ball U9) emmc */
+ P8_21_default_pin: pinmux_P8_21_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_gpio_pin: pinmux_P8_21_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_gpio_pu_pin: pinmux_P8_21_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_gpio_pd_pin: pinmux_P8_21_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_gpio_input_pin: pinmux_P8_21_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn1.gpio1_30 */
+ P8_21_pruout_pin: pinmux_P8_21_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_csn1.pru1_out12 */
+ P8_21_pruin_pin: pinmux_P8_21_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0880, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_csn1.pru1_in12 */
+
+ /* P8_22 (ZCZ ball V8) emmc */
+ P8_22_default_pin: pinmux_P8_22_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22_gpio_pin: pinmux_P8_22_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22_gpio_pu_pin: pinmux_P8_22_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22_gpio_pd_pin: pinmux_P8_22_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+ P8_22_gpio_input_pin: pinmux_P8_22_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0814, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad5.gpio1_5 */
+
+ /* P8_23 (ZCZ ball U8) emmc */
+ P8_23_default_pin: pinmux_P8_23_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23_gpio_pin: pinmux_P8_23_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23_gpio_pu_pin: pinmux_P8_23_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23_gpio_pd_pin: pinmux_P8_23_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+ P8_23_gpio_input_pin: pinmux_P8_23_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0810, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad4.gpio1_4 */
+
+ /* P8_24 (ZCZ ball V7) emmc */
+ P8_24_default_pin: pinmux_P8_24_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24_gpio_pin: pinmux_P8_24_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24_gpio_pu_pin: pinmux_P8_24_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24_gpio_pd_pin: pinmux_P8_24_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+ P8_24_gpio_input_pin: pinmux_P8_24_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0804, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad1.gpio1_1 */
+
+ /* P8_25 (ZCZ ball U7) emmc */
+ P8_25_default_pin: pinmux_P8_25_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25_gpio_pin: pinmux_P8_25_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25_gpio_pu_pin: pinmux_P8_25_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25_gpio_pd_pin: pinmux_P8_25_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+ P8_25_gpio_input_pin: pinmux_P8_25_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0800, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad0.gpio1_0 */
+
+ /* P8_26 (ZCZ ball V6) gpio-hog wl1835 */
+
+ /* P8_27 (ZCZ ball U5) hdmi */
+ P8_27_default_pin: pinmux_P8_27_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_gpio_pin: pinmux_P8_27_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_gpio_pu_pin: pinmux_P8_27_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_gpio_pd_pin: pinmux_P8_27_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_gpio_input_pin: pinmux_P8_27_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P8_27_pruout_pin: pinmux_P8_27_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_vsync.pru1_out8 */
+ P8_27_pruin_pin: pinmux_P8_27_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_vsync.pru1_in8 */
+
+ /* P8_28 (ZCZ ball V5) hdmi */
+ P8_28_default_pin: pinmux_P8_28_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_gpio_pin: pinmux_P8_28_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_gpio_pu_pin: pinmux_P8_28_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_gpio_pd_pin: pinmux_P8_28_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_gpio_input_pin: pinmux_P8_28_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P8_28_pruout_pin: pinmux_P8_28_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_pclk.pru1_out10 */
+ P8_28_pruin_pin: pinmux_P8_28_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_pclk.pru1_in10 */
+
+ /* P8_29 (ZCZ ball R5) hdmi */
+ P8_29_default_pin: pinmux_P8_29_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_gpio_pin: pinmux_P8_29_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_gpio_pu_pin: pinmux_P8_29_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_gpio_pd_pin: pinmux_P8_29_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_gpio_input_pin: pinmux_P8_29_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P8_29_pruout_pin: pinmux_P8_29_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_hsync.pru1_out9 */
+ P8_29_pruin_pin: pinmux_P8_29_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_hsync.pru1_in9 */
+
+ /* P8_30 (ZCZ ball R6) hdmi */
+ P8_30_default_pin: pinmux_P8_30_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_gpio_pin: pinmux_P8_30_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_gpio_pu_pin: pinmux_P8_30_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_gpio_pd_pin: pinmux_P8_30_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_gpio_input_pin: pinmux_P8_30_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P8_30_pruout_pin: pinmux_P8_30_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_ac_bias_en.pru1_out11 */
+ P8_30_pruin_pin: pinmux_P8_30_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE6) >; }; /* lcd_ac_bias_en.pru1_in11 */
+
+ /* P8_31 (ZCZ ball V4) hdmi */
+ P8_31_default_pin: pinmux_P8_31_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_gpio_pin: pinmux_P8_31_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_gpio_pu_pin: pinmux_P8_31_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_gpio_pd_pin: pinmux_P8_31_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_gpio_input_pin: pinmux_P8_31_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data14.gpio0_10 */
+ P8_31_qep_pin: pinmux_P8_31_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data14.eqep1_index */
+ P8_31_uart_pin: pinmux_P8_31_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data14.uart5_rxd */
+
+ /* P8_32 (ZCZ ball T5) hdmi */
+ P8_32_default_pin: pinmux_P8_32_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_gpio_pin: pinmux_P8_32_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_gpio_pu_pin: pinmux_P8_32_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_gpio_pd_pin: pinmux_P8_32_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_gpio_input_pin: pinmux_P8_32_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data15.gpio0_11 */
+ P8_32_qep_pin: pinmux_P8_32_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08dc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data15.eqep1_strobe */
+
+ /* P8_33 (ZCZ ball V3) hdmi */
+ P8_33_default_pin: pinmux_P8_33_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_gpio_pin: pinmux_P8_33_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_gpio_pu_pin: pinmux_P8_33_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_gpio_pd_pin: pinmux_P8_33_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_gpio_input_pin: pinmux_P8_33_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data13.gpio0_9 */
+ P8_33_qep_pin: pinmux_P8_33_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data13.eqep1b_in */
+
+ /* P8_34 (ZCZ ball U4) hdmi */
+ P8_34_default_pin: pinmux_P8_34_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_gpio_pin: pinmux_P8_34_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_gpio_pu_pin: pinmux_P8_34_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_gpio_pd_pin: pinmux_P8_34_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_gpio_input_pin: pinmux_P8_34_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data11.gpio2_17 */
+ P8_34_pwm_pin: pinmux_P8_34_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08cc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data11.ehrpwm1b */
+
+ /* P8_35 (ZCZ ball V2) hdmi */
+ P8_35_default_pin: pinmux_P8_35_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_gpio_pin: pinmux_P8_35_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_gpio_pu_pin: pinmux_P8_35_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_gpio_pd_pin: pinmux_P8_35_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_gpio_input_pin: pinmux_P8_35_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data12.gpio0_8 */
+ P8_35_qep_pin: pinmux_P8_35_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08d0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* lcd_data12.eqep1a_in */
+
+ /* P8_36 (ZCZ ball U3) hdmi */
+ P8_36_default_pin: pinmux_P8_36_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_gpio_pin: pinmux_P8_36_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_gpio_pu_pin: pinmux_P8_36_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_gpio_pd_pin: pinmux_P8_36_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_gpio_input_pin: pinmux_P8_36_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data10.gpio2_16 */
+ P8_36_pwm_pin: pinmux_P8_36_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data10.ehrpwm1a */
+
+ /* P8_37 (ZCZ ball U1) hdmi */
+ P8_37_default_pin: pinmux_P8_37_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_gpio_pin: pinmux_P8_37_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_gpio_pu_pin: pinmux_P8_37_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_gpio_pd_pin: pinmux_P8_37_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_gpio_input_pin: pinmux_P8_37_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data8.gpio2_14 */
+ P8_37_pwm_pin: pinmux_P8_37_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data8.ehrpwm1_tripzone_input */
+ P8_37_uart_pin: pinmux_P8_37_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data8.uart5_txd */
+
+ /* P8_38 (ZCZ ball U2) hdmi */
+ P8_38_default_pin: pinmux_P8_38_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_gpio_pin: pinmux_P8_38_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_gpio_pu_pin: pinmux_P8_38_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_gpio_pd_pin: pinmux_P8_38_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_gpio_input_pin: pinmux_P8_38_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data9.gpio2_15 */
+ P8_38_pwm_pin: pinmux_P8_38_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE2) >; }; /* lcd_data9.ehrpwm0_synco */
+ P8_38_uart_pin: pinmux_P8_38_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08c4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* lcd_data9.uart5_rxd */
+
+ /* P8_39 (ZCZ ball T3) hdmi */
+ P8_39_default_pin: pinmux_P8_39_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_gpio_pin: pinmux_P8_39_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_gpio_pu_pin: pinmux_P8_39_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_gpio_pd_pin: pinmux_P8_39_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_gpio_input_pin: pinmux_P8_39_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data6.gpio2_12 */
+ P8_39_qep_pin: pinmux_P8_39_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data6.eqep2_index */
+ P8_39_pruout_pin: pinmux_P8_39_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data6.pru1_out6 */
+ P8_39_pruin_pin: pinmux_P8_39_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data6.pru1_in6 */
+
+ /* P8_40 (ZCZ ball T4) hdmi */
+ P8_40_default_pin: pinmux_P8_40_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_gpio_pin: pinmux_P8_40_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_gpio_pu_pin: pinmux_P8_40_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_gpio_pd_pin: pinmux_P8_40_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_gpio_input_pin: pinmux_P8_40_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data7.gpio2_13 */
+ P8_40_qep_pin: pinmux_P8_40_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data7.eqep2_strobe */
+ P8_40_pruout_pin: pinmux_P8_40_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data7.pru1_out7 */
+ P8_40_pruin_pin: pinmux_P8_40_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08bc, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data7.pru1_in7 */
+
+ /* P8_41 (ZCZ ball T1) hdmi */
+ P8_41_default_pin: pinmux_P8_41_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_gpio_pin: pinmux_P8_41_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_gpio_pu_pin: pinmux_P8_41_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_gpio_pd_pin: pinmux_P8_41_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_gpio_input_pin: pinmux_P8_41_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data4.gpio2_10 */
+ P8_41_qep_pin: pinmux_P8_41_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data4.eqep2a_in */
+ P8_41_pruout_pin: pinmux_P8_41_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data4.pru1_out4 */
+ P8_41_pruin_pin: pinmux_P8_41_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data4.pru1_in4 */
+
+ /* P8_42 (ZCZ ball T2) hdmi */
+ P8_42_default_pin: pinmux_P8_42_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_gpio_pin: pinmux_P8_42_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_gpio_pu_pin: pinmux_P8_42_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_gpio_pd_pin: pinmux_P8_42_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_gpio_input_pin: pinmux_P8_42_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data5.gpio2_11 */
+ P8_42_qep_pin: pinmux_P8_42_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* lcd_data5.eqep2b_in */
+ P8_42_pruout_pin: pinmux_P8_42_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data5.pru1_out5 */
+ P8_42_pruin_pin: pinmux_P8_42_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08b4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data5.pru1_in5 */
+
+ /* P8_43 (ZCZ ball R3) hdmi */
+ P8_43_default_pin: pinmux_P8_43_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_gpio_pin: pinmux_P8_43_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_gpio_pu_pin: pinmux_P8_43_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_gpio_pd_pin: pinmux_P8_43_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_gpio_input_pin: pinmux_P8_43_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data2.gpio2_8 */
+ P8_43_pwm_pin: pinmux_P8_43_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data2.ehrpwm2_tripzone_input */
+ P8_43_pruout_pin: pinmux_P8_43_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data2.pru1_out2 */
+ P8_43_pruin_pin: pinmux_P8_43_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data2.pru1_in2 */
+
+ /* P8_44 (ZCZ ball R4) hdmi */
+ P8_44_default_pin: pinmux_P8_44_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_gpio_pin: pinmux_P8_44_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_gpio_pu_pin: pinmux_P8_44_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_gpio_pd_pin: pinmux_P8_44_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_gpio_input_pin: pinmux_P8_44_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data3.gpio2_9 */
+ P8_44_pwm_pin: pinmux_P8_44_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data3.ehrpwm0_synco */
+ P8_44_pruout_pin: pinmux_P8_44_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data3.pru1_out3 */
+ P8_44_pruin_pin: pinmux_P8_44_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ac, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data3.pru1_in3 */
+
+ /* P8_45 (ZCZ ball R1) hdmi */
+ P8_45_default_pin: pinmux_P8_45_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_gpio_pin: pinmux_P8_45_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_gpio_pu_pin: pinmux_P8_45_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_gpio_pd_pin: pinmux_P8_45_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_gpio_input_pin: pinmux_P8_45_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data0.gpio2_6 */
+ P8_45_pwm_pin: pinmux_P8_45_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data0.ehrpwm2a */
+ P8_45_pruout_pin: pinmux_P8_45_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data0.pru1_out0 */
+ P8_45_pruin_pin: pinmux_P8_45_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data0.pru1_in0 */
+
+ /* P8_46 (ZCZ ball R2) hdmi */
+ P8_46_default_pin: pinmux_P8_46_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_gpio_pin: pinmux_P8_46_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_gpio_pu_pin: pinmux_P8_46_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_gpio_pd_pin: pinmux_P8_46_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_gpio_input_pin: pinmux_P8_46_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_data1.gpio2_7 */
+ P8_46_pwm_pin: pinmux_P8_46_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* lcd_data1.ehrpwm2b */
+ P8_46_pruout_pin: pinmux_P8_46_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_data1.pru1_out1 */
+ P8_46_pruin_pin: pinmux_P8_46_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08a4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_data1.pru1_in1 */
+
+ /************************/
+ /* P9 Header */
+ /************************/
+
+ /* P9_01 GND */
+
+ /* P9_02 GND */
+
+ /* P9_03 3V3 */
+
+ /* P9_04 3V3 */
+
+ /* P9_05 VDD_5V */
+
+ /* P9_06 VDD_5V */
+
+ /* P9_07 SYS_5V */
+
+ /* P9_08 SYS_5V */
+
+ /* P9_09 PWR_BUT */
+
+ /* P9_10 RSTn */
+
+ /* P9_11 (ZCZ ball T17) gpio0_30 */
+ P9_11_default_pin: pinmux_P9_11_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_gpio_pin: pinmux_P9_11_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_gpio_pu_pin: pinmux_P9_11_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_gpio_pd_pin: pinmux_P9_11_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_gpio_input_pin: pinmux_P9_11_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P9_11_uart_pin: pinmux_P9_11_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wait0.uart4_rxd */
+
+ /* P9_12 (ZCZ ball U18) gpio1_28 */
+ P9_12_default_pin: pinmux_P9_12_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12_gpio_pin: pinmux_P9_12_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12_gpio_pu_pin: pinmux_P9_12_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12_gpio_pd_pin: pinmux_P9_12_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P9_12_gpio_input_pin: pinmux_P9_12_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+
+ /* P9_13 (ZCZ ball U17) gpio0_31 */
+ P9_13_default_pin: pinmux_P9_13_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_gpio_pin: pinmux_P9_13_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_gpio_pu_pin: pinmux_P9_13_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_gpio_pd_pin: pinmux_P9_13_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_gpio_input_pin: pinmux_P9_13_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P9_13_uart_pin: pinmux_P9_13_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wpn.uart4_txd */
+
+ /* P9_14 (ZCZ ball U14) gpio1_18 */
+ P9_14_default_pin: pinmux_P9_14_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_gpio_pin: pinmux_P9_14_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_gpio_pu_pin: pinmux_P9_14_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_gpio_pd_pin: pinmux_P9_14_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_gpio_input_pin: pinmux_P9_14_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P9_14_pwm_pin: pinmux_P9_14_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a2.ehrpwm1a */
+
+ /* P9_15 (ZCZ ball R13) gpio1_16 */
+ P9_15_default_pin: pinmux_P9_15_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_gpio_pin: pinmux_P9_15_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_gpio_pu_pin: pinmux_P9_15_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_gpio_pd_pin: pinmux_P9_15_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_gpio_input_pin: pinmux_P9_15_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a0.gpio1_16 */
+ P9_15_pwm_pin: pinmux_P9_15_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0840, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a0.ehrpwm1_tripzone_input */
+
+ /* P9_16 (ZCZ ball T14) gpio1_19 */
+ P9_16_default_pin: pinmux_P9_16_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_gpio_pin: pinmux_P9_16_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_gpio_pu_pin: pinmux_P9_16_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_gpio_pd_pin: pinmux_P9_16_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_gpio_input_pin: pinmux_P9_16_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a3.gpio1_19 */
+ P9_16_pwm_pin: pinmux_P9_16_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x084c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a3.ehrpwm1b */
+
+ /* P9_17 (ZCZ ball A16) gpio0_5 */
+ P9_17_default_pin: pinmux_P9_17_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_gpio_pin: pinmux_P9_17_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_gpio_pu_pin: pinmux_P9_17_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_gpio_pd_pin: pinmux_P9_17_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_gpio_input_pin: pinmux_P9_17_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_INPUT | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P9_17_spi_cs_pin: pinmux_P9_17_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_cs0.spi0_cs0 */
+ P9_17_i2c_pin: pinmux_P9_17_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_cs0.i2c1_scl */
+ P9_17_pwm_pin: pinmux_P9_17_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_cs0.ehrpwm0_synci */
+ P9_17_pru_uart_pin: pinmux_P9_17_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_cs0.pr1_uart0_txd */
+
+ /* P9_18 (ZCZ ball B16) gpio0_4 */
+ P9_18_default_pin: pinmux_P9_18_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_gpio_pin: pinmux_P9_18_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_gpio_pu_pin: pinmux_P9_18_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_gpio_pd_pin: pinmux_P9_18_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_gpio_input_pin: pinmux_P9_18_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P9_18_spi_pin: pinmux_P9_18_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d1.spi0_d1 */
+ P9_18_i2c_pin: pinmux_P9_18_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d1.i2c1_sda */
+ P9_18_pwm_pin: pinmux_P9_18_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d1.ehrpwm0_tripzone_input */
+ P9_18_pru_uart_pin: pinmux_P9_18_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d1.pr1_uart0_rxd */
+
+ /* P9_19 (ZCZ ball D17) i2c2_scl */
+ P9_19_default_pin: pinmux_P9_19_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
+ P9_19_gpio_pin: pinmux_P9_19_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_gpio_pu_pin: pinmux_P9_19_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_gpio_pd_pin: pinmux_P9_19_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_gpio_input_pin: pinmux_P9_19_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P9_19_timer_pin: pinmux_P9_19_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart1_rtsn.timer5 */
+ P9_19_can_pin: pinmux_P9_19_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rtsn.dcan0_rx */
+ P9_19_i2c_pin: pinmux_P9_19_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
+ P9_19_spi_cs_pin: pinmux_P9_19_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_rtsn.spi1_cs1 */
+ P9_19_pru_uart_pin: pinmux_P9_19_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rtsn.pr1_uart0_rts_n */
+
+ /* P9_20 (ZCZ ball D18) i2c2_sda */
+ P9_20_default_pin: pinmux_P9_20_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
+ P9_20_gpio_pin: pinmux_P9_20_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_gpio_pu_pin: pinmux_P9_20_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_gpio_pd_pin: pinmux_P9_20_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_gpio_input_pin: pinmux_P9_20_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_INPUT | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P9_20_timer_pin: pinmux_P9_20_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart1_ctsn.timer6 */
+ P9_20_can_pin: pinmux_P9_20_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_ctsn.dcan0_tx */
+ P9_20_i2c_pin: pinmux_P9_20_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
+ P9_20_spi_cs_pin: pinmux_P9_20_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_ctsn.spi1_cs0 */
+ P9_20_pru_uart_pin: pinmux_P9_20_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_ctsn.pr1_uart0_cts_n */
+
+ /* P9_21 (ZCZ ball B17) gpio0_3 */
+ P9_21_default_pin: pinmux_P9_21_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_gpio_pin: pinmux_P9_21_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_gpio_pu_pin: pinmux_P9_21_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_gpio_pd_pin: pinmux_P9_21_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_gpio_input_pin: pinmux_P9_21_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P9_21_spi_pin: pinmux_P9_21_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d0.spi0_d0 */
+ P9_21_uart_pin: pinmux_P9_21_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_d0.uart2_txd */
+ P9_21_i2c_pin: pinmux_P9_21_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d0.i2c2_scl */
+ P9_21_pwm_pin: pinmux_P9_21_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d0.ehrpwm0b */
+ P9_21_pru_uart_pin: pinmux_P9_21_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d0.pr1_uart0_rts_n */
+
+ /* P9_22 (ZCZ ball A17) gpio0_2 */
+ P9_22_default_pin: pinmux_P9_22_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_gpio_pin: pinmux_P9_22_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_gpio_pu_pin: pinmux_P9_22_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_gpio_pd_pin: pinmux_P9_22_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_gpio_input_pin: pinmux_P9_22_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_INPUT | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P9_22_spi_sclk_pin: pinmux_P9_22_spi_sclk_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_sclk.spi0_sclk */
+ P9_22_uart_pin: pinmux_P9_22_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_sclk.uart2_rxd */
+ P9_22_i2c_pin: pinmux_P9_22_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_sclk.i2c2_sda */
+ P9_22_pwm_pin: pinmux_P9_22_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_sclk.ehrpwm0a */
+ P9_22_pru_uart_pin: pinmux_P9_22_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_sclk.pr1_uart0_cts_n */
+
+ /* P9_23 (ZCZ ball V14) gpio1_17 */
+ P9_23_default_pin: pinmux_P9_23_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_gpio_pin: pinmux_P9_23_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_gpio_pu_pin: pinmux_P9_23_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_gpio_pd_pin: pinmux_P9_23_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_gpio_input_pin: pinmux_P9_23_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a1.gpio1_17 */
+ P9_23_pwm_pin: pinmux_P9_23_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0844, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a1.ehrpwm0_synco */
+
+ /* P9_24 (ZCZ ball D15) gpio0_15 */
+ P9_24_default_pin: pinmux_P9_24_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_gpio_pin: pinmux_P9_24_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_gpio_pu_pin: pinmux_P9_24_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_gpio_pd_pin: pinmux_P9_24_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_gpio_input_pin: pinmux_P9_24_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P9_24_uart_pin: pinmux_P9_24_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_txd.uart1_txd */
+ P9_24_can_pin: pinmux_P9_24_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_txd.dcan1_rx */
+ P9_24_i2c_pin: pinmux_P9_24_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_txd.i2c1_scl */
+ P9_24_pru_uart_pin: pinmux_P9_24_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_txd.pr1_uart0_txd */
+ P9_24_pruin_pin: pinmux_P9_24_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE6) >; }; /* uart1_txd.pru0_in16 */
+
+ /* P9_25 (ZCZ ball A14) audio */
+ P9_25_default_pin: pinmux_P9_25_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_gpio_pin: pinmux_P9_25_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_gpio_pu_pin: pinmux_P9_25_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_gpio_pd_pin: pinmux_P9_25_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_gpio_input_pin: pinmux_P9_25_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P9_25_qep_pin: pinmux_P9_25_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkx.eqep0_strobe */
+ P9_25_pruout_pin: pinmux_P9_25_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkx.pru0_out7 */
+ P9_25_pruin_pin: pinmux_P9_25_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkx.pru0_in7 */
+
+ /* P9_26 (ZCZ ball D16) gpio0_14 */
+ P9_26_default_pin: pinmux_P9_26_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_gpio_pin: pinmux_P9_26_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_gpio_pu_pin: pinmux_P9_26_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_gpio_pd_pin: pinmux_P9_26_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_gpio_input_pin: pinmux_P9_26_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P9_26_uart_pin: pinmux_P9_26_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_rxd.uart1_rxd */
+ P9_26_can_pin: pinmux_P9_26_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rxd.dcan1_tx */
+ P9_26_i2c_pin: pinmux_P9_26_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rxd.i2c1_sda */
+ P9_26_pru_uart_pin: pinmux_P9_26_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rxd.pr1_uart0_rxd */
+ P9_26_pruin_pin: pinmux_P9_26_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE6) >; }; /* uart1_rxd.pru1_in16 */
+
+ /* P9_27 (ZCZ ball C13) gpio3_19 */
+ P9_27_default_pin: pinmux_P9_27_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_gpio_pin: pinmux_P9_27_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_gpio_pu_pin: pinmux_P9_27_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_gpio_pd_pin: pinmux_P9_27_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_gpio_input_pin: pinmux_P9_27_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P9_27_qep_pin: pinmux_P9_27_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsr.eqep0b_in */
+ P9_27_pruout_pin: pinmux_P9_27_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsr.pru0_out5 */
+ P9_27_pruin_pin: pinmux_P9_27_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsr.pru0_in5 */
+
+ /* P9_28 (ZCZ ball C12) audio */
+ P9_28_default_pin: pinmux_P9_28_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_gpio_pin: pinmux_P9_28_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_gpio_pu_pin: pinmux_P9_28_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_gpio_pd_pin: pinmux_P9_28_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_gpio_input_pin: pinmux_P9_28_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P9_28_pwm_pin: pinmux_P9_28_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkr.ehrpwm0_synci */
+ P9_28_spi_cs_pin: pinmux_P9_28_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_ahclkr.spi1_cs0 */
+ P9_28_pwm2_pin: pinmux_P9_28_pwm2_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* mcasp0_ahclkr.ecap2_in_pwm2_out */
+ P9_28_pruout_pin: pinmux_P9_28_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkr.pru0_out3 */
+ P9_28_pruin_pin: pinmux_P9_28_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkr.pru0_in3 */
+
+ /* P9_29 (ZCZ ball B13) audio */
+ P9_29_default_pin: pinmux_P9_29_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_gpio_pin: pinmux_P9_29_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_gpio_pu_pin: pinmux_P9_29_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_gpio_pd_pin: pinmux_P9_29_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_gpio_input_pin: pinmux_P9_29_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P9_29_pwm_pin: pinmux_P9_29_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsx.ehrpwm0b */
+ P9_29_spi_pin: pinmux_P9_29_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_fsx.spi1_d0 */
+ P9_29_pruout_pin: pinmux_P9_29_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsx.pru0_out1 */
+ P9_29_pruin_pin: pinmux_P9_29_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsx.pru0_in1 */
+
+ /* P9_30 (ZCZ ball D12) gpio-hog wl1835 */
+
+ /* P9_31 (ZCZ ball A13) audio */
+ P9_31_default_pin: pinmux_P9_31_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_gpio_pin: pinmux_P9_31_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_gpio_pu_pin: pinmux_P9_31_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_gpio_pd_pin: pinmux_P9_31_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_gpio_input_pin: pinmux_P9_31_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P9_31_pwm_pin: pinmux_P9_31_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkx.ehrpwm0a */
+ P9_31_spi_sclk_pin: pinmux_P9_31_spi_sclk_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_aclkx.spi1_sclk */
+ P9_31_pruout_pin: pinmux_P9_31_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkx.pru0_out0 */
+ P9_31_pruin_pin: pinmux_P9_31_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkx.pru0_in0 */
+
+ /* P9_32 VADC */
+
+ /* P9_33 (ZCZ ball C8) AIN4 */
+
+ /* P9_34 AGND */
+
+ /* P9_35 (ZCZ ball A8) AIN6 */
+
+ /* P9_36 (ZCZ ball B8) AIN5 */
+
+ /* P9_37 (ZCZ ball B7) AIN2 */
+
+ /* P9_38 (ZCZ ball A7) AIN3 */
+
+ /* P9_39 (ZCZ ball B6) AIN0 */
+
+ /* P9_40 (ZCZ ball C7) AIN1 */
+
+ /* P9_41 (ZCZ ball D14) gpio0_20 */
+ P9_41_default_pin: pinmux_P9_41_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_gpio_pin: pinmux_P9_41_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_gpio_pu_pin: pinmux_P9_41_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_gpio_pd_pin: pinmux_P9_41_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_gpio_input_pin: pinmux_P9_41_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P9_41_timer_pin: pinmux_P9_41_timer_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* xdma_event_intr1.timer7 */
+ P9_41_pruin_pin: pinmux_P9_41_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE5) >; }; /* xdma_event_intr1.pru0_in16 */
+
+ /* P9_41.1 */
+ /* P9_91 (ZCZ ball D13) gpio3_20 */
+ P9_91_default_pin: pinmux_P9_91_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_gpio_pin: pinmux_P9_91_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_gpio_pu_pin: pinmux_P9_91_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_gpio_pd_pin: pinmux_P9_91_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_gpio_input_pin: pinmux_P9_91_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P9_91_qep_pin: pinmux_P9_91_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr1.eqep0_index */
+ P9_91_pruout_pin: pinmux_P9_91_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr1.pru0_out6 */
+ P9_91_pruin_pin: pinmux_P9_91_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr1.pru0_in6 */
+
+ /* P9_42 (ZCZ ball C18) gpio0_7 */
+ P9_42_default_pin: pinmux_P9_42_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_gpio_pin: pinmux_P9_42_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_gpio_pu_pin: pinmux_P9_42_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_gpio_pd_pin: pinmux_P9_42_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_gpio_input_pin: pinmux_P9_42_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_INPUT | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P9_42_pwm_pin: pinmux_P9_42_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE0) >; }; /* eCAP0_in_PWM0_out.ecap0_in_pwm0_out */
+ P9_42_uart_pin: pinmux_P9_42_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* eCAP0_in_PWM0_out.uart3_txd */
+ P9_42_spi_cs_pin: pinmux_P9_42_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* eCAP0_in_PWM0_out.spi1_cs1 */
+ P9_42_pru_ecap_pin: pinmux_P9_42_pru_ecap_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* eCAP0_in_PWM0_out.pr1_ecap0_ecap_capin_apwm_o */
+ P9_42_spi_sclk_pin: pinmux_P9_42_spi_sclk_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* eCAP0_in_PWM0_out.spi1_sclk */
+
+ /* P9_42.1 */
+ /* P9_92 (ZCZ ball B12) gpio3_18 */
+ P9_92_default_pin: pinmux_P9_92_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_gpio_pin: pinmux_P9_92_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_gpio_pu_pin: pinmux_P9_92_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_gpio_pd_pin: pinmux_P9_92_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_gpio_input_pin: pinmux_P9_92_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P9_92_qep_pin: pinmux_P9_92_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkr.eqep0a_in */
+ P9_92_pruout_pin: pinmux_P9_92_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkr.pru0_out4 */
+ P9_92_pruin_pin: pinmux_P9_92_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkr.pru0_in4 */
+
+ /* P9_43 GND */
+
+ /* P9_44 GND */
+
+ /* P9_45 GND */
+
+ /* P9_46 GND */
+};
+
+&i2c1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ clock-frequency = <100000>;
+};
+
+&i2c2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ clock-frequency = <100000>;
+};
+
+&uart1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&uart2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&uart3 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&uart4 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&uart5 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&dcan0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&dcan1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&eqep0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
+ invert_qa = <1>; /* Should we invert the channel A input? */
+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
+ invert_qi = <0>; /* Should we invert the index input? */
+ invert_qs = <0>; /* Should we invert the strobe input? */
+};
+
+&eqep1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
+ invert_qa = <1>; /* Should we invert the channel A input? */
+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
+ invert_qi = <0>; /* Should we invert the index input? */
+ invert_qs = <0>; /* Should we invert the strobe input? */
+};
+
+&eqep2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ count_mode = <0>; /* 0 - Quadrature mode, normal 90 phase offset cha & chb. 1 - Direction mode. cha input = clock, chb input = direction */
+ swap_inputs = <0>; /* Are channel A and channel B swapped? (0 - no, 1 - yes) */
+ invert_qa = <1>; /* Should we invert the channel A input? */
+ invert_qb = <1>; /* Should we invert the channel B input? I invert these because my encoder outputs drive transistors that pull down the pins */
+ invert_qi = <0>; /* Should we invert the index input? */
+ invert_qs = <0>; /* Should we invert the strobe input? */
+};
+
+&epwmss0 {
+ status = "okay";
+};
+
+&epwmss1 {
+ status = "okay";
+};
+
+&epwmss2 {
+ status = "okay";
+};
+
+&ehrpwm0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ehrpwm1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ehrpwm2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ecap0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ecap1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ecap2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&spi0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+ symlink = "spi/0.0";
+
+ reg = <0>;
+ spi-max-frequency = <16000000>;
+ spi-cpha;
+ };
+
+ channel@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+ symlink = "spi/0.1";
+
+ reg = <1>;
+ spi-max-frequency = <16000000>;
+ };
+};
+
+&spi1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+ symlink = "spi/1.0";
+
+ reg = <0>;
+ spi-max-frequency = <16000000>;
+ spi-cpha;
+ };
+
+ channel@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ compatible = "spidev";
+ symlink = "spi/1.1";
+
+ reg = <1>;
+ spi-max-frequency = <16000000>;
+ };
+};
+
+/**********************************************************************/
+/* Pin Multiplex Helpers */
+/* */
+/* These provide userspace runtime pin configuration for the */
+/* BeagleBone cape expansion headers */
+/**********************************************************************/
+
+&ocp {
+ /************************/
+ /* P8 Header */
+ /************************/
+
+ /* P8_01 GND */
+
+ /* P8_02 GND */
+
+
+ /* P8_03 (ZCZ ball R9) emmc */
+ P8_03_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_03_default_pin>;
+ pinctrl-1 = <&P8_03_gpio_pin>;
+ pinctrl-2 = <&P8_03_gpio_pu_pin>;
+ pinctrl-3 = <&P8_03_gpio_pd_pin>;
+ pinctrl-4 = <&P8_03_gpio_input_pin>;
+ };
+
+ /* P8_04 (ZCZ ball T9) emmc */
+ P8_04_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_04_default_pin>;
+ pinctrl-1 = <&P8_04_gpio_pin>;
+ pinctrl-2 = <&P8_04_gpio_pu_pin>;
+ pinctrl-3 = <&P8_04_gpio_pd_pin>;
+ pinctrl-4 = <&P8_04_gpio_input_pin>;
+ };
+
+ /* P8_05 (ZCZ ball R8) emmc */
+ P8_05_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_05_default_pin>;
+ pinctrl-1 = <&P8_05_gpio_pin>;
+ pinctrl-2 = <&P8_05_gpio_pu_pin>;
+ pinctrl-3 = <&P8_05_gpio_pd_pin>;
+ pinctrl-4 = <&P8_05_gpio_input_pin>;
+ };
+
+ /* P8_06 (ZCZ ball T8) emmc */
+ P8_06_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_06_default_pin>;
+ pinctrl-1 = <&P8_06_gpio_pin>;
+ pinctrl-2 = <&P8_06_gpio_pu_pin>;
+ pinctrl-3 = <&P8_06_gpio_pd_pin>;
+ pinctrl-4 = <&P8_06_gpio_input_pin>;
+ };
+
+ /* P8_07 (ZCZ ball R7) */
+ P8_07_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_07_default_pin>;
+ pinctrl-1 = <&P8_07_gpio_pin>;
+ pinctrl-2 = <&P8_07_gpio_pu_pin>;
+ pinctrl-3 = <&P8_07_gpio_pd_pin>;
+ pinctrl-4 = <&P8_07_gpio_input_pin>;
+ pinctrl-5 = <&P8_07_timer_pin>;
+ };
+
+ /* P8_08 (ZCZ ball T7) */
+ P8_08_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_08_default_pin>;
+ pinctrl-1 = <&P8_08_gpio_pin>;
+ pinctrl-2 = <&P8_08_gpio_pu_pin>;
+ pinctrl-3 = <&P8_08_gpio_pd_pin>;
+ pinctrl-4 = <&P8_08_gpio_input_pin>;
+ pinctrl-5 = <&P8_08_timer_pin>;
+ };
+
+ /* P8_09 (ZCZ ball T6) */
+ P8_09_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_09_default_pin>;
+ pinctrl-1 = <&P8_09_gpio_pin>;
+ pinctrl-2 = <&P8_09_gpio_pu_pin>;
+ pinctrl-3 = <&P8_09_gpio_pd_pin>;
+ pinctrl-4 = <&P8_09_gpio_input_pin>;
+ pinctrl-5 = <&P8_09_timer_pin>;
+ };
+
+ /* P8_10 (ZCZ ball U6) */
+ P8_10_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer";
+ pinctrl-0 = <&P8_10_default_pin>;
+ pinctrl-1 = <&P8_10_gpio_pin>;
+ pinctrl-2 = <&P8_10_gpio_pu_pin>;
+ pinctrl-3 = <&P8_10_gpio_pd_pin>;
+ pinctrl-4 = <&P8_10_gpio_input_pin>;
+ pinctrl-5 = <&P8_10_timer_pin>;
+ };
+
+ /* P8_11 (ZCZ ball R12) */
+ P8_11_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
+ pinctrl-0 = <&P8_11_default_pin>;
+ pinctrl-1 = <&P8_11_gpio_pin>;
+ pinctrl-2 = <&P8_11_gpio_pu_pin>;
+ pinctrl-3 = <&P8_11_gpio_pd_pin>;
+ pinctrl-4 = <&P8_11_gpio_input_pin>;
+ pinctrl-5 = <&P8_11_qep_pin>;
+ pinctrl-6 = <&P8_11_pruout_pin>;
+ };
+
+ /* P8_12 (ZCZ ball T12) */
+ P8_12_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
+ pinctrl-0 = <&P8_12_default_pin>;
+ pinctrl-1 = <&P8_12_gpio_pin>;
+ pinctrl-2 = <&P8_12_gpio_pu_pin>;
+ pinctrl-3 = <&P8_12_gpio_pd_pin>;
+ pinctrl-4 = <&P8_12_gpio_input_pin>;
+ pinctrl-5 = <&P8_12_qep_pin>;
+ pinctrl-6 = <&P8_12_pruout_pin>;
+ };
+
+ /* P8_13 (ZCZ ball T10) */
+ P8_13_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_13_default_pin>;
+ pinctrl-1 = <&P8_13_gpio_pin>;
+ pinctrl-2 = <&P8_13_gpio_pu_pin>;
+ pinctrl-3 = <&P8_13_gpio_pd_pin>;
+ pinctrl-4 = <&P8_13_gpio_input_pin>;
+ pinctrl-5 = <&P8_13_pwm_pin>;
+ };
+
+ /* P8_14 (ZCZ ball T11) wl1835: wl_en */
+
+ /* P8_15 (ZCZ ball U13) */
+ P8_15_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pru_ecap", "pruin";
+ pinctrl-0 = <&P8_15_default_pin>;
+ pinctrl-1 = <&P8_15_gpio_pin>;
+ pinctrl-2 = <&P8_15_gpio_pu_pin>;
+ pinctrl-3 = <&P8_15_gpio_pd_pin>;
+ pinctrl-4 = <&P8_15_gpio_input_pin>;
+ pinctrl-5 = <&P8_15_qep_pin>;
+ pinctrl-6 = <&P8_15_pru_ecap_pin>;
+ pinctrl-7 = <&P8_15_pruin_pin>;
+ };
+
+ /* P8_16 (ZCZ ball V13) */
+ P8_16_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruin";
+ pinctrl-0 = <&P8_16_default_pin>;
+ pinctrl-1 = <&P8_16_gpio_pin>;
+ pinctrl-2 = <&P8_16_gpio_pu_pin>;
+ pinctrl-3 = <&P8_16_gpio_pd_pin>;
+ pinctrl-4 = <&P8_16_gpio_input_pin>;
+ pinctrl-5 = <&P8_16_qep_pin>;
+ pinctrl-6 = <&P8_16_pruin_pin>;
+ };
+
+ /* P8_17 (ZCZ ball U12) wl1835: wl_irq */
+
+ /* P8_18 (ZCZ ball V12) */
+ P8_18_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_18_default_pin>;
+ pinctrl-1 = <&P8_18_gpio_pin>;
+ pinctrl-2 = <&P8_18_gpio_pu_pin>;
+ pinctrl-3 = <&P8_18_gpio_pd_pin>;
+ pinctrl-4 = <&P8_18_gpio_input_pin>;
+ };
+
+ /* P8_19 (ZCZ ball U10) */
+ P8_19_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_19_default_pin>;
+ pinctrl-1 = <&P8_19_gpio_pin>;
+ pinctrl-2 = <&P8_19_gpio_pu_pin>;
+ pinctrl-3 = <&P8_19_gpio_pd_pin>;
+ pinctrl-4 = <&P8_19_gpio_input_pin>;
+ pinctrl-5 = <&P8_19_pwm_pin>;
+ };
+
+ /* P8_20 (ZCZ ball V9) emmc */
+ P8_20_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_20_default_pin>;
+ pinctrl-1 = <&P8_20_gpio_pin>;
+ pinctrl-2 = <&P8_20_gpio_pu_pin>;
+ pinctrl-3 = <&P8_20_gpio_pd_pin>;
+ pinctrl-4 = <&P8_20_gpio_input_pin>;
+ pinctrl-5 = <&P8_20_pruout_pin>;
+ pinctrl-6 = <&P8_20_pruin_pin>;
+ };
+
+ /* P8_21 (ZCZ ball U9) emmc */
+ P8_21_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_21_default_pin>;
+ pinctrl-1 = <&P8_21_gpio_pin>;
+ pinctrl-2 = <&P8_21_gpio_pu_pin>;
+ pinctrl-3 = <&P8_21_gpio_pd_pin>;
+ pinctrl-4 = <&P8_21_gpio_input_pin>;
+ pinctrl-5 = <&P8_21_pruout_pin>;
+ pinctrl-6 = <&P8_21_pruin_pin>;
+ };
+
+ /* P8_22 (ZCZ ball V8) emmc */
+ P8_22_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_22_default_pin>;
+ pinctrl-1 = <&P8_22_gpio_pin>;
+ pinctrl-2 = <&P8_22_gpio_pu_pin>;
+ pinctrl-3 = <&P8_22_gpio_pd_pin>;
+ pinctrl-4 = <&P8_22_gpio_input_pin>;
+ };
+
+ /* P8_23 (ZCZ ball U8) emmc */
+ P8_23_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_23_default_pin>;
+ pinctrl-1 = <&P8_23_gpio_pin>;
+ pinctrl-2 = <&P8_23_gpio_pu_pin>;
+ pinctrl-3 = <&P8_23_gpio_pd_pin>;
+ pinctrl-4 = <&P8_23_gpio_input_pin>;
+ };
+
+ /* P8_24 (ZCZ ball V7) emmc */
+ P8_24_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_24_default_pin>;
+ pinctrl-1 = <&P8_24_gpio_pin>;
+ pinctrl-2 = <&P8_24_gpio_pu_pin>;
+ pinctrl-3 = <&P8_24_gpio_pd_pin>;
+ pinctrl-4 = <&P8_24_gpio_input_pin>;
+ };
+
+ /* P8_25 (ZCZ ball U7) emmc */
+ P8_25_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P8_25_default_pin>;
+ pinctrl-1 = <&P8_25_gpio_pin>;
+ pinctrl-2 = <&P8_25_gpio_pu_pin>;
+ pinctrl-3 = <&P8_25_gpio_pd_pin>;
+ pinctrl-4 = <&P8_25_gpio_input_pin>;
+ };
+
+ /* P8_26 (ZCZ ball V6) gpio-hog wl1835 */
+
+ /* P8_27 (ZCZ ball U5) hdmi */
+ P8_27_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_27_default_pin>;
+ pinctrl-1 = <&P8_27_gpio_pin>;
+ pinctrl-2 = <&P8_27_gpio_pu_pin>;
+ pinctrl-3 = <&P8_27_gpio_pd_pin>;
+ pinctrl-4 = <&P8_27_gpio_input_pin>;
+ pinctrl-5 = <&P8_27_pruout_pin>;
+ pinctrl-6 = <&P8_27_pruin_pin>;
+ };
+
+ /* P8_28 (ZCZ ball V5) hdmi */
+ P8_28_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_28_default_pin>;
+ pinctrl-1 = <&P8_28_gpio_pin>;
+ pinctrl-2 = <&P8_28_gpio_pu_pin>;
+ pinctrl-3 = <&P8_28_gpio_pd_pin>;
+ pinctrl-4 = <&P8_28_gpio_input_pin>;
+ pinctrl-5 = <&P8_28_pruout_pin>;
+ pinctrl-6 = <&P8_28_pruin_pin>;
+ };
+
+ /* P8_29 (ZCZ ball R5) hdmi */
+ P8_29_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_29_default_pin>;
+ pinctrl-1 = <&P8_29_gpio_pin>;
+ pinctrl-2 = <&P8_29_gpio_pu_pin>;
+ pinctrl-3 = <&P8_29_gpio_pd_pin>;
+ pinctrl-4 = <&P8_29_gpio_input_pin>;
+ pinctrl-5 = <&P8_29_pruout_pin>;
+ pinctrl-6 = <&P8_29_pruin_pin>;
+ };
+
+ /* P8_30 (ZCZ ball R6) hdmi */
+ P8_30_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P8_30_default_pin>;
+ pinctrl-1 = <&P8_30_gpio_pin>;
+ pinctrl-2 = <&P8_30_gpio_pu_pin>;
+ pinctrl-3 = <&P8_30_gpio_pd_pin>;
+ pinctrl-4 = <&P8_30_gpio_input_pin>;
+ pinctrl-5 = <&P8_30_pruout_pin>;
+ pinctrl-6 = <&P8_30_pruin_pin>;
+ };
+
+ /* P8_31 (ZCZ ball V4) hdmi */
+ P8_31_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "qep";
+ pinctrl-0 = <&P8_31_default_pin>;
+ pinctrl-1 = <&P8_31_gpio_pin>;
+ pinctrl-2 = <&P8_31_gpio_pu_pin>;
+ pinctrl-3 = <&P8_31_gpio_pd_pin>;
+ pinctrl-4 = <&P8_31_gpio_input_pin>;
+ pinctrl-5 = <&P8_31_uart_pin>;
+ pinctrl-6 = <&P8_31_qep_pin>;
+ };
+
+ /* P8_32 (ZCZ ball T5) hdmi */
+ P8_32_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
+ pinctrl-0 = <&P8_32_default_pin>;
+ pinctrl-1 = <&P8_32_gpio_pin>;
+ pinctrl-2 = <&P8_32_gpio_pu_pin>;
+ pinctrl-3 = <&P8_32_gpio_pd_pin>;
+ pinctrl-4 = <&P8_32_gpio_input_pin>;
+ pinctrl-5 = <&P8_32_qep_pin>;
+ };
+
+ /* P8_33 (ZCZ ball V3) hdmi */
+ P8_33_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
+ pinctrl-0 = <&P8_33_default_pin>;
+ pinctrl-1 = <&P8_33_gpio_pin>;
+ pinctrl-2 = <&P8_33_gpio_pu_pin>;
+ pinctrl-3 = <&P8_33_gpio_pd_pin>;
+ pinctrl-4 = <&P8_33_gpio_input_pin>;
+ pinctrl-5 = <&P8_33_qep_pin>;
+ };
+
+ /* P8_34 (ZCZ ball U4) hdmi */
+ P8_34_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_34_default_pin>;
+ pinctrl-1 = <&P8_34_gpio_pin>;
+ pinctrl-2 = <&P8_34_gpio_pu_pin>;
+ pinctrl-3 = <&P8_34_gpio_pd_pin>;
+ pinctrl-4 = <&P8_34_gpio_input_pin>;
+ pinctrl-5 = <&P8_34_pwm_pin>;
+ };
+
+ /* P8_35 (ZCZ ball V2) hdmi */
+ P8_35_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
+ pinctrl-0 = <&P8_35_default_pin>;
+ pinctrl-1 = <&P8_35_gpio_pin>;
+ pinctrl-2 = <&P8_35_gpio_pu_pin>;
+ pinctrl-3 = <&P8_35_gpio_pd_pin>;
+ pinctrl-4 = <&P8_35_gpio_input_pin>;
+ pinctrl-5 = <&P8_35_qep_pin>;
+ };
+
+ /* P8_36 (ZCZ ball U3) hdmi */
+ P8_36_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P8_36_default_pin>;
+ pinctrl-1 = <&P8_36_gpio_pin>;
+ pinctrl-2 = <&P8_36_gpio_pu_pin>;
+ pinctrl-3 = <&P8_36_gpio_pd_pin>;
+ pinctrl-4 = <&P8_36_gpio_input_pin>;
+ pinctrl-5 = <&P8_36_pwm_pin>;
+ };
+
+ /* P8_37 (ZCZ ball U1) hdmi */
+ P8_37_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "pwm";
+ pinctrl-0 = <&P8_37_default_pin>;
+ pinctrl-1 = <&P8_37_gpio_pin>;
+ pinctrl-2 = <&P8_37_gpio_pu_pin>;
+ pinctrl-3 = <&P8_37_gpio_pd_pin>;
+ pinctrl-4 = <&P8_37_gpio_input_pin>;
+ pinctrl-5 = <&P8_37_uart_pin>;
+ pinctrl-6 = <&P8_37_pwm_pin>;
+ };
+
+ /* P8_38 (ZCZ ball U2) hdmi */
+ P8_38_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "pwm";
+ pinctrl-0 = <&P8_38_default_pin>;
+ pinctrl-1 = <&P8_38_gpio_pin>;
+ pinctrl-2 = <&P8_38_gpio_pu_pin>;
+ pinctrl-3 = <&P8_38_gpio_pd_pin>;
+ pinctrl-4 = <&P8_38_gpio_input_pin>;
+ pinctrl-5 = <&P8_38_uart_pin>;
+ pinctrl-6 = <&P8_38_pwm_pin>;
+ };
+
+ /* P8_39 (ZCZ ball T3) hdmi */
+ P8_39_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P8_39_default_pin>;
+ pinctrl-1 = <&P8_39_gpio_pin>;
+ pinctrl-2 = <&P8_39_gpio_pu_pin>;
+ pinctrl-3 = <&P8_39_gpio_pd_pin>;
+ pinctrl-4 = <&P8_39_gpio_input_pin>;
+ pinctrl-5 = <&P8_39_qep_pin>;
+ pinctrl-6 = <&P8_39_pruout_pin>;
+ pinctrl-7 = <&P8_39_pruin_pin>;
+ };
+
+ /* P8_40 (ZCZ ball T4) hdmi */
+ P8_40_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P8_40_default_pin>;
+ pinctrl-1 = <&P8_40_gpio_pin>;
+ pinctrl-2 = <&P8_40_gpio_pu_pin>;
+ pinctrl-3 = <&P8_40_gpio_pd_pin>;
+ pinctrl-4 = <&P8_40_gpio_input_pin>;
+ pinctrl-5 = <&P8_40_qep_pin>;
+ pinctrl-6 = <&P8_40_pruout_pin>;
+ pinctrl-7 = <&P8_40_pruin_pin>;
+ };
+
+ /* P8_41 (ZCZ ball T1) hdmi */
+ P8_41_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P8_41_default_pin>;
+ pinctrl-1 = <&P8_41_gpio_pin>;
+ pinctrl-2 = <&P8_41_gpio_pu_pin>;
+ pinctrl-3 = <&P8_41_gpio_pd_pin>;
+ pinctrl-4 = <&P8_41_gpio_input_pin>;
+ pinctrl-5 = <&P8_41_qep_pin>;
+ pinctrl-6 = <&P8_41_pruout_pin>;
+ pinctrl-7 = <&P8_41_pruin_pin>;
+ };
+
+ /* P8_42 (ZCZ ball T2) hdmi */
+ P8_42_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P8_42_default_pin>;
+ pinctrl-1 = <&P8_42_gpio_pin>;
+ pinctrl-2 = <&P8_42_gpio_pu_pin>;
+ pinctrl-3 = <&P8_42_gpio_pd_pin>;
+ pinctrl-4 = <&P8_42_gpio_input_pin>;
+ pinctrl-5 = <&P8_42_qep_pin>;
+ pinctrl-6 = <&P8_42_pruout_pin>;
+ pinctrl-7 = <&P8_42_pruin_pin>;
+ };
+
+ /* P8_43 (ZCZ ball R3) hdmi */
+ P8_43_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P8_43_default_pin>;
+ pinctrl-1 = <&P8_43_gpio_pin>;
+ pinctrl-2 = <&P8_43_gpio_pu_pin>;
+ pinctrl-3 = <&P8_43_gpio_pd_pin>;
+ pinctrl-4 = <&P8_43_gpio_input_pin>;
+ pinctrl-5 = <&P8_43_pwm_pin>;
+ pinctrl-6 = <&P8_43_pruout_pin>;
+ pinctrl-7 = <&P8_43_pruin_pin>;
+ };
+
+ /* P8_44 (ZCZ ball R4) hdmi */
+ P8_44_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P8_44_default_pin>;
+ pinctrl-1 = <&P8_44_gpio_pin>;
+ pinctrl-2 = <&P8_44_gpio_pu_pin>;
+ pinctrl-3 = <&P8_44_gpio_pd_pin>;
+ pinctrl-4 = <&P8_44_gpio_input_pin>;
+ pinctrl-5 = <&P8_44_pwm_pin>;
+ pinctrl-6 = <&P8_44_pruout_pin>;
+ pinctrl-7 = <&P8_44_pruin_pin>;
+ };
+
+ /* P8_45 (ZCZ ball R1) hdmi */
+ P8_45_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P8_45_default_pin>;
+ pinctrl-1 = <&P8_45_gpio_pin>;
+ pinctrl-2 = <&P8_45_gpio_pu_pin>;
+ pinctrl-3 = <&P8_45_gpio_pd_pin>;
+ pinctrl-4 = <&P8_45_gpio_input_pin>;
+ pinctrl-5 = <&P8_45_pwm_pin>;
+ pinctrl-6 = <&P8_45_pruout_pin>;
+ pinctrl-7 = <&P8_45_pruin_pin>;
+ };
+
+ /* P8_46 (ZCZ ball R2) hdmi */
+ P8_46_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P8_46_default_pin>;
+ pinctrl-1 = <&P8_46_gpio_pin>;
+ pinctrl-2 = <&P8_46_gpio_pu_pin>;
+ pinctrl-3 = <&P8_46_gpio_pd_pin>;
+ pinctrl-4 = <&P8_46_gpio_input_pin>;
+ pinctrl-5 = <&P8_46_pwm_pin>;
+ pinctrl-6 = <&P8_46_pruout_pin>;
+ pinctrl-7 = <&P8_46_pruin_pin>;
+ };
+
+ /************************/
+ /* P9 Header */
+ /************************/
+
+ /* P9_01 GND */
+
+ /* P9_02 GND */
+
+ /* P9_03 3V3 */
+
+ /* P9_04 3V3 */
+
+ /* P9_05 VDD_5V */
+
+ /* P9_06 VDD_5V */
+
+ /* P9_07 SYS_5V */
+
+ /* P9_08 SYS_5V */
+
+ /* P9_09 PWR_BUT */
+
+ /* P9_10 RSTn */
+
+ /* P9_11 (ZCZ ball T17) */
+ P9_11_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
+ pinctrl-0 = <&P9_11_default_pin>;
+ pinctrl-1 = <&P9_11_gpio_pin>;
+ pinctrl-2 = <&P9_11_gpio_pu_pin>;
+ pinctrl-3 = <&P9_11_gpio_pd_pin>;
+ pinctrl-4 = <&P9_11_gpio_input_pin>;
+ pinctrl-5 = <&P9_11_uart_pin>;
+ };
+
+ /* P9_12 (ZCZ ball U18) */
+ P9_12_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P9_12_default_pin>;
+ pinctrl-1 = <&P9_12_gpio_pin>;
+ pinctrl-2 = <&P9_12_gpio_pu_pin>;
+ pinctrl-3 = <&P9_12_gpio_pd_pin>;
+ pinctrl-4 = <&P9_12_gpio_input_pin>;
+ };
+
+ /* P9_13 (ZCZ ball U17) */
+ P9_13_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
+ pinctrl-0 = <&P9_13_default_pin>;
+ pinctrl-1 = <&P9_13_gpio_pin>;
+ pinctrl-2 = <&P9_13_gpio_pu_pin>;
+ pinctrl-3 = <&P9_13_gpio_pd_pin>;
+ pinctrl-4 = <&P9_13_gpio_input_pin>;
+ pinctrl-5 = <&P9_13_uart_pin>;
+ };
+
+ /* P9_14 (ZCZ ball U14) */
+ P9_14_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P9_14_default_pin>;
+ pinctrl-1 = <&P9_14_gpio_pin>;
+ pinctrl-2 = <&P9_14_gpio_pu_pin>;
+ pinctrl-3 = <&P9_14_gpio_pd_pin>;
+ pinctrl-4 = <&P9_14_gpio_input_pin>;
+ pinctrl-5 = <&P9_14_pwm_pin>;
+ };
+
+ /* P9_15 (ZCZ ball R13) */
+ P9_15_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P9_15_default_pin>;
+ pinctrl-1 = <&P9_15_gpio_pin>;
+ pinctrl-2 = <&P9_15_gpio_pu_pin>;
+ pinctrl-3 = <&P9_15_gpio_pd_pin>;
+ pinctrl-4 = <&P9_15_gpio_input_pin>;
+ pinctrl-5 = <&P9_15_pwm_pin>;
+ };
+
+ /* P9_16 (ZCZ ball T14) */
+ P9_16_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P9_16_default_pin>;
+ pinctrl-1 = <&P9_16_gpio_pin>;
+ pinctrl-2 = <&P9_16_gpio_pu_pin>;
+ pinctrl-3 = <&P9_16_gpio_pd_pin>;
+ pinctrl-4 = <&P9_16_gpio_input_pin>;
+ pinctrl-5 = <&P9_16_pwm_pin>;
+ };
+
+ /* P9_17 (ZCZ ball A16) */
+ P9_17_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P9_17_default_pin>;
+ pinctrl-1 = <&P9_17_gpio_pin>;
+ pinctrl-2 = <&P9_17_gpio_pu_pin>;
+ pinctrl-3 = <&P9_17_gpio_pd_pin>;
+ pinctrl-4 = <&P9_17_gpio_input_pin>;
+ pinctrl-5 = <&P9_17_spi_cs_pin>;
+ pinctrl-6 = <&P9_17_i2c_pin>;
+ pinctrl-7 = <&P9_17_pwm_pin>;
+ pinctrl-8 = <&P9_17_pru_uart_pin>;
+ };
+
+ /* P9_18 (ZCZ ball B16) */
+ P9_18_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P9_18_default_pin>;
+ pinctrl-1 = <&P9_18_gpio_pin>;
+ pinctrl-2 = <&P9_18_gpio_pu_pin>;
+ pinctrl-3 = <&P9_18_gpio_pd_pin>;
+ pinctrl-4 = <&P9_18_gpio_input_pin>;
+ pinctrl-5 = <&P9_18_spi_pin>;
+ pinctrl-6 = <&P9_18_i2c_pin>;
+ pinctrl-7 = <&P9_18_pwm_pin>;
+ pinctrl-8 = <&P9_18_pru_uart_pin>;
+ };
+
+ /* P9_19 (ZCZ ball D17) i2c */
+ P9_19_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart", "timer";
+ pinctrl-0 = <&P9_19_default_pin>;
+ pinctrl-1 = <&P9_19_gpio_pin>;
+ pinctrl-2 = <&P9_19_gpio_pu_pin>;
+ pinctrl-3 = <&P9_19_gpio_pd_pin>;
+ pinctrl-4 = <&P9_19_gpio_input_pin>;
+ pinctrl-5 = <&P9_19_spi_cs_pin>;
+ pinctrl-6 = <&P9_19_can_pin>;
+ pinctrl-7 = <&P9_19_i2c_pin>;
+ pinctrl-8 = <&P9_19_pru_uart_pin>;
+ pinctrl-9 = <&P9_19_timer_pin>;
+ };
+
+ /* P9_20 (ZCZ ball D18) i2c */
+ P9_20_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart", "timer";
+ pinctrl-0 = <&P9_20_default_pin>;
+ pinctrl-1 = <&P9_20_gpio_pin>;
+ pinctrl-2 = <&P9_20_gpio_pu_pin>;
+ pinctrl-3 = <&P9_20_gpio_pd_pin>;
+ pinctrl-4 = <&P9_20_gpio_input_pin>;
+ pinctrl-5 = <&P9_20_spi_cs_pin>;
+ pinctrl-6 = <&P9_20_can_pin>;
+ pinctrl-7 = <&P9_20_i2c_pin>;
+ pinctrl-8 = <&P9_20_pru_uart_pin>;
+ pinctrl-9 = <&P9_20_timer_pin>;
+ };
+
+ /* P9_21 (ZCZ ball B17) */
+ P9_21_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "uart", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P9_21_default_pin>;
+ pinctrl-1 = <&P9_21_gpio_pin>;
+ pinctrl-2 = <&P9_21_gpio_pu_pin>;
+ pinctrl-3 = <&P9_21_gpio_pd_pin>;
+ pinctrl-4 = <&P9_21_gpio_input_pin>;
+ pinctrl-5 = <&P9_21_spi_pin>;
+ pinctrl-6 = <&P9_21_uart_pin>;
+ pinctrl-7 = <&P9_21_i2c_pin>;
+ pinctrl-8 = <&P9_21_pwm_pin>;
+ pinctrl-9 = <&P9_21_pru_uart_pin>;
+ };
+
+ /* P9_22 (ZCZ ball A17) */
+ P9_22_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "uart", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P9_22_default_pin>;
+ pinctrl-1 = <&P9_22_gpio_pin>;
+ pinctrl-2 = <&P9_22_gpio_pu_pin>;
+ pinctrl-3 = <&P9_22_gpio_pd_pin>;
+ pinctrl-4 = <&P9_22_gpio_input_pin>;
+ pinctrl-5 = <&P9_22_spi_sclk_pin>;
+ pinctrl-6 = <&P9_22_uart_pin>;
+ pinctrl-7 = <&P9_22_i2c_pin>;
+ pinctrl-8 = <&P9_22_pwm_pin>;
+ pinctrl-9 = <&P9_22_pru_uart_pin>;
+ };
+
+ /* P9_23 (ZCZ ball V14) */
+ P9_23_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P9_23_default_pin>;
+ pinctrl-1 = <&P9_23_gpio_pin>;
+ pinctrl-2 = <&P9_23_gpio_pu_pin>;
+ pinctrl-3 = <&P9_23_gpio_pd_pin>;
+ pinctrl-4 = <&P9_23_gpio_input_pin>;
+ pinctrl-5 = <&P9_23_pwm_pin>;
+ };
+
+ /* P9_24 (ZCZ ball D15) */
+ P9_24_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
+ pinctrl-0 = <&P9_24_default_pin>;
+ pinctrl-1 = <&P9_24_gpio_pin>;
+ pinctrl-2 = <&P9_24_gpio_pu_pin>;
+ pinctrl-3 = <&P9_24_gpio_pd_pin>;
+ pinctrl-4 = <&P9_24_gpio_input_pin>;
+ pinctrl-5 = <&P9_24_uart_pin>;
+ pinctrl-6 = <&P9_24_can_pin>;
+ pinctrl-7 = <&P9_24_i2c_pin>;
+ pinctrl-8 = <&P9_24_pru_uart_pin>;
+ pinctrl-9 = <&P9_24_pruin_pin>;
+ };
+
+ /* P9_25 (ZCZ ball A14) audio */
+ P9_25_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P9_25_default_pin>;
+ pinctrl-1 = <&P9_25_gpio_pin>;
+ pinctrl-2 = <&P9_25_gpio_pu_pin>;
+ pinctrl-3 = <&P9_25_gpio_pd_pin>;
+ pinctrl-4 = <&P9_25_gpio_input_pin>;
+ pinctrl-5 = <&P9_25_qep_pin>;
+ pinctrl-6 = <&P9_25_pruout_pin>;
+ pinctrl-7 = <&P9_25_pruin_pin>;
+ };
+
+ /* P9_26 (ZCZ ball D16) */
+ P9_26_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
+ pinctrl-0 = <&P9_26_default_pin>;
+ pinctrl-1 = <&P9_26_gpio_pin>;
+ pinctrl-2 = <&P9_26_gpio_pu_pin>;
+ pinctrl-3 = <&P9_26_gpio_pd_pin>;
+ pinctrl-4 = <&P9_26_gpio_input_pin>;
+ pinctrl-5 = <&P9_26_uart_pin>;
+ pinctrl-6 = <&P9_26_can_pin>;
+ pinctrl-7 = <&P9_26_i2c_pin>;
+ pinctrl-8 = <&P9_26_pru_uart_pin>;
+ pinctrl-9 = <&P9_26_pruin_pin>;
+ };
+
+ /* P9_27 (ZCZ ball C13) */
+ P9_27_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P9_27_default_pin>;
+ pinctrl-1 = <&P9_27_gpio_pin>;
+ pinctrl-2 = <&P9_27_gpio_pu_pin>;
+ pinctrl-3 = <&P9_27_gpio_pd_pin>;
+ pinctrl-4 = <&P9_27_gpio_input_pin>;
+ pinctrl-5 = <&P9_27_qep_pin>;
+ pinctrl-6 = <&P9_27_pruout_pin>;
+ pinctrl-7 = <&P9_27_pruin_pin>;
+ };
+
+ /* P9_28 (ZCZ ball C12) audio */
+ P9_28_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "pwm", "pwm2", "pruout", "pruin";
+ pinctrl-0 = <&P9_28_default_pin>;
+ pinctrl-1 = <&P9_28_gpio_pin>;
+ pinctrl-2 = <&P9_28_gpio_pu_pin>;
+ pinctrl-3 = <&P9_28_gpio_pd_pin>;
+ pinctrl-4 = <&P9_28_gpio_input_pin>;
+ pinctrl-5 = <&P9_28_spi_cs_pin>;
+ pinctrl-6 = <&P9_28_pwm_pin>;
+ pinctrl-7 = <&P9_28_pwm2_pin>;
+ pinctrl-8 = <&P9_28_pruout_pin>;
+ pinctrl-9 = <&P9_28_pruin_pin>;
+ };
+
+ /* P9_29 (ZCZ ball B13) audio */
+ P9_29_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P9_29_default_pin>;
+ pinctrl-1 = <&P9_29_gpio_pin>;
+ pinctrl-2 = <&P9_29_gpio_pu_pin>;
+ pinctrl-3 = <&P9_29_gpio_pd_pin>;
+ pinctrl-4 = <&P9_29_gpio_input_pin>;
+ pinctrl-5 = <&P9_29_spi_pin>;
+ pinctrl-6 = <&P9_29_pwm_pin>;
+ pinctrl-7 = <&P9_29_pruout_pin>;
+ pinctrl-8 = <&P9_29_pruin_pin>;
+ };
+
+ /* P9_30 (ZCZ ball D12) gpio-hog wl1835 */
+
+ /* P9_31 (ZCZ ball A13) audio */
+ P9_31_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P9_31_default_pin>;
+ pinctrl-1 = <&P9_31_gpio_pin>;
+ pinctrl-2 = <&P9_31_gpio_pu_pin>;
+ pinctrl-3 = <&P9_31_gpio_pd_pin>;
+ pinctrl-4 = <&P9_31_gpio_input_pin>;
+ pinctrl-5 = <&P9_31_spi_sclk_pin>;
+ pinctrl-6 = <&P9_31_pwm_pin>;
+ pinctrl-7 = <&P9_31_pruout_pin>;
+ pinctrl-8 = <&P9_31_pruin_pin>;
+ };
+
+ /* P9_32 VADC */
+
+ /* P9_33 (ZCZ ball C8) AIN4 */
+
+ /* P9_34 AGND */
+
+ /* P9_35 (ZCZ ball A8) AIN6 */
+
+ /* P9_36 (ZCZ ball B8) AIN5 */
+
+ /* P9_37 (ZCZ ball B7) AIN2 */
+
+ /* P9_38 (ZCZ ball A7) AIN3 */
+
+ /* P9_39 (ZCZ ball B6) AIN0 */
+
+ /* P9_40 (ZCZ ball C7) AIN1 */
+
+ /* P9_41 (ZCZ ball D14) */
+ P9_41_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "timer", "pruin";
+ pinctrl-0 = <&P9_41_default_pin>;
+ pinctrl-1 = <&P9_41_gpio_pin>;
+ pinctrl-2 = <&P9_41_gpio_pu_pin>;
+ pinctrl-3 = <&P9_41_gpio_pd_pin>;
+ pinctrl-4 = <&P9_41_gpio_input_pin>;
+ pinctrl-5 = <&P9_41_timer_pin>;
+ pinctrl-6 = <&P9_41_pruin_pin>;
+ };
+
+ /* P9_41.1 */
+ /* P9_91 (ZCZ ball D13) */
+ P9_91_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P9_91_default_pin>;
+ pinctrl-1 = <&P9_91_gpio_pin>;
+ pinctrl-2 = <&P9_91_gpio_pu_pin>;
+ pinctrl-3 = <&P9_91_gpio_pd_pin>;
+ pinctrl-4 = <&P9_91_gpio_input_pin>;
+ pinctrl-5 = <&P9_91_qep_pin>;
+ pinctrl-6 = <&P9_91_pruout_pin>;
+ pinctrl-7 = <&P9_91_pruin_pin>;
+ };
+
+ /* P9_42 (ZCZ ball C18) */
+ P9_42_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "spi_sclk", "uart", "pwm", "pru_ecap";
+ pinctrl-0 = <&P9_42_default_pin>;
+ pinctrl-1 = <&P9_42_gpio_pin>;
+ pinctrl-2 = <&P9_42_gpio_pu_pin>;
+ pinctrl-3 = <&P9_42_gpio_pd_pin>;
+ pinctrl-4 = <&P9_42_gpio_input_pin>;
+ pinctrl-5 = <&P9_42_spi_cs_pin>;
+ pinctrl-6 = <&P9_42_spi_sclk_pin>;
+ pinctrl-7 = <&P9_42_uart_pin>;
+ pinctrl-8 = <&P9_42_pwm_pin>;
+ pinctrl-9 = <&P9_42_pru_ecap_pin>;
+ };
+
+ /* P9_42.1 */
+ /* P9_92 (ZCZ ball B12) */
+ P9_92_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P9_92_default_pin>;
+ pinctrl-1 = <&P9_92_gpio_pin>;
+ pinctrl-2 = <&P9_92_gpio_pu_pin>;
+ pinctrl-3 = <&P9_92_gpio_pd_pin>;
+ pinctrl-4 = <&P9_92_gpio_input_pin>;
+ pinctrl-5 = <&P9_92_qep_pin>;
+ pinctrl-6 = <&P9_92_pruout_pin>;
+ pinctrl-7 = <&P9_92_pruin_pin>;
+ };
+
+ /* P9_43 GND */
+
+ /* P9_44 GND */
+
+ /* P9_45 GND */
+
+ /* P9_46 GND */
+
+
+ cape-universal {
+ compatible = "gpio-of-helper";
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ P8_03 {
+ gpio-name = "P8_03";
+ gpio = <&gpio1 6 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_04 {
+ gpio-name = "P8_04";
+ gpio = <&gpio1 7 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_05 {
+ gpio-name = "P8_05";
+ gpio = <&gpio1 2 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_06 {
+ gpio-name = "P8_06";
+ gpio = <&gpio1 3 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_07 {
+ gpio-name = "P8_07";
+ gpio = <&gpio2 2 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_08 {
+ gpio-name = "P8_08";
+ gpio = <&gpio2 3 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_09 {
+ gpio-name = "P8_09";
+ gpio = <&gpio2 5 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_10 {
+ gpio-name = "P8_10";
+ gpio = <&gpio2 4 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_11 {
+ gpio-name = "P8_11";
+ gpio = <&gpio1 13 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_12 {
+ gpio-name = "P8_12";
+ gpio = <&gpio1 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_13 {
+ gpio-name = "P8_13";
+ gpio = <&gpio0 23 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_15 {
+ gpio-name = "P8_15";
+ gpio = <&gpio1 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_16 {
+ gpio-name = "P8_16";
+ gpio = <&gpio1 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_18 {
+ gpio-name = "P8_18";
+ gpio = <&gpio2 1 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_19 {
+ gpio-name = "P8_19";
+ gpio = <&gpio0 22 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_20 {
+ gpio-name = "P8_20";
+ gpio = <&gpio1 31 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_21 {
+ gpio-name = "P8_21";
+ gpio = <&gpio1 30 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_22 {
+ gpio-name = "P8_22";
+ gpio = <&gpio1 5 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_23 {
+ gpio-name = "P8_23";
+ gpio = <&gpio1 4 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_24 {
+ gpio-name = "P8_24";
+ gpio = <&gpio1 1 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_25 {
+ gpio-name = "P8_25";
+ gpio = <&gpio1 0 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_27 {
+ gpio-name = "P8_27";
+ gpio = <&gpio2 22 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_28 {
+ gpio-name = "P8_28";
+ gpio = <&gpio2 24 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_29 {
+ gpio-name = "P8_29";
+ gpio = <&gpio2 23 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_30 {
+ gpio-name = "P8_30";
+ gpio = <&gpio2 25 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_31 {
+ gpio-name = "P8_31";
+ gpio = <&gpio0 10 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_32 {
+ gpio-name = "P8_32";
+ gpio = <&gpio0 11 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_33 {
+ gpio-name = "P8_33";
+ gpio = <&gpio0 9 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_34 {
+ gpio-name = "P8_34";
+ gpio = <&gpio2 17 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_35 {
+ gpio-name = "P8_35";
+ gpio = <&gpio0 8 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_36 {
+ gpio-name = "P8_36";
+ gpio = <&gpio2 16 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_37 {
+ gpio-name = "P8_37";
+ gpio = <&gpio2 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_38 {
+ gpio-name = "P8_38";
+ gpio = <&gpio2 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_39 {
+ gpio-name = "P8_39";
+ gpio = <&gpio2 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_40 {
+ gpio-name = "P8_40";
+ gpio = <&gpio2 13 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_41 {
+ gpio-name = "P8_41";
+ gpio = <&gpio2 10 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_42 {
+ gpio-name = "P8_42";
+ gpio = <&gpio2 11 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_43 {
+ gpio-name = "P8_43";
+ gpio = <&gpio2 8 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_44 {
+ gpio-name = "P8_44";
+ gpio = <&gpio2 9 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_45 {
+ gpio-name = "P8_45";
+ gpio = <&gpio2 6 0>;
+ input;
+ dir-changeable;
+ };
+
+ P8_46 {
+ gpio-name = "P8_46";
+ gpio = <&gpio2 7 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_11 {
+ gpio-name = "P9_11";
+ gpio = <&gpio0 30 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_12 {
+ gpio-name = "P9_12";
+ gpio = <&gpio1 28 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_13 {
+ gpio-name = "P9_13";
+ gpio = <&gpio0 31 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_14 {
+ gpio-name = "P9_14";
+ gpio = <&gpio1 18 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_15 {
+ gpio-name = "P9_15";
+ gpio = <&gpio1 16 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_16 {
+ gpio-name = "P9_16";
+ gpio = <&gpio1 19 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_17 {
+ gpio-name = "P9_17";
+ gpio = <&gpio0 5 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_18 {
+ gpio-name = "P9_18";
+ gpio = <&gpio0 4 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_19 {
+ gpio-name = "P9_19";
+ gpio = <&gpio0 13 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_20 {
+ gpio-name = "P9_20";
+ gpio = <&gpio0 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_21 {
+ gpio-name = "P9_21";
+ gpio = <&gpio0 3 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_22 {
+ gpio-name = "P9_22";
+ gpio = <&gpio0 2 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_23 {
+ gpio-name = "P9_23";
+ gpio = <&gpio1 17 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_24 {
+ gpio-name = "P9_24";
+ gpio = <&gpio0 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_25 {
+ gpio-name = "P9_25";
+ gpio = <&gpio3 21 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_26 {
+ gpio-name = "P9_26";
+ gpio = <&gpio0 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_27 {
+ gpio-name = "P9_27";
+ gpio = <&gpio3 19 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_28 {
+ gpio-name = "P9_28";
+ gpio = <&gpio3 17 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_29 {
+ gpio-name = "P9_29";
+ gpio = <&gpio3 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_31 {
+ gpio-name = "P9_31";
+ gpio = <&gpio3 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_41 {
+ gpio-name = "P9_41";
+ gpio = <&gpio0 20 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_91 {
+ gpio-name = "P9_91";
+ gpio = <&gpio3 20 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_42 {
+ gpio-name = "P9_42";
+ gpio = <&gpio0 7 0>;
+ input;
+ dir-changeable;
+ };
+
+ P9_92 {
+ gpio-name = "P9_92";
+ gpio = <&gpio3 18 0>;
+ input;
+ dir-changeable;
+ };
+
+ };
+};
diff --git b/arch/arm/boot/dts/am335x-bonegreen-wireless-uboot-univ.dts b/arch/arm/boot/dts/am335x-bonegreen-wireless-uboot-univ.dts
new file mode 100644
index 0000000..5d87c70
--- /dev/null
+++ b/arch/arm/boot/dts/am335x-bonegreen-wireless-uboot-univ.dts
@@ -0,0 +1,53 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "am33xx.dtsi"
+#include "am335x-bone-common.dtsi"
+#include "am335x-bonegreen-wireless-common-univ.dtsi"
+
+/ {
+ model = "TI AM335x BeagleBone Green Wireless";
+ compatible = "ti,am335x-bone-green-wireless", "ti,am335x-bone-green", "ti,am335x-bone-black", "ti,am335x-bone", "ti,am33xx";
+};
+
+&ldo3_reg {
+ regulator-min-microvolt = <1800000>;
+ regulator-max-microvolt = <1800000>;
+ regulator-always-on;
+};
+
+&mmc1 {
+ vmmc-supply = <&vmmcsd_fixed>;
+};
+
+&gpio1 {
+ ls_buf_en {
+ gpio-hog;
+ gpios = <29 GPIO_ACTIVE_HIGH>;
+ output-high;
+ line-name = "LS_BUF_EN";
+ };
+};
+
+/* BT_AUD_OUT from wl1835 has to be pulled low when WL_EN is activated.*/
+/* in case it isn't, wilink8 ends up in one of the test modes that */
+/* intruces various issues (elp wkaeup timeouts etc.) */
+/* On the BBGW this pin is routed through the level shifter (U21) that */
+/* introduces a pullup on the line and wilink8 ends up in a bad state. */
+/* use a gpio hog to force this pin low. An alternative may be adding */
+/* an external pulldown on U21 pin 4. */
+
+&gpio3 {
+ bt_aud_in {
+ gpio-hog;
+ gpios = <16 GPIO_ACTIVE_HIGH>;
+ output-low;
+ line-name = "MCASP0_AHCLKR";
+ };
+};
diff --git a/arch/arm/boot/dts/am335x-bonegreen-wireless.dts b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
index 4092cd1..82f8f61 100644
--- a/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
+++ b/arch/arm/boot/dts/am335x-bonegreen-wireless.dts
@@ -8,6 +8,7 @@
#include "am335x-bone-common.dtsi"
#include "am335x-bonegreen-common.dtsi"
#include <dt-bindings/interrupt-controller/irq.h>
+/* #include "am335x-bone-jtag.dtsi" */
/ {
model = "TI AM335x BeagleBone Green Wireless";
diff --git a/arch/arm/boot/dts/am335x-bonegreen.dts b/arch/arm/boot/dts/am335x-bonegreen.dts
index c12bb07..e66eadd 100644
--- a/arch/arm/boot/dts/am335x-bonegreen.dts
+++ b/arch/arm/boot/dts/am335x-bonegreen.dts
@@ -7,6 +7,7 @@
#include "am33xx.dtsi"
#include "am335x-bone-common.dtsi"
#include "am335x-bonegreen-common.dtsi"
+/* #include "am335x-bone-jtag.dtsi" */
/ {
model = "TI AM335x BeagleBone Green";
diff --git a/arch/arm/boot/dts/am335x-osd3358-sm-red.dts b/arch/arm/boot/dts/am335x-osd3358-sm-red.dts
index f47cc9f..8c3616c 100644
--- a/arch/arm/boot/dts/am335x-osd3358-sm-red.dts
+++ b/arch/arm/boot/dts/am335x-osd3358-sm-red.dts
@@ -13,6 +13,7 @@
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/display/tda998x.h>
+/* #include "am335x-bone-jtag.dtsi" */
/ {
model = "Octavo Systems OSD3358-SM-RED";
@@ -40,7 +41,6 @@
&am33xx_pinmux {
nxp_hdmi_bonelt_pins: nxp-hdmi-bonelt-pins {
pinctrl-single,pins = <
- AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA0, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA1, PIN_OUTPUT, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_LCD_DATA2, PIN_OUTPUT, MUX_MODE0)
@@ -64,12 +64,6 @@
>;
};
- nxp_hdmi_bonelt_off_pins: nxp-hdmi-bonelt-off-pins {
- pinctrl-single,pins = <
- AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)
- >;
- };
-
mcasp0_pins: mcasp0-pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLUP, MUX_MODE0)
@@ -124,9 +118,8 @@
compatible = "nxp,tda998x";
reg = <0x70>;
- pinctrl-names = "default", "off";
+ pinctrl-names = "default";
pinctrl-0 = <&nxp_hdmi_bonelt_pins>;
- pinctrl-1 = <&nxp_hdmi_bonelt_off_pins>;
/* Convert 24bit BGR to RGB, e.g. cross red and blue wiring */
/* video-ports = <0x234501>; */
@@ -264,9 +257,6 @@
};
&am33xx_pinmux {
- pinctrl-names = "default";
- pinctrl-0 = <&clkout2_pin>;
-
user_leds_s0: user-leds-s0 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_a5.gpio1_21 */
@@ -290,12 +280,6 @@
>;
};
- clkout2_pin: pinmux-clkout2-pin {
- pinctrl-single,pins = <
- AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_OUTPUT_PULLDOWN, MUX_MODE3) /* xdma_event_intr1.clkout2 */
- >;
- };
-
cpsw_default: cpsw-default {
pinctrl-single,pins = <
/* Slave 1 */
diff --git a/arch/arm/boot/dts/am335x-pocketbeagle.dts b/arch/arm/boot/dts/am335x-pocketbeagle.dts
index ff4f919..6021bb2 100644
--- a/arch/arm/boot/dts/am335x-pocketbeagle.dts
+++ b/arch/arm/boot/dts/am335x-pocketbeagle.dts
@@ -60,24 +60,24 @@
};
&am33xx_pinmux {
- i2c2_pins: pinmux-i2c2-pins {
- pinctrl-single,pins = <
- AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* (D17) uart1_rtsn.I2C2_SCL */
- AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */
- >;
- };
+// i2c2_pins: pinmux-i2c2-pins {
+// pinctrl-single,pins = <
+// AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* (D17) uart1_rtsn.I2C2_SCL */
+// AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3) /* (D18) uart1_ctsn.I2C2_SDA */
+// >;
+// };
- ehrpwm0_pins: pinmux-ehrpwm0-pins {
- pinctrl-single,pins = <
- AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* (A13) mcasp0_aclkx.ehrpwm0A */
- >;
- };
+// ehrpwm0_pins: pinmux-ehrpwm0-pins {
+// pinctrl-single,pins = <
+// AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* (A13) mcasp0_aclkx.ehrpwm0A */
+// >;
+// };
- ehrpwm1_pins: pinmux-ehrpwm1-pins {
- pinctrl-single,pins = <
- AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* (U14) gpmc_a2.ehrpwm1A */
- >;
- };
+// ehrpwm1_pins: pinmux-ehrpwm1-pins {
+// pinctrl-single,pins = <
+// AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* (U14) gpmc_a2.ehrpwm1A */
+// >;
+// };
mmc0_pins: pinmux-mmc0-pins {
pinctrl-single,pins = <
@@ -88,27 +88,26 @@
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
- AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT, MUX_MODE4) /* (B12) mcasp0_aclkr.mmc0_sdwp */
>;
};
- spi0_pins: pinmux-spi0-pins {
- pinctrl-single,pins = <
- AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0)
- AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0)
- AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0)
- AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0)
- >;
- };
+// spi0_pins: pinmux-spi0-pins {
+// pinctrl-single,pins = <
+// AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0) /* (A17) spi0_sclk.spi0_sclk */
+// AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0) /* (B17) spi0_d0.spi0_d0 */
+// AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0) /* (B16) spi0_d1.spi0_d1 */
+// AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0) /* (A16) spi0_cs0.spi0_cs0 */
+// >;
+// };
- spi1_pins: pinmux-spi1-pins {
- pinctrl-single,pins = <
- AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_INPUT_PULLUP, MUX_MODE4) /* (C18) eCAP0_in_PWM0_out.spi1_sclk */
- AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE4) /* (E18) uart0_ctsn.spi1_d0 */
- AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE4) /* (E17) uart0_rtsn.spi1_d1 */
- AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_INPUT_PULLUP, MUX_MODE4) /* (A15) xdma_event_intr0.spi1_cs1 */
- >;
- };
+// spi1_pins: pinmux-spi1-pins {
+// pinctrl-single,pins = <
+// AM33XX_PADCONF(AM335X_PIN_ECAP0_IN_PWM0_OUT, PIN_INPUT_PULLUP, MUX_MODE4) /* (C18) eCAP0_in_PWM0_out.spi1_sclk */
+// AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE4) /* (E18) uart0_ctsn.spi1_d0 */
+// AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE4) /* (E17) uart0_rtsn.spi1_d1 */
+// AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_INPUT_PULLUP, MUX_MODE4) /* (A15) xdma_event_intr0.spi1_cs1 */
+// >;
+// };
usr_leds_pins: pinmux-usr-leds-pins {
pinctrl-single,pins = <
@@ -126,12 +125,839 @@
>;
};
- uart4_pins: pinmux-uart4-pins {
- pinctrl-single,pins = <
- AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
- AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* (U17) gpmc_wpn.uart4_txd */
- >;
- };
+// uart4_pins: pinmux-uart4-pins {
+// pinctrl-single,pins = <
+// AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6) /* (T17) gpmc_wait0.uart4_rxd */
+// AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_OUTPUT_PULLDOWN, MUX_MODE6) /* (U17) gpmc_wpn.uart4_txd */
+// >;
+// };
+
+ /************************/
+ /* P1 Header */
+ /************************/
+
+ /* P1_01 VIN-AC */
+
+ /* P1_02 (ZCZ ball R5) gpio2_23 */
+ P1_02_default_pin: pinmux_P1_02_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P1_02_gpio_pin: pinmux_P1_02_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P1_02_gpio_pu_pin: pinmux_P1_02_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P1_02_gpio_pd_pin: pinmux_P1_02_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P1_02_gpio_input_pin: pinmux_P1_02_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE7) >; }; /* lcd_hsync.gpio2_23 */
+ P1_02_pruout_pin: pinmux_P1_02_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_hsync.pru1_out9 */
+ P1_02_pruin_pin: pinmux_P1_02_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e4, PIN_INPUT | MUX_MODE6) >; }; /* lcd_hsync.pru1_in9 */
+
+ /* P1_03 (ZCZ ball F15) usb1_vbus_out */
+
+ /* P1_04 (ZCZ ball R6) gpio2_25 */
+ P1_04_default_pin: pinmux_P1_04_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P1_04_gpio_pin: pinmux_P1_04_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P1_04_gpio_pu_pin: pinmux_P1_04_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P1_04_gpio_pd_pin: pinmux_P1_04_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P1_04_gpio_input_pin: pinmux_P1_04_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE7) >; }; /* lcd_ac_bias_en.gpio2_25 */
+ P1_04_pruout_pin: pinmux_P1_04_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_ac_bias_en.pru1_out11 */
+ P1_04_pruin_pin: pinmux_P1_04_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08ec, PIN_INPUT | MUX_MODE6) >; }; /* lcd_ac_bias_en.pru1_in11 */
+
+ /* P1_05 (ZCZ ball T18) usb1_vbus_in */
+
+ /* P1_06 (ZCZ ball A16) spi0_cs0 */
+ P1_06_default_pin: pinmux_P1_06_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_cs0.spi0_cs0 */
+ P1_06_gpio_pin: pinmux_P1_06_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P1_06_gpio_pu_pin: pinmux_P1_06_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P1_06_gpio_pd_pin: pinmux_P1_06_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P1_06_gpio_input_pin: pinmux_P1_06_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_INPUT | MUX_MODE7) >; }; /* spi0_cs0.gpio0_5 */
+ P1_06_spi_cs_pin: pinmux_P1_06_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_cs0.spi0_cs0 */
+ P1_06_i2c_pin: pinmux_P1_06_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_cs0.i2c1_scl */
+ P1_06_pwm_pin: pinmux_P1_06_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_cs0.ehrpwm0_synci */
+ P1_06_pru_uart_pin: pinmux_P1_06_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x095c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_cs0.pr1_uart0_txd */
+
+ /* P1_07 VIN-USB */
+
+ /* P1_08 (ZCZ ball A17) spi0_sclk */
+ P1_08_default_pin: pinmux_P1_08_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_sclk.spi0_sclk */
+ P1_08_gpio_pin: pinmux_P1_08_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P1_08_gpio_pu_pin: pinmux_P1_08_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P1_08_gpio_pd_pin: pinmux_P1_08_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P1_08_gpio_input_pin: pinmux_P1_08_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_INPUT | MUX_MODE7) >; }; /* spi0_sclk.gpio0_2 */
+ P1_08_spi_sclk_pin: pinmux_P1_08_spi_sclk_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_sclk.spi0_sclk */
+ P1_08_uart_pin: pinmux_P1_08_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_sclk.uart2_rxd */
+ P1_08_i2c_pin: pinmux_P1_08_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_sclk.i2c2_sda */
+ P1_08_pwm_pin: pinmux_P1_08_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_sclk.ehrpwm0a */
+ P1_08_pru_uart_pin: pinmux_P1_08_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0950, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_sclk.pr1_uart0_cts_n */
+
+ /* P1_09 (ZCZ ball R18) USB1-DN */
+
+ /* P1_10 (ZCZ ball B17) spi0_d0 */
+ P1_10_default_pin: pinmux_P1_10_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d0.spi0_d0 */
+ P1_10_gpio_pin: pinmux_P1_10_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P1_10_gpio_pu_pin: pinmux_P1_10_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P1_10_gpio_pd_pin: pinmux_P1_10_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P1_10_gpio_input_pin: pinmux_P1_10_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d0.gpio0_3 */
+ P1_10_spi_pin: pinmux_P1_10_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d0.spi0_d0 */
+ P1_10_uart_pin: pinmux_P1_10_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* spi0_d0.uart2_txd */
+ P1_10_i2c_pin: pinmux_P1_10_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d0.i2c2_scl */
+ P1_10_pwm_pin: pinmux_P1_10_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d0.ehrpwm0b */
+ P1_10_pru_uart_pin: pinmux_P1_10_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0954, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d0.pr1_uart0_rts_n */
+
+ /* P1_11 (ZCZ ball R17) USB1-DP */
+
+ /* P1_12 (ZCZ ball B16) spi0_d1 */
+ P1_12_default_pin: pinmux_P1_12_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d1.spi0_d1 */
+ P1_12_gpio_pin: pinmux_P1_12_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P1_12_gpio_pu_pin: pinmux_P1_12_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P1_12_gpio_pd_pin: pinmux_P1_12_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P1_12_gpio_input_pin: pinmux_P1_12_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_INPUT | MUX_MODE7) >; }; /* spi0_d1.gpio0_4 */
+ P1_12_spi_pin: pinmux_P1_12_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* spi0_d1.spi0_d1 */
+ P1_12_i2c_pin: pinmux_P1_12_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* spi0_d1.i2c1_sda */
+ P1_12_pwm_pin: pinmux_P1_12_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* spi0_d1.ehrpwm0_tripzone_input */
+ P1_12_pru_uart_pin: pinmux_P1_12_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0958, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* spi0_d1.pr1_uart0_rxd */
+
+ /* P1_13 (ZCZ ball P17) USB1-ID */
+
+ /* P1_14 VOUT-3.3V */
+
+ /* P1_15 GND */
+
+ /* P1_16 GND */
+
+ /* P1_17 (ZCZ ball A9) VREFN */
+
+ /* P1_18 (ZCZ ball B9) VREFP */
+
+ /* P1_19 (ZCZ ball B6) AIN0 */
+
+ /* P1_20 (ZCZ ball D14) gpio0_20 */
+ P1_20_default_pin: pinmux_P1_20_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P1_20_gpio_pin: pinmux_P1_20_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P1_20_gpio_pu_pin: pinmux_P1_20_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P1_20_gpio_pd_pin: pinmux_P1_20_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P1_20_gpio_input_pin: pinmux_P1_20_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE7) >; }; /* xdma_event_intr1.gpio0_20 */
+ P1_20_pruin_pin: pinmux_P1_20_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b4, PIN_INPUT | MUX_MODE5) >; }; /* xdma_event_intr1.pru0_in16 */
+
+ /* P1_21 (ZCZ ball C7) AIN1 */
+
+ /* P1_22 GND */
+
+ /* P1_23 (ZCZ ball B7) AIN2 */
+
+ /* P1_24 VOUT-5V */
+
+ /* P1_25 (ZCZ ball A7) AIN3 */
+
+ /* P1_26 (ZCZ ball D18) i2c2_sda */
+ P1_26_default_pin: pinmux_P1_26_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
+ P1_26_gpio_pin: pinmux_P1_26_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P1_26_gpio_pu_pin: pinmux_P1_26_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P1_26_gpio_pd_pin: pinmux_P1_26_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P1_26_gpio_input_pin: pinmux_P1_26_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_INPUT | MUX_MODE7) >; }; /* uart1_ctsn.gpio0_12 */
+ P1_26_can_pin: pinmux_P1_26_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_ctsn.dcan0_tx */
+ P1_26_i2c_pin: pinmux_P1_26_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_ctsn.i2c2_sda */
+ P1_26_spi_cs_pin: pinmux_P1_26_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_ctsn.spi1_cs0 */
+ P1_26_pru_uart_pin: pinmux_P1_26_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0978, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_ctsn.pr1_uart0_cts_n */
+
+ /* P1_27 (ZCZ ball C8) AIN4 */
+
+ /* P1_28 (ZCZ ball D17) i2c2_scl */
+ P1_28_default_pin: pinmux_P1_28_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
+ P1_28_gpio_pin: pinmux_P1_28_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P1_28_gpio_pu_pin: pinmux_P1_28_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P1_28_gpio_pd_pin: pinmux_P1_28_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P1_28_gpio_input_pin: pinmux_P1_28_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rtsn.gpio0_13 */
+ P1_28_can_pin: pinmux_P1_28_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rtsn.dcan0_rx */
+ P1_28_i2c_pin: pinmux_P1_28_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rtsn.i2c2_scl */
+ P1_28_spi_cs_pin: pinmux_P1_28_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart1_rtsn.spi1_cs1 */
+ P1_28_pru_uart_pin: pinmux_P1_28_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x097c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rtsn.pr1_uart0_rts_n */
+
+ /* P1_29 (ZCZ ball A14) pru0_in7 */
+ P1_29_default_pin: pinmux_P1_29_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkx.pru0_in7 */
+ P1_29_gpio_pin: pinmux_P1_29_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P1_29_gpio_pu_pin: pinmux_P1_29_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P1_29_gpio_pd_pin: pinmux_P1_29_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P1_29_gpio_input_pin: pinmux_P1_29_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkx.gpio3_21 */
+ P1_29_qep_pin: pinmux_P1_29_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkx.eqep0_strobe */
+ P1_29_pruout_pin: pinmux_P1_29_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkx.pru0_out7 */
+ P1_29_pruin_pin: pinmux_P1_29_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09ac, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkx.pru0_in7 */
+
+ /* P1_30 (ZCZ ball E16) uart0_txd */
+ P1_30_default_pin: pinmux_P1_30_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_txd.uart0_txd */
+ P1_30_gpio_pin: pinmux_P1_30_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
+ P1_30_gpio_pu_pin: pinmux_P1_30_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
+ P1_30_gpio_pd_pin: pinmux_P1_30_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
+ P1_30_gpio_input_pin: pinmux_P1_30_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_INPUT | MUX_MODE7) >; }; /* uart0_txd.gpio1_11 */
+ P1_30_uart_pin: pinmux_P1_30_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_txd.uart0_txd */
+ P1_30_spi_cs_pin: pinmux_P1_30_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_txd.spi1_cs1 */
+ P1_30_can_pin: pinmux_P1_30_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart0_txd.dcan0_rx */
+ P1_30_i2c_pin: pinmux_P1_30_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_txd.i2c2_scl */
+ P1_30_pruout_pin: pinmux_P1_30_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* uart0_txd.pru1_out15 */
+ P1_30_pruin_pin: pinmux_P1_30_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0974, PIN_INPUT | MUX_MODE6) >; }; /* uart0_txd.pru1_in15 */
+
+ /* P1_31 (ZCZ ball B12) pru0_in4 */
+ P1_31_default_pin: pinmux_P1_31_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkr.pru0_in4 */
+ P1_31_gpio_pin: pinmux_P1_31_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P1_31_gpio_pu_pin: pinmux_P1_31_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P1_31_gpio_pd_pin: pinmux_P1_31_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P1_31_gpio_input_pin: pinmux_P1_31_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkr.gpio3_18 */
+ P1_31_qep_pin: pinmux_P1_31_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkr.eqep0a_in */
+ P1_31_pruout_pin: pinmux_P1_31_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkr.pru0_out4 */
+ P1_31_pruin_pin: pinmux_P1_31_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a0, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkr.pru0_in4 */
+
+ /* P1_32 (ZCZ ball E15) uart0_rxd */
+ P1_32_default_pin: pinmux_P1_32_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_rxd.uart0_rxd */
+ P1_32_gpio_pin: pinmux_P1_32_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
+ P1_32_gpio_pu_pin: pinmux_P1_32_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
+ P1_32_gpio_pd_pin: pinmux_P1_32_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
+ P1_32_gpio_input_pin: pinmux_P1_32_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_INPUT | MUX_MODE7) >; }; /* uart0_rxd.gpio1_10 */
+ P1_32_uart_pin: pinmux_P1_32_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart0_rxd.uart0_rxd */
+ P1_32_spi_cs_pin: pinmux_P1_32_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_rxd.spi1_cs0 */
+ P1_32_can_pin: pinmux_P1_32_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart0_rxd.dcan0_tx */
+ P1_32_i2c_pin: pinmux_P1_32_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_rxd.i2c2_sda */
+ P1_32_pruout_pin: pinmux_P1_32_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* uart0_rxd.pru1_out14 */
+ P1_32_pruin_pin: pinmux_P1_32_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0970, PIN_INPUT | MUX_MODE6) >; }; /* uart0_rxd.pru1_in14 */
+
+ /* P1_33 (ZCZ ball B13) pru0_in1 */
+ P1_33_default_pin: pinmux_P1_33_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsx.pru0_in1 */
+ P1_33_gpio_pin: pinmux_P1_33_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P1_33_gpio_pu_pin: pinmux_P1_33_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P1_33_gpio_pd_pin: pinmux_P1_33_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P1_33_gpio_input_pin: pinmux_P1_33_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsx.gpio3_15 */
+ P1_33_pwm_pin: pinmux_P1_33_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsx.ehrpwm0b */
+ P1_33_spi_pin: pinmux_P1_33_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_fsx.spi1_d0 */
+ P1_33_pruout_pin: pinmux_P1_33_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsx.pru0_out1 */
+ P1_33_pruin_pin: pinmux_P1_33_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0994, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsx.pru0_in1 */
+
+ /* P1_34 (ZCZ ball T11) gpio0_26 */
+ P1_34_default_pin: pinmux_P1_34_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P1_34_gpio_pin: pinmux_P1_34_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P1_34_gpio_pu_pin: pinmux_P1_34_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P1_34_gpio_pd_pin: pinmux_P1_34_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P1_34_gpio_input_pin: pinmux_P1_34_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad10.gpio0_26 */
+ P1_34_pwm_pin: pinmux_P1_34_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0828, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad10.ehrpwm2_tripzone_input */
+
+ /* P1_35 (ZCZ ball V5) pru1_in10 */
+ P1_35_default_pin: pinmux_P1_35_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_pclk.pru1_in10 */
+ P1_35_gpio_pin: pinmux_P1_35_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P1_35_gpio_pu_pin: pinmux_P1_35_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P1_35_gpio_pd_pin: pinmux_P1_35_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P1_35_gpio_input_pin: pinmux_P1_35_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE7) >; }; /* lcd_pclk.gpio2_24 */
+ P1_35_pruout_pin: pinmux_P1_35_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_pclk.pru1_out10 */
+ P1_35_pruin_pin: pinmux_P1_35_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e8, PIN_INPUT | MUX_MODE6) >; }; /* lcd_pclk.pru1_in10 */
+
+ /* P1_36 (ZCZ ball A13) ehrpwm0a */
+ P1_36_default_pin: pinmux_P1_36_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkx.ehrpwm0a */
+ P1_36_gpio_pin: pinmux_P1_36_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P1_36_gpio_pu_pin: pinmux_P1_36_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P1_36_gpio_pd_pin: pinmux_P1_36_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P1_36_gpio_input_pin: pinmux_P1_36_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_aclkx.gpio3_14 */
+ P1_36_pwm_pin: pinmux_P1_36_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_aclkx.ehrpwm0a */
+ P1_36_spi_sclk_pin: pinmux_P1_36_spi_sclk_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_aclkx.spi1_sclk */
+ P1_36_pruout_pin: pinmux_P1_36_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_aclkx.pru0_out0 */
+ P1_36_pruin_pin: pinmux_P1_36_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0990, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_aclkx.pru0_in0 */
+
+
+ /************************/
+ /* P2 Header */
+ /************************/
+
+ /* P2_01 (ZCZ ball U14) ehrpwm1a */
+ P2_01_default_pin: pinmux_P2_01_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a2.ehrpwm1a */
+ P2_01_gpio_pin: pinmux_P2_01_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P2_01_gpio_pu_pin: pinmux_P2_01_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P2_01_gpio_pd_pin: pinmux_P2_01_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P2_01_gpio_input_pin: pinmux_P2_01_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a2.gpio1_18 */
+ P2_01_pwm_pin: pinmux_P2_01_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0848, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a2.ehrpwm1a */
+
+ /* P2_02 (ZCZ ball V17) gpio1_27 */
+ P2_02_default_pin: pinmux_P2_02_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x086c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
+ P2_02_gpio_pin: pinmux_P2_02_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x086c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
+ P2_02_gpio_pu_pin: pinmux_P2_02_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x086c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
+ P2_02_gpio_pd_pin: pinmux_P2_02_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x086c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
+ P2_02_gpio_input_pin: pinmux_P2_02_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x086c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a11.gpio1_27 */
+
+ /* P2_03 (ZCZ ball T10) gpio0_23 */
+ P2_03_default_pin: pinmux_P2_03_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P2_03_gpio_pin: pinmux_P2_03_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P2_03_gpio_pu_pin: pinmux_P2_03_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P2_03_gpio_pd_pin: pinmux_P2_03_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P2_03_gpio_input_pin: pinmux_P2_03_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad9.gpio0_23 */
+ P2_03_pwm_pin: pinmux_P2_03_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0824, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad9.ehrpwm2b */
+
+ /* P2_04 (ZCZ ball T16) gpio1_26 */
+ P2_04_default_pin: pinmux_P2_04_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0868, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
+ P2_04_gpio_pin: pinmux_P2_04_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0868, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
+ P2_04_gpio_pu_pin: pinmux_P2_04_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0868, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
+ P2_04_gpio_pd_pin: pinmux_P2_04_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0868, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
+ P2_04_gpio_input_pin: pinmux_P2_04_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0868, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a10.gpio1_26 */
+
+ /* P2_05 (ZCZ ball T17) uart4_rxd */
+ P2_05_default_pin: pinmux_P2_05_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wait0.uart4_rxd */
+ P2_05_gpio_pin: pinmux_P2_05_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P2_05_gpio_pu_pin: pinmux_P2_05_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P2_05_gpio_pd_pin: pinmux_P2_05_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P2_05_gpio_input_pin: pinmux_P2_05_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wait0.gpio0_30 */
+ P2_05_uart_pin: pinmux_P2_05_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0870, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wait0.uart4_rxd */
+
+ /* P2_06 (ZCZ ball U16) gpio1_25 */
+ P2_06_default_pin: pinmux_P2_06_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0864, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
+ P2_06_gpio_pin: pinmux_P2_06_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0864, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
+ P2_06_gpio_pu_pin: pinmux_P2_06_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0864, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
+ P2_06_gpio_pd_pin: pinmux_P2_06_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0864, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
+ P2_06_gpio_input_pin: pinmux_P2_06_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0864, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a9.gpio1_25 */
+
+ /* P2_07 (ZCZ ball U17) uart4_txd */
+ P2_07_default_pin: pinmux_P2_07_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wpn.uart4_txd */
+ P2_07_gpio_pin: pinmux_P2_07_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P2_07_gpio_pu_pin: pinmux_P2_07_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P2_07_gpio_pd_pin: pinmux_P2_07_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P2_07_gpio_input_pin: pinmux_P2_07_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_wpn.gpio0_31 */
+ P2_07_uart_pin: pinmux_P2_07_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0874, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_wpn.uart4_txd */
+
+ /* P2_08 (ZCZ ball U18) gpio1_28 */
+ P2_08_default_pin: pinmux_P2_08_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P2_08_gpio_pin: pinmux_P2_08_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P2_08_gpio_pu_pin: pinmux_P2_08_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P2_08_gpio_pd_pin: pinmux_P2_08_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+ P2_08_gpio_input_pin: pinmux_P2_08_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0878, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_be1n.gpio1_28 */
+
+ /* P2_09 (ZCZ ball D15) i2c1_scl */
+ P2_09_default_pin: pinmux_P2_09_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_txd.i2c1_scl */
+ P2_09_gpio_pin: pinmux_P2_09_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P2_09_gpio_pu_pin: pinmux_P2_09_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P2_09_gpio_pd_pin: pinmux_P2_09_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P2_09_gpio_input_pin: pinmux_P2_09_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE7) >; }; /* uart1_txd.gpio0_15 */
+ P2_09_uart_pin: pinmux_P2_09_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_txd.uart1_txd */
+ P2_09_can_pin: pinmux_P2_09_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart1_txd.dcan1_rx */
+ P2_09_i2c_pin: pinmux_P2_09_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_txd.i2c1_scl */
+ P2_09_pru_uart_pin: pinmux_P2_09_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_txd.pr1_uart0_txd */
+ P2_09_pruin_pin: pinmux_P2_09_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0984, PIN_INPUT | MUX_MODE6) >; }; /* uart1_txd.pru0_in16 */
+
+ /* P2_10 (ZCZ ball R14) gpio1_20 */
+ P2_10_default_pin: pinmux_P2_10_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
+ P2_10_gpio_pin: pinmux_P2_10_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0850, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
+ P2_10_gpio_pu_pin: pinmux_P2_10_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
+ P2_10_gpio_pd_pin: pinmux_P2_10_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
+ P2_10_gpio_input_pin: pinmux_P2_10_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0850, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_a4.gpio1_20 */
+ P2_10_qep_pin: pinmux_P2_10_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0850, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE6) >; }; /* gpmc_a4.eqep1a_in */
+
+ /* P2_11 (ZCZ ball D16) i2c1_sda */
+ P2_11_default_pin: pinmux_P2_11_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rxd.i2c1_sda */
+ P2_11_gpio_pin: pinmux_P2_11_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P2_11_gpio_pu_pin: pinmux_P2_11_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P2_11_gpio_pd_pin: pinmux_P2_11_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P2_11_gpio_input_pin: pinmux_P2_11_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE7) >; }; /* uart1_rxd.gpio0_14 */
+ P2_11_uart_pin: pinmux_P2_11_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE0) >; }; /* uart1_rxd.uart1_rxd */
+ P2_11_can_pin: pinmux_P2_11_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart1_rxd.dcan1_tx */
+ P2_11_i2c_pin: pinmux_P2_11_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart1_rxd.i2c1_sda */
+ P2_11_pru_uart_pin: pinmux_P2_11_pru_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart1_rxd.pr1_uart0_rxd */
+ P2_11_pruin_pin: pinmux_P2_11_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0980, PIN_INPUT | MUX_MODE6) >; }; /* uart1_rxd.pru1_in16 */
+
+ /* P2_12 POWER_BUTTON */
+
+ /* P2_13 VOUT-5V */
+
+ /* P2_14 BAT-VIN */
+
+ /* P2_15 GND */
+
+ /* P2_16 BAT-TEMP */
+
+ /* P2_17 (ZCZ ball V12) gpio2_1 */
+ P2_17_default_pin: pinmux_P2_17_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P2_17_gpio_pin: pinmux_P2_17_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P2_17_gpio_pu_pin: pinmux_P2_17_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P2_17_gpio_pd_pin: pinmux_P2_17_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+ P2_17_gpio_input_pin: pinmux_P2_17_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x088c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_clk.gpio2_1 */
+
+ /* P2_18 (ZCZ ball U13) gpio1_15 */
+ P2_18_default_pin: pinmux_P2_18_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P2_18_gpio_pin: pinmux_P2_18_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P2_18_gpio_pu_pin: pinmux_P2_18_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P2_18_gpio_pd_pin: pinmux_P2_18_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P2_18_gpio_input_pin: pinmux_P2_18_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad15.gpio1_15 */
+ P2_18_qep_pin: pinmux_P2_18_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad15.eqep2_strobe */
+ P2_18_pru_ecap_pin: pinmux_P2_18_pru_ecap_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* gpmc_ad15.pr1_ecap0_ecap_capin_apwm_o */
+ P2_18_pruin_pin: pinmux_P2_18_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x083c, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad15.pru0_in15 */
+
+ /* P2_19 (ZCZ ball U12) gpio0_27 */
+ P2_19_default_pin: pinmux_P2_19_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P2_19_gpio_pin: pinmux_P2_19_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P2_19_gpio_pu_pin: pinmux_P2_19_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P2_19_gpio_pd_pin: pinmux_P2_19_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P2_19_gpio_input_pin: pinmux_P2_19_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad11.gpio0_27 */
+ P2_19_pwm_pin: pinmux_P2_19_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x082c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad11.ehrpwm0_synco */
+
+ /* P2_20 (ZCZ ball T13) gpio2_0 */
+ P2_20_default_pin: pinmux_P2_20_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0888, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
+ P2_20_gpio_pin: pinmux_P2_20_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0888, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
+ P2_20_gpio_pu_pin: pinmux_P2_20_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0888, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
+ P2_20_gpio_pd_pin: pinmux_P2_20_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0888, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
+ P2_20_gpio_input_pin: pinmux_P2_20_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0888, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_csn3.gpio2_0 */
+
+ /* P2_21 GND */
+
+ /* P2_22 (ZCZ ball V13) gpio1_14 */
+ P2_22_default_pin: pinmux_P2_22_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P2_22_gpio_pin: pinmux_P2_22_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P2_22_gpio_pu_pin: pinmux_P2_22_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P2_22_gpio_pd_pin: pinmux_P2_22_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P2_22_gpio_input_pin: pinmux_P2_22_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad14.gpio1_14 */
+ P2_22_qep_pin: pinmux_P2_22_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad14.eqep2_index */
+ P2_22_pruin_pin: pinmux_P2_22_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0838, PIN_INPUT | MUX_MODE6) >; }; /* gpmc_ad14.pru0_in14 */
+
+ /* P2_23 VOUT-3.3V */
+
+ /* P2_24 (ZCZ ball T12) gpio1_12 */
+ P2_24_default_pin: pinmux_P2_24_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P2_24_gpio_pin: pinmux_P2_24_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P2_24_gpio_pu_pin: pinmux_P2_24_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P2_24_gpio_pd_pin: pinmux_P2_24_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P2_24_gpio_input_pin: pinmux_P2_24_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad12.gpio1_12 */
+ P2_24_qep_pin: pinmux_P2_24_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad12.eqep2a_in */
+ P2_24_pruout_pin: pinmux_P2_24_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0830, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad12.pru0_out14 */
+
+ /* P2_25 (ZCZ ball E17) spi1_d1 */
+ P2_25_default_pin: pinmux_P2_25_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_rtsn.spi1_d1 */
+ P2_25_gpio_pin: pinmux_P2_25_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
+ P2_25_gpio_pu_pin: pinmux_P2_25_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
+ P2_25_gpio_pd_pin: pinmux_P2_25_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
+ P2_25_gpio_input_pin: pinmux_P2_25_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_INPUT | MUX_MODE7) >; }; /* uart0_rtsn.gpio1_9 */
+ P2_25_uart_pin: pinmux_P2_25_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_rtsn.uart4_txd */
+ P2_25_can_pin: pinmux_P2_25_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_INPUT_PULLUP | MUX_MODE2) >; }; /* uart0_rtsn.dcan1_rx */
+ P2_25_i2c_pin: pinmux_P2_25_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_rtsn.i2c1_scl */
+ P2_25_spi_pin: pinmux_P2_25_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_rtsn.spi1_d1 */
+ P2_25_spi_cs_pin: pinmux_P2_25_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x096c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE5) >; }; /* uart0_rtsn.spi1_cs0 */
+
+ /* P2_26 RESET# */
+
+ /* P2_27 (ZCZ ball E18) spi1_d0 */
+ P2_27_default_pin: pinmux_P2_27_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_ctsn.spi1_d0 */
+ P2_27_gpio_pin: pinmux_P2_27_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0968, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
+ P2_27_gpio_pu_pin: pinmux_P2_27_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
+ P2_27_gpio_pd_pin: pinmux_P2_27_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
+ P2_27_gpio_input_pin: pinmux_P2_27_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0968, PIN_INPUT | MUX_MODE7) >; }; /* uart0_ctsn.gpio1_8 */
+ P2_27_uart_pin: pinmux_P2_27_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* uart0_ctsn.uart4_rxd */
+ P2_27_can_pin: pinmux_P2_27_can_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | MUX_MODE2) >; }; /* uart0_ctsn.dcan1_tx */
+ P2_27_i2c_pin: pinmux_P2_27_i2c_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* uart0_ctsn.i2c1_sda */
+ P2_27_spi_pin: pinmux_P2_27_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0968, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* uart0_ctsn.spi1_d0 */
+
+ /* P2_28 (ZCZ ball D13) pru0_in6 */
+ P2_28_default_pin: pinmux_P2_28_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr1.pru0_in6 */
+ P2_28_gpio_pin: pinmux_P2_28_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P2_28_gpio_pu_pin: pinmux_P2_28_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P2_28_gpio_pd_pin: pinmux_P2_28_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P2_28_gpio_input_pin: pinmux_P2_28_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr1.gpio3_20 */
+ P2_28_qep_pin: pinmux_P2_28_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr1.eqep0_index */
+ P2_28_pruout_pin: pinmux_P2_28_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr1.pru0_out6 */
+ P2_28_pruin_pin: pinmux_P2_28_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a8, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr1.pru0_in6 */
+
+ /* P2_29 (ZCZ ball C18) spi1_sclk */
+ P2_29_default_pin: pinmux_P2_29_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* eCAP0_in_PWM0_out.spi1_sclk */
+ P2_29_gpio_pin: pinmux_P2_29_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P2_29_gpio_pu_pin: pinmux_P2_29_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P2_29_gpio_pd_pin: pinmux_P2_29_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P2_29_gpio_input_pin: pinmux_P2_29_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_INPUT | MUX_MODE7) >; }; /* eCAP0_in_PWM0_out.gpio0_7 */
+ P2_29_pwm_pin: pinmux_P2_29_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE0) >; }; /* eCAP0_in_PWM0_out.ecap0_in_pwm0_out */
+ P2_29_uart_pin: pinmux_P2_29_uart_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* eCAP0_in_PWM0_out.uart3_txd */
+ P2_29_spi_cs_pin: pinmux_P2_29_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE2) >; }; /* eCAP0_in_PWM0_out.spi1_cs1 */
+ P2_29_pru_ecap_pin: pinmux_P2_29_pru_ecap_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE3) >; }; /* eCAP0_in_PWM0_out.pr1_ecap0_ecap_capin_apwm_o */
+ P2_29_spi_sclk_pin: pinmux_P2_29_spi_sclk_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0964, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* eCAP0_in_PWM0_out.spi1_sclk */
+
+ /* P2_30 (ZCZ ball C12) pru0_in3 */
+ P2_30_default_pin: pinmux_P2_30_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkr.pru0_in3 */
+ P2_30_gpio_pin: pinmux_P2_30_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P2_30_gpio_pu_pin: pinmux_P2_30_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P2_30_gpio_pd_pin: pinmux_P2_30_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P2_30_gpio_input_pin: pinmux_P2_30_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_ahclkr.gpio3_17 */
+ P2_30_pwm_pin: pinmux_P2_30_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_ahclkr.ehrpwm0_synci */
+ P2_30_spi_cs_pin: pinmux_P2_30_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_ahclkr.spi1_cs0 */
+ P2_30_pruout_pin: pinmux_P2_30_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_ahclkr.pru0_out3 */
+ P2_30_pruin_pin: pinmux_P2_30_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x099c, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_ahclkr.pru0_in3 */
+
+ /* P2_31 (ZCZ ball A15) spi1_cs1 */
+ P2_31_default_pin: pinmux_P2_31_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* xdma_event_intr0.spi1_cs1 */
+ P2_31_gpio_pin: pinmux_P2_31_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
+ P2_31_gpio_pu_pin: pinmux_P2_31_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
+ P2_31_gpio_pd_pin: pinmux_P2_31_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
+ P2_31_gpio_input_pin: pinmux_P2_31_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b0, PIN_INPUT | MUX_MODE7) >; }; /* xdma_event_intr0.gpio0_19 */
+ P2_31_spi_cs_pin: pinmux_P2_31_spi_cs_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* xdma_event_intr0.spi1_cs1 */
+ P2_31_pruin_pin: pinmux_P2_31_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09b0, PIN_INPUT | MUX_MODE5) >; }; /* xdma_event_intr0.pru1_in16 */
+
+ /* P2_32 (ZCZ ball D12) pru0_in2 */
+ P2_32_default_pin: pinmux_P2_32_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr0.pru0_in2 */
+ P2_32_gpio_pin: pinmux_P2_32_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P2_32_gpio_pu_pin: pinmux_P2_32_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P2_32_gpio_pd_pin: pinmux_P2_32_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P2_32_gpio_input_pin: pinmux_P2_32_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_axr0.gpio3_16 */
+ P2_32_pwm_pin: pinmux_P2_32_pwm_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_axr0.ehrpwm0_tripzone_input */
+ P2_32_spi_pin: pinmux_P2_32_spi_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE3) >; }; /* mcasp0_axr0.spi1_d1 */
+ P2_32_pruout_pin: pinmux_P2_32_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_axr0.pru0_out2 */
+ P2_32_pruin_pin: pinmux_P2_32_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0998, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_axr0.pru0_in2 */
+
+ /* P2_33 (ZCZ ball R12) gpio1_13 */
+ P2_33_default_pin: pinmux_P2_33_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P2_33_gpio_pin: pinmux_P2_33_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P2_33_gpio_pu_pin: pinmux_P2_33_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P2_33_gpio_pd_pin: pinmux_P2_33_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P2_33_gpio_input_pin: pinmux_P2_33_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_INPUT | MUX_MODE7) >; }; /* gpmc_ad13.gpio1_13 */
+ P2_33_qep_pin: pinmux_P2_33_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE4) >; }; /* gpmc_ad13.eqep2b_in */
+ P2_33_pruout_pin: pinmux_P2_33_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x0834, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE6) >; }; /* gpmc_ad13.pru0_out15 */
+
+ /* P2_34 (ZCZ ball C13) pru0_in5 */
+ P2_34_default_pin: pinmux_P2_34_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsr.pru0_in5 */
+ P2_34_gpio_pin: pinmux_P2_34_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P2_34_gpio_pu_pin: pinmux_P2_34_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P2_34_gpio_pd_pin: pinmux_P2_34_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P2_34_gpio_input_pin: pinmux_P2_34_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE7) >; }; /* mcasp0_fsr.gpio3_19 */
+ P2_34_qep_pin: pinmux_P2_34_qep_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE1) >; }; /* mcasp0_fsr.eqep0b_in */
+ P2_34_pruout_pin: pinmux_P2_34_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* mcasp0_fsr.pru0_out5 */
+ P2_34_pruin_pin: pinmux_P2_34_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x09a4, PIN_INPUT | MUX_MODE6) >; }; /* mcasp0_fsr.pru0_in5 */
+
+ /* P2_35 (ZCZ ball U5) gpio2_22 */
+ P2_35_default_pin: pinmux_P2_35_default_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P2_35_gpio_pin: pinmux_P2_35_gpio_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P2_35_gpio_pu_pin: pinmux_P2_35_gpio_pu_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLUP | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P2_35_gpio_pd_pin: pinmux_P2_35_gpio_pd_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P2_35_gpio_input_pin: pinmux_P2_35_gpio_input_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE7) >; }; /* lcd_vsync.gpio2_22 */
+ P2_35_pruout_pin: pinmux_P2_35_pruout_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_OUTPUT_PULLDOWN | INPUT_EN | MUX_MODE5) >; }; /* lcd_vsync.pru1_out8 */
+ P2_35_pruin_pin: pinmux_P2_35_pruin_pin { pinctrl-single,pins = <
+ AM33XX_IOPAD(0x08e0, PIN_INPUT | MUX_MODE6) >; }; /* lcd_vsync.pru1_in8 */
+
+ /* P2_36 (ZCZ ball C9) AIN7 */
};
&epwmss0 {
@@ -141,7 +967,8 @@
&ehrpwm0 {
status = "okay";
pinctrl-names = "default";
- pinctrl-0 = <&ehrpwm0_pins>;
+ //pinctrl-0 = <&ehrpwm0_pins>;
+ pinctrl-0 = <>;
};
&epwmss1 {
@@ -151,7 +978,18 @@
&ehrpwm1 {
status = "okay";
pinctrl-names = "default";
- pinctrl-0 = <&ehrpwm1_pins>;
+ //pinctrl-0 = <&ehrpwm1_pins>;
+ pinctrl-0 = <>;
+};
+
+&epwmss2 {
+ status = "okay";
+};
+
+&ehrpwm2 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
};
&i2c0 {
@@ -161,9 +999,18 @@
};
};
+&i2c1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ status = "okay";
+ clock-frequency = <400000>;
+};
+
&i2c2 {
pinctrl-names = "default";
- pinctrl-0 = <&i2c2_pins>;
+// pinctrl-0 = <&i2c2_pins>;
+ pinctrl-0 = <>;
status = "okay";
clock-frequency = <400000>;
@@ -194,14 +1041,30 @@
&uart0 {
pinctrl-names = "default";
- pinctrl-0 = <&uart0_pins>;
+ //pinctrl-0 = <&uart0_pins>;
+ pinctrl-0 = <>;
+
+ status = "okay";
+};
+
+&uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ status = "okay";
+};
+
+&uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
status = "okay";
};
&uart4 {
pinctrl-names = "default";
- pinctrl-0 = <&uart4_pins>;
+ //pinctrl-0 = <&uart4_pins>;
+ pinctrl-0 = <>;
status = "okay";
};
@@ -235,3 +1098,1092 @@
&cppi41dma {
status = "okay";
};
+
+&spi0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "spidev";
+ symlink = "spi/0.0";
+ reg = <0>;
+ spi-max-frequency = <24000000>;
+ };
+
+ channel@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "spidev";
+ symlink = "spi/0.1";
+ reg = <1>;
+ spi-max-frequency = <24000000>;
+ status = "disabled";
+ };
+};
+
+&spi1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "okay";
+
+ channel@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "spidev";
+ symlink = "spi/1.0";
+ reg = <0>;
+ spi-max-frequency = <24000000>;
+ };
+
+ channel@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "spidev";
+ symlink = "spi/1.1";
+ reg = <1>;
+ spi-max-frequency = <24000000>;
+ };
+};
+
+&dcan0 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&dcan1 {
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+};
+
+&ocp {
+ /************************/
+ /* P1 Header */
+ /************************/
+
+ /* P1_01 VIN-AC */
+
+ /* P1_02 (ZCZ ball R5) gpio_input */
+ P1_02_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P1_02_default_pin>;
+ pinctrl-1 = <&P1_02_gpio_pin>;
+ pinctrl-2 = <&P1_02_gpio_pu_pin>;
+ pinctrl-3 = <&P1_02_gpio_pd_pin>;
+ pinctrl-4 = <&P1_02_gpio_input_pin>;
+ pinctrl-5 = <&P1_02_pruout_pin>;
+ pinctrl-6 = <&P1_02_pruin_pin>;
+ };
+
+ /* P1_03 (ZCZ ball F15) usb1_vbus_out */
+
+ /* P1_04 (ZCZ ball R6) */
+ P1_04_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P1_04_default_pin>;
+ pinctrl-1 = <&P1_04_gpio_pin>;
+ pinctrl-2 = <&P1_04_gpio_pu_pin>;
+ pinctrl-3 = <&P1_04_gpio_pd_pin>;
+ pinctrl-4 = <&P1_04_gpio_input_pin>;
+ pinctrl-5 = <&P1_04_pruout_pin>;
+ pinctrl-6 = <&P1_04_pruin_pin>;
+ };
+
+ /* P1_05 (ZCZ ball T18) usb1_vbus_in */
+
+ /* P1_06 (ZCZ ball A16) spi_cs */
+ P1_06_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P1_06_default_pin>;
+ pinctrl-1 = <&P1_06_gpio_pin>;
+ pinctrl-2 = <&P1_06_gpio_pu_pin>;
+ pinctrl-3 = <&P1_06_gpio_pd_pin>;
+ pinctrl-4 = <&P1_06_gpio_input_pin>;
+ pinctrl-5 = <&P1_06_spi_cs_pin>;
+ pinctrl-6 = <&P1_06_i2c_pin>;
+ pinctrl-7 = <&P1_06_pwm_pin>;
+ pinctrl-8 = <&P1_06_pru_uart_pin>;
+ };
+
+ /* P1_07 VIN-USB */
+
+ /* P1_08 (ZCZ ball A17) spi_sclk */
+ P1_08_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "uart", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P1_08_default_pin>;
+ pinctrl-1 = <&P1_08_gpio_pin>;
+ pinctrl-2 = <&P1_08_gpio_pu_pin>;
+ pinctrl-3 = <&P1_08_gpio_pd_pin>;
+ pinctrl-4 = <&P1_08_gpio_input_pin>;
+ pinctrl-5 = <&P1_08_spi_sclk_pin>;
+ pinctrl-6 = <&P1_08_uart_pin>;
+ pinctrl-7 = <&P1_08_i2c_pin>;
+ pinctrl-8 = <&P1_08_pwm_pin>;
+ pinctrl-9 = <&P1_08_pru_uart_pin>;
+ };
+
+ /* P1_09 (ZCZ ball R18) USB1-DN */
+
+ /* P1_10 (ZCZ ball B17) spi */
+ P1_10_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "uart", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P1_10_default_pin>;
+ pinctrl-1 = <&P1_10_gpio_pin>;
+ pinctrl-2 = <&P1_10_gpio_pu_pin>;
+ pinctrl-3 = <&P1_10_gpio_pd_pin>;
+ pinctrl-4 = <&P1_10_gpio_input_pin>;
+ pinctrl-5 = <&P1_10_spi_pin>;
+ pinctrl-6 = <&P1_10_uart_pin>;
+ pinctrl-7 = <&P1_10_i2c_pin>;
+ pinctrl-8 = <&P1_10_pwm_pin>;
+ pinctrl-9 = <&P1_10_pru_uart_pin>;
+ };
+
+ /* P1_11 (ZCZ ball R17) USB1-DP */
+
+ /* P1_12 (ZCZ ball B16) spi */
+ P1_12_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "i2c", "pwm", "pru_uart";
+ pinctrl-0 = <&P1_12_default_pin>;
+ pinctrl-1 = <&P1_12_gpio_pin>;
+ pinctrl-2 = <&P1_12_gpio_pu_pin>;
+ pinctrl-3 = <&P1_12_gpio_pd_pin>;
+ pinctrl-4 = <&P1_12_gpio_input_pin>;
+ pinctrl-5 = <&P1_12_spi_pin>;
+ pinctrl-6 = <&P1_12_i2c_pin>;
+ pinctrl-7 = <&P1_12_pwm_pin>;
+ pinctrl-8 = <&P1_12_pru_uart_pin>;
+ };
+
+ /* P1_13 (ZCZ ball P17) USB1-ID */
+
+ /* P1_14 VOUT-3.3V */
+
+ /* P1_15 GND */
+
+ /* P1_16 GND */
+
+ /* P1_17 (ZCZ ball A9) VREFN */
+
+ /* P1_18 (ZCZ ball B9) VREFP */
+
+ /* P1_19 (ZCZ ball B6) AIN0 */
+
+ /* P1_20 (ZCZ ball D14) */
+ P1_20_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruin";
+ pinctrl-0 = <&P1_20_default_pin>;
+ pinctrl-1 = <&P1_20_gpio_pin>;
+ pinctrl-2 = <&P1_20_gpio_pu_pin>;
+ pinctrl-3 = <&P1_20_gpio_pd_pin>;
+ pinctrl-4 = <&P1_20_gpio_input_pin>;
+ pinctrl-5 = <&P1_20_pruin_pin>;
+ };
+
+ /* P1_21 (ZCZ ball C7) AIN1 */
+
+ /* P1_22 GND */
+
+ /* P1_23 (ZCZ ball B7) AIN2 */
+
+ /* P1_24 VOUT-5V */
+
+ /* P1_25 (ZCZ ball A7) AIN3 */
+
+ /* P1_26 (ZCZ ball D18) i2c */
+ P1_26_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart";
+ pinctrl-0 = <&P1_26_default_pin>;
+ pinctrl-1 = <&P1_26_gpio_pin>;
+ pinctrl-2 = <&P1_26_gpio_pu_pin>;
+ pinctrl-3 = <&P1_26_gpio_pd_pin>;
+ pinctrl-4 = <&P1_26_gpio_input_pin>;
+ pinctrl-5 = <&P1_26_spi_cs_pin>;
+ pinctrl-6 = <&P1_26_can_pin>;
+ pinctrl-7 = <&P1_26_i2c_pin>;
+ pinctrl-8 = <&P1_26_pru_uart_pin>;
+ };
+
+ /* P1_27 (ZCZ ball C8) AIN4 */
+
+ /* P1_28 (ZCZ ball D17) i2c */
+ P1_28_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "can", "i2c", "pru_uart";
+ pinctrl-0 = <&P1_28_default_pin>;
+ pinctrl-1 = <&P1_28_gpio_pin>;
+ pinctrl-2 = <&P1_28_gpio_pu_pin>;
+ pinctrl-3 = <&P1_28_gpio_pd_pin>;
+ pinctrl-4 = <&P1_28_gpio_input_pin>;
+ pinctrl-5 = <&P1_28_spi_cs_pin>;
+ pinctrl-6 = <&P1_28_can_pin>;
+ pinctrl-7 = <&P1_28_i2c_pin>;
+ pinctrl-8 = <&P1_28_pru_uart_pin>;
+ };
+
+ /* P1_29 (ZCZ ball A14) pruin */
+ P1_29_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P1_29_default_pin>;
+ pinctrl-1 = <&P1_29_gpio_pin>;
+ pinctrl-2 = <&P1_29_gpio_pu_pin>;
+ pinctrl-3 = <&P1_29_gpio_pd_pin>;
+ pinctrl-4 = <&P1_29_gpio_input_pin>;
+ pinctrl-5 = <&P1_29_qep_pin>;
+ pinctrl-6 = <&P1_29_pruout_pin>;
+ pinctrl-7 = <&P1_29_pruin_pin>;
+ };
+
+ /* P1_30 (ZCZ ball E16) uart */
+ P1_30_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "uart", "can", "i2c", "pruout", "pruin";
+ pinctrl-0 = <&P1_30_default_pin>;
+ pinctrl-1 = <&P1_30_gpio_pin>;
+ pinctrl-2 = <&P1_30_gpio_pu_pin>;
+ pinctrl-3 = <&P1_30_gpio_pd_pin>;
+ pinctrl-4 = <&P1_30_gpio_input_pin>;
+ pinctrl-5 = <&P1_30_spi_cs_pin>;
+ pinctrl-6 = <&P1_30_uart_pin>;
+ pinctrl-7 = <&P1_30_can_pin>;
+ pinctrl-8 = <&P1_30_i2c_pin>;
+ pinctrl-9 = <&P1_30_pruout_pin>;
+ pinctrl-10 = <&P1_30_pruin_pin>;
+ };
+
+ /* P1_31 (ZCZ ball B12) pruin */
+ P1_31_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P1_31_default_pin>;
+ pinctrl-1 = <&P1_31_gpio_pin>;
+ pinctrl-2 = <&P1_31_gpio_pu_pin>;
+ pinctrl-3 = <&P1_31_gpio_pd_pin>;
+ pinctrl-4 = <&P1_31_gpio_input_pin>;
+ pinctrl-5 = <&P1_31_qep_pin>;
+ pinctrl-6 = <&P1_31_pruout_pin>;
+ pinctrl-7 = <&P1_31_pruin_pin>;
+ };
+
+ /* P1_32 (ZCZ ball E15) uart */
+ P1_32_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "uart", "can", "i2c", "pruout", "pruin";
+ pinctrl-0 = <&P1_32_default_pin>;
+ pinctrl-1 = <&P1_32_gpio_pin>;
+ pinctrl-2 = <&P1_32_gpio_pu_pin>;
+ pinctrl-3 = <&P1_32_gpio_pd_pin>;
+ pinctrl-4 = <&P1_32_gpio_input_pin>;
+ pinctrl-5 = <&P1_32_spi_cs_pin>;
+ pinctrl-6 = <&P1_32_uart_pin>;
+ pinctrl-7 = <&P1_32_can_pin>;
+ pinctrl-8 = <&P1_32_i2c_pin>;
+ pinctrl-9 = <&P1_32_pruout_pin>;
+ pinctrl-10 = <&P1_32_pruin_pin>;
+ };
+
+ /* P1_33 (ZCZ ball B13) pruin */
+ P1_33_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P1_33_default_pin>;
+ pinctrl-1 = <&P1_33_gpio_pin>;
+ pinctrl-2 = <&P1_33_gpio_pu_pin>;
+ pinctrl-3 = <&P1_33_gpio_pd_pin>;
+ pinctrl-4 = <&P1_33_gpio_input_pin>;
+ pinctrl-5 = <&P1_33_spi_pin>;
+ pinctrl-6 = <&P1_33_pwm_pin>;
+ pinctrl-7 = <&P1_33_pruout_pin>;
+ pinctrl-8 = <&P1_33_pruin_pin>;
+ };
+
+ /* P1_34 (ZCZ ball T11) */
+ P1_34_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P1_34_default_pin>;
+ pinctrl-1 = <&P1_34_gpio_pin>;
+ pinctrl-2 = <&P1_34_gpio_pu_pin>;
+ pinctrl-3 = <&P1_34_gpio_pd_pin>;
+ pinctrl-4 = <&P1_34_gpio_input_pin>;
+ pinctrl-5 = <&P1_34_pwm_pin>;
+ };
+
+ /* P1_35 (ZCZ ball V5) pruin */
+ P1_35_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P1_35_default_pin>;
+ pinctrl-1 = <&P1_35_gpio_pin>;
+ pinctrl-2 = <&P1_35_gpio_pu_pin>;
+ pinctrl-3 = <&P1_35_gpio_pd_pin>;
+ pinctrl-4 = <&P1_35_gpio_input_pin>;
+ pinctrl-5 = <&P1_35_pruout_pin>;
+ pinctrl-6 = <&P1_35_pruin_pin>;
+ };
+
+ /* P1_36 (ZCZ ball A13) pwm */
+ P1_36_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_sclk", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P1_36_default_pin>;
+ pinctrl-1 = <&P1_36_gpio_pin>;
+ pinctrl-2 = <&P1_36_gpio_pu_pin>;
+ pinctrl-3 = <&P1_36_gpio_pd_pin>;
+ pinctrl-4 = <&P1_36_gpio_input_pin>;
+ pinctrl-5 = <&P1_36_spi_sclk_pin>;
+ pinctrl-6 = <&P1_36_pwm_pin>;
+ pinctrl-7 = <&P1_36_pruout_pin>;
+ pinctrl-8 = <&P1_36_pruin_pin>;
+ };
+
+
+ /************************/
+ /* P2 Header */
+ /************************/
+
+ /* P2_01 (ZCZ ball U14) pwm */
+ P2_01_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P2_01_default_pin>;
+ pinctrl-1 = <&P2_01_gpio_pin>;
+ pinctrl-2 = <&P2_01_gpio_pu_pin>;
+ pinctrl-3 = <&P2_01_gpio_pd_pin>;
+ pinctrl-4 = <&P2_01_gpio_input_pin>;
+ pinctrl-5 = <&P2_01_pwm_pin>;
+ };
+
+ /* P2_02 (ZCZ ball V17) */
+ P2_02_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P2_02_default_pin>;
+ pinctrl-1 = <&P2_02_gpio_pin>;
+ pinctrl-2 = <&P2_02_gpio_pu_pin>;
+ pinctrl-3 = <&P2_02_gpio_pd_pin>;
+ pinctrl-4 = <&P2_02_gpio_input_pin>;
+ };
+
+ /* P2_03 (ZCZ ball T10) */
+ P2_03_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P2_03_default_pin>;
+ pinctrl-1 = <&P2_03_gpio_pin>;
+ pinctrl-2 = <&P2_03_gpio_pu_pin>;
+ pinctrl-3 = <&P2_03_gpio_pd_pin>;
+ pinctrl-4 = <&P2_03_gpio_input_pin>;
+ pinctrl-5 = <&P2_03_pwm_pin>;
+ };
+
+ /* P2_04 (ZCZ ball T16) */
+ P2_04_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P2_04_default_pin>;
+ pinctrl-1 = <&P2_04_gpio_pin>;
+ pinctrl-2 = <&P2_04_gpio_pu_pin>;
+ pinctrl-3 = <&P2_04_gpio_pd_pin>;
+ pinctrl-4 = <&P2_04_gpio_input_pin>;
+ };
+
+ /* P2_05 (ZCZ ball T17) uart */
+ P2_05_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
+ pinctrl-0 = <&P2_05_default_pin>;
+ pinctrl-1 = <&P2_05_gpio_pin>;
+ pinctrl-2 = <&P2_05_gpio_pu_pin>;
+ pinctrl-3 = <&P2_05_gpio_pd_pin>;
+ pinctrl-4 = <&P2_05_gpio_input_pin>;
+ pinctrl-5 = <&P2_05_uart_pin>;
+ };
+
+ /* P2_06 (ZCZ ball U16) */
+ P2_06_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P2_06_default_pin>;
+ pinctrl-1 = <&P2_06_gpio_pin>;
+ pinctrl-2 = <&P2_06_gpio_pu_pin>;
+ pinctrl-3 = <&P2_06_gpio_pd_pin>;
+ pinctrl-4 = <&P2_06_gpio_input_pin>;
+ };
+
+ /* P2_07 (ZCZ ball U17) uart */
+ P2_07_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart";
+ pinctrl-0 = <&P2_07_default_pin>;
+ pinctrl-1 = <&P2_07_gpio_pin>;
+ pinctrl-2 = <&P2_07_gpio_pu_pin>;
+ pinctrl-3 = <&P2_07_gpio_pd_pin>;
+ pinctrl-4 = <&P2_07_gpio_input_pin>;
+ pinctrl-5 = <&P2_07_uart_pin>;
+ };
+
+ /* P2_08 (ZCZ ball U18) */
+ P2_08_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P2_08_default_pin>;
+ pinctrl-1 = <&P2_08_gpio_pin>;
+ pinctrl-2 = <&P2_08_gpio_pu_pin>;
+ pinctrl-3 = <&P2_08_gpio_pd_pin>;
+ pinctrl-4 = <&P2_08_gpio_input_pin>;
+ };
+
+ /* P2_09 (ZCZ ball D15) i2c */
+ P2_09_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
+ pinctrl-0 = <&P2_09_default_pin>;
+ pinctrl-1 = <&P2_09_gpio_pin>;
+ pinctrl-2 = <&P2_09_gpio_pu_pin>;
+ pinctrl-3 = <&P2_09_gpio_pd_pin>;
+ pinctrl-4 = <&P2_09_gpio_input_pin>;
+ pinctrl-5 = <&P2_09_uart_pin>;
+ pinctrl-6 = <&P2_09_can_pin>;
+ pinctrl-7 = <&P2_09_i2c_pin>;
+ pinctrl-8 = <&P2_09_pru_uart_pin>;
+ pinctrl-9 = <&P2_09_pruin_pin>;
+ };
+
+ /* P2_10 (ZCZ ball R14) */
+ P2_10_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep";
+ pinctrl-0 = <&P2_10_default_pin>;
+ pinctrl-1 = <&P2_10_gpio_pin>;
+ pinctrl-2 = <&P2_10_gpio_pu_pin>;
+ pinctrl-3 = <&P2_10_gpio_pd_pin>;
+ pinctrl-4 = <&P2_10_gpio_input_pin>;
+ pinctrl-5 = <&P2_10_qep_pin>;
+ };
+
+ /* P2_11 (ZCZ ball D16) i2c */
+ P2_11_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "uart", "can", "i2c", "pru_uart", "pruin";
+ pinctrl-0 = <&P2_11_default_pin>;
+ pinctrl-1 = <&P2_11_gpio_pin>;
+ pinctrl-2 = <&P2_11_gpio_pu_pin>;
+ pinctrl-3 = <&P2_11_gpio_pd_pin>;
+ pinctrl-4 = <&P2_11_gpio_input_pin>;
+ pinctrl-5 = <&P2_11_uart_pin>;
+ pinctrl-6 = <&P2_11_can_pin>;
+ pinctrl-7 = <&P2_11_i2c_pin>;
+ pinctrl-8 = <&P2_11_pru_uart_pin>;
+ pinctrl-9 = <&P2_11_pruin_pin>;
+ };
+
+ /* P2_12 POWER_BUTTON */
+
+ /* P2_13 VOUT-5V */
+
+ /* P2_14 BAT-VIN */
+
+ /* P2_15 GND */
+
+ /* P2_16 BAT-TEMP */
+
+ /* P2_17 (ZCZ ball V12) */
+ P2_17_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P2_17_default_pin>;
+ pinctrl-1 = <&P2_17_gpio_pin>;
+ pinctrl-2 = <&P2_17_gpio_pu_pin>;
+ pinctrl-3 = <&P2_17_gpio_pd_pin>;
+ pinctrl-4 = <&P2_17_gpio_input_pin>;
+ };
+
+ /* P2_18 (ZCZ ball U13) */
+ P2_18_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pru_ecap", "pruin";
+ pinctrl-0 = <&P2_18_default_pin>;
+ pinctrl-1 = <&P2_18_gpio_pin>;
+ pinctrl-2 = <&P2_18_gpio_pu_pin>;
+ pinctrl-3 = <&P2_18_gpio_pd_pin>;
+ pinctrl-4 = <&P2_18_gpio_input_pin>;
+ pinctrl-5 = <&P2_18_qep_pin>;
+ pinctrl-6 = <&P2_18_pru_ecap_pin>;
+ pinctrl-7 = <&P2_18_pruin_pin>;
+ };
+
+ /* P2_19 (ZCZ ball U12) */
+ P2_19_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pwm";
+ pinctrl-0 = <&P2_19_default_pin>;
+ pinctrl-1 = <&P2_19_gpio_pin>;
+ pinctrl-2 = <&P2_19_gpio_pu_pin>;
+ pinctrl-3 = <&P2_19_gpio_pd_pin>;
+ pinctrl-4 = <&P2_19_gpio_input_pin>;
+ pinctrl-5 = <&P2_19_pwm_pin>;
+ };
+
+ /* P2_20 (ZCZ ball T13) */
+ P2_20_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input";
+ pinctrl-0 = <&P2_20_default_pin>;
+ pinctrl-1 = <&P2_20_gpio_pin>;
+ pinctrl-2 = <&P2_20_gpio_pu_pin>;
+ pinctrl-3 = <&P2_20_gpio_pd_pin>;
+ pinctrl-4 = <&P2_20_gpio_input_pin>;
+ };
+
+ /* P2_21 GND */
+
+ /* P2_22 (ZCZ ball V13) */
+ P2_22_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruin";
+ pinctrl-0 = <&P2_22_default_pin>;
+ pinctrl-1 = <&P2_22_gpio_pin>;
+ pinctrl-2 = <&P2_22_gpio_pu_pin>;
+ pinctrl-3 = <&P2_22_gpio_pd_pin>;
+ pinctrl-4 = <&P2_22_gpio_input_pin>;
+ pinctrl-5 = <&P2_22_qep_pin>;
+ pinctrl-6 = <&P2_22_pruin_pin>;
+ };
+
+ /* P2_23 VOUT-3.3V */
+
+ /* P2_24 (ZCZ ball T12) */
+ P2_24_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
+ pinctrl-0 = <&P2_24_default_pin>;
+ pinctrl-1 = <&P2_24_gpio_pin>;
+ pinctrl-2 = <&P2_24_gpio_pu_pin>;
+ pinctrl-3 = <&P2_24_gpio_pd_pin>;
+ pinctrl-4 = <&P2_24_gpio_input_pin>;
+ pinctrl-5 = <&P2_24_qep_pin>;
+ pinctrl-6 = <&P2_24_pruout_pin>;
+ };
+
+ /* P2_25 (ZCZ ball E17) spi */
+ P2_25_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "spi_cs", "uart", "can", "i2c";
+ pinctrl-0 = <&P2_25_default_pin>;
+ pinctrl-1 = <&P2_25_gpio_pin>;
+ pinctrl-2 = <&P2_25_gpio_pu_pin>;
+ pinctrl-3 = <&P2_25_gpio_pd_pin>;
+ pinctrl-4 = <&P2_25_gpio_input_pin>;
+ pinctrl-5 = <&P2_25_spi_pin>;
+ pinctrl-6 = <&P2_25_spi_cs_pin>;
+ pinctrl-7 = <&P2_25_uart_pin>;
+ pinctrl-8 = <&P2_25_can_pin>;
+ pinctrl-9 = <&P2_25_i2c_pin>;
+ };
+
+ /* P2_26 RESET# */
+
+ /* P2_27 (ZCZ ball E18) spi */
+ P2_27_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "uart", "can", "i2c";
+ pinctrl-0 = <&P2_27_default_pin>;
+ pinctrl-1 = <&P2_27_gpio_pin>;
+ pinctrl-2 = <&P2_27_gpio_pu_pin>;
+ pinctrl-3 = <&P2_27_gpio_pd_pin>;
+ pinctrl-4 = <&P2_27_gpio_input_pin>;
+ pinctrl-5 = <&P2_27_spi_pin>;
+ pinctrl-6 = <&P2_27_uart_pin>;
+ pinctrl-7 = <&P2_27_can_pin>;
+ pinctrl-8 = <&P2_27_i2c_pin>;
+ };
+
+ /* P2_28 (ZCZ ball D13) pruin */
+ P2_28_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P2_28_default_pin>;
+ pinctrl-1 = <&P2_28_gpio_pin>;
+ pinctrl-2 = <&P2_28_gpio_pu_pin>;
+ pinctrl-3 = <&P2_28_gpio_pd_pin>;
+ pinctrl-4 = <&P2_28_gpio_input_pin>;
+ pinctrl-5 = <&P2_28_qep_pin>;
+ pinctrl-6 = <&P2_28_pruout_pin>;
+ pinctrl-7 = <&P2_28_pruin_pin>;
+ };
+
+ /* P2_29 (ZCZ ball C18) spi_sclk */
+ P2_29_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "spi_sclk", "uart", "pwm", "pru_ecap";
+ pinctrl-0 = <&P2_29_default_pin>;
+ pinctrl-1 = <&P2_29_gpio_pin>;
+ pinctrl-2 = <&P2_29_gpio_pu_pin>;
+ pinctrl-3 = <&P2_29_gpio_pd_pin>;
+ pinctrl-4 = <&P2_29_gpio_input_pin>;
+ pinctrl-5 = <&P2_29_spi_cs_pin>;
+ pinctrl-6 = <&P2_29_spi_sclk_pin>;
+ pinctrl-7 = <&P2_29_uart_pin>;
+ pinctrl-8 = <&P2_29_pwm_pin>;
+ pinctrl-9 = <&P2_29_pru_ecap_pin>;
+ };
+
+ /* P2_30 (ZCZ ball C12) pruin */
+ P2_30_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P2_30_default_pin>;
+ pinctrl-1 = <&P2_30_gpio_pin>;
+ pinctrl-2 = <&P2_30_gpio_pu_pin>;
+ pinctrl-3 = <&P2_30_gpio_pd_pin>;
+ pinctrl-4 = <&P2_30_gpio_input_pin>;
+ pinctrl-5 = <&P2_30_spi_cs_pin>;
+ pinctrl-6 = <&P2_30_pwm_pin>;
+ pinctrl-7 = <&P2_30_pruout_pin>;
+ pinctrl-8 = <&P2_30_pruin_pin>;
+ };
+
+ /* P2_31 (ZCZ ball A15) spi_cs */
+ P2_31_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi_cs", "pruin";
+ pinctrl-0 = <&P2_31_default_pin>;
+ pinctrl-1 = <&P2_31_gpio_pin>;
+ pinctrl-2 = <&P2_31_gpio_pu_pin>;
+ pinctrl-3 = <&P2_31_gpio_pd_pin>;
+ pinctrl-4 = <&P2_31_gpio_input_pin>;
+ pinctrl-5 = <&P2_31_spi_cs_pin>;
+ pinctrl-6 = <&P2_31_pruin_pin>;
+ };
+
+ /* P2_32 (ZCZ ball D12) pruin */
+ P2_32_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "spi", "pwm", "pruout", "pruin";
+ pinctrl-0 = <&P2_32_default_pin>;
+ pinctrl-1 = <&P2_32_gpio_pin>;
+ pinctrl-2 = <&P2_32_gpio_pu_pin>;
+ pinctrl-3 = <&P2_32_gpio_pd_pin>;
+ pinctrl-4 = <&P2_32_gpio_input_pin>;
+ pinctrl-5 = <&P2_32_spi_pin>;
+ pinctrl-6 = <&P2_32_pwm_pin>;
+ pinctrl-7 = <&P2_32_pruout_pin>;
+ pinctrl-8 = <&P2_32_pruin_pin>;
+ };
+
+ /* P2_33 (ZCZ ball R12) */
+ P2_33_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout";
+ pinctrl-0 = <&P2_33_default_pin>;
+ pinctrl-1 = <&P2_33_gpio_pin>;
+ pinctrl-2 = <&P2_33_gpio_pu_pin>;
+ pinctrl-3 = <&P2_33_gpio_pd_pin>;
+ pinctrl-4 = <&P2_33_gpio_input_pin>;
+ pinctrl-5 = <&P2_33_qep_pin>;
+ pinctrl-6 = <&P2_33_pruout_pin>;
+ };
+
+ /* P2_34 (ZCZ ball C13) pruin */
+ P2_34_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "qep", "pruout", "pruin";
+ pinctrl-0 = <&P2_34_default_pin>;
+ pinctrl-1 = <&P2_34_gpio_pin>;
+ pinctrl-2 = <&P2_34_gpio_pu_pin>;
+ pinctrl-3 = <&P2_34_gpio_pd_pin>;
+ pinctrl-4 = <&P2_34_gpio_input_pin>;
+ pinctrl-5 = <&P2_34_qep_pin>;
+ pinctrl-6 = <&P2_34_pruout_pin>;
+ pinctrl-7 = <&P2_34_pruin_pin>;
+ };
+
+ /* P2_35 (ZCZ ball U5) gpio_input */
+ P2_35_pinmux {
+ compatible = "bone-pinmux-helper";
+ status = "okay";
+ pinctrl-names = "default", "gpio", "gpio_pu", "gpio_pd", "gpio_input", "pruout", "pruin";
+ pinctrl-0 = <&P2_35_default_pin>;
+ pinctrl-1 = <&P2_35_gpio_pin>;
+ pinctrl-2 = <&P2_35_gpio_pu_pin>;
+ pinctrl-3 = <&P2_35_gpio_pd_pin>;
+ pinctrl-4 = <&P2_35_gpio_input_pin>;
+ pinctrl-5 = <&P2_35_pruout_pin>;
+ pinctrl-6 = <&P2_35_pruin_pin>;
+ };
+
+ /* P2_36 (ZCZ ball C9) AIN7 */
+
+ cape-universal {
+ compatible = "gpio-of-helper";
+ status = "okay";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ P1_02 {
+ gpio-name = "P1_02";
+ gpio = <&gpio2 23 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_04 {
+ gpio-name = "P1_04";
+ gpio = <&gpio2 25 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_06 {
+ gpio-name = "P1_06";
+ gpio = <&gpio0 5 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_08 {
+ gpio-name = "P1_08";
+ gpio = <&gpio0 2 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_10 {
+ gpio-name = "P1_10";
+ gpio = <&gpio0 3 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_12 {
+ gpio-name = "P1_12";
+ gpio = <&gpio0 4 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_20 {
+ gpio-name = "P1_20";
+ gpio = <&gpio0 20 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_26 {
+ gpio-name = "P1_26";
+ gpio = <&gpio0 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_28 {
+ gpio-name = "P1_28";
+ gpio = <&gpio0 13 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_29 {
+ gpio-name = "P1_29";
+ gpio = <&gpio3 21 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_30 {
+ gpio-name = "P1_30";
+ gpio = <&gpio1 11 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_31 {
+ gpio-name = "P1_31";
+ gpio = <&gpio3 18 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_32 {
+ gpio-name = "P1_32";
+ gpio = <&gpio1 10 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_33 {
+ gpio-name = "P1_33";
+ gpio = <&gpio3 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_34 {
+ gpio-name = "P1_34";
+ gpio = <&gpio0 26 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_35 {
+ gpio-name = "P1_35";
+ gpio = <&gpio2 24 0>;
+ input;
+ dir-changeable;
+ };
+
+ P1_36 {
+ gpio-name = "P1_36";
+ gpio = <&gpio3 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_01 {
+ gpio-name = "P2_01";
+ gpio = <&gpio1 18 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_02 {
+ gpio-name = "P2_02";
+ gpio = <&gpio1 27 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_03 {
+ gpio-name = "P2_03";
+ gpio = <&gpio0 23 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_04 {
+ gpio-name = "P2_04";
+ gpio = <&gpio1 26 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_05 {
+ gpio-name = "P2_05";
+ gpio = <&gpio0 30 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_06 {
+ gpio-name = "P2_06";
+ gpio = <&gpio1 25 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_07 {
+ gpio-name = "P2_07";
+ gpio = <&gpio0 31 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_08 {
+ gpio-name = "P2_08";
+ gpio = <&gpio1 28 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_09 {
+ gpio-name = "P2_09";
+ gpio = <&gpio0 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_10 {
+ gpio-name = "P2_10";
+ gpio = <&gpio1 20 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_11 {
+ gpio-name = "P2_11";
+ gpio = <&gpio0 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_17 {
+ gpio-name = "P2_17";
+ gpio = <&gpio2 1 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_18 {
+ gpio-name = "P2_18";
+ gpio = <&gpio1 15 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_19 {
+ gpio-name = "P2_19";
+ gpio = <&gpio0 27 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_20 {
+ gpio-name = "P2_20";
+ gpio = <&gpio2 0 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_22 {
+ gpio-name = "P2_22";
+ gpio = <&gpio1 14 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_24 {
+ gpio-name = "P2_24";
+ gpio = <&gpio1 12 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_25 {
+ gpio-name = "P2_25";
+ gpio = <&gpio1 9 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_27 {
+ gpio-name = "P2_27";
+ gpio = <&gpio1 8 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_28 {
+ gpio-name = "P2_28";
+ gpio = <&gpio3 20 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_29 {
+ gpio-name = "P2_29";
+ gpio = <&gpio0 7 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_30 {
+ gpio-name = "P2_30";
+ gpio = <&gpio3 17 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_31 {
+ gpio-name = "P2_31";
+ gpio = <&gpio0 19 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_32 {
+ gpio-name = "P2_32";
+ gpio = <&gpio3 16 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_33 {
+ gpio-name = "P2_33";
+ gpio = <&gpio1 13 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_34 {
+ gpio-name = "P2_34";
+ gpio = <&gpio3 19 0>;
+ input;
+ dir-changeable;
+ };
+
+ P2_35 {
+ gpio-name = "P2_35";
+ gpio = <&gpio2 22 0>;
+ input;
+ dir-changeable;
+ };
+
+ };
+};
diff --git a/arch/arm/boot/dts/am33xx-l4.dtsi b/arch/arm/boot/dts/am33xx-l4.dtsi
index ced1a19..baba505 100644
--- a/arch/arm/boot/dts/am33xx-l4.dtsi
+++ b/arch/arm/boot/dts/am33xx-l4.dtsi
@@ -158,6 +158,39 @@
#interrupt-cells = <2>;
reg = <0x0 0x1000>;
interrupts = <96>;
+ gpio-line-names =
+ "MDIO_DATA", // 0
+ "MDIO_CLK", // 1
+ "SPI0_SCLK", // 2
+ "SPI0_D0", // 3
+ "SPI0_D1", // 4
+ "SPI0_CS0", // 5
+ "SPI0_CS1", // 6
+ "ECAP0_IN_PWM0_OUT", // 7
+ "LCD_DATA12", // 8
+ "LCD_DATA13", // 9
+ "LCD_DATA14", // 10
+ "LCD_DATA15", // 11
+ "UART1_CTSN", // 12
+ "UART1_RTSN", // 13
+ "UART1_RXD", // 14
+ "UART1_TXD", // 15
+ "GMII1_TXD3", // 16
+ "GMII1_TXD2", // 17
+ "USB0_DRVVBUS", // 18
+ "XDMA_EVENT_INTR0", // 19
+ "XDMA_EVENT_INTR1", // 20
+ "GMII1_TXD1", // 21
+ "GPMC_AD8", // 22
+ "GPMC_AD9", // 23
+ "NC", // 24
+ "NC", // 25
+ "GPMC_AD10", // 26
+ "GPMC_AD11", // 27
+ "GMII1_TXD0", // 28
+ "RMII1_REFCLK", // 29
+ "GPMC_WAIT0", // 30
+ "GPMC_WPN"; // 31
};
};
@@ -1299,6 +1332,39 @@
#interrupt-cells = <2>;
reg = <0x0 0x1000>;
interrupts = <98>;
+ gpio-line-names =
+ "GPMC_AD0", // 0
+ "GPMC_AD1", // 1
+ "GPMC_AD2", // 2
+ "GPMC_AD3", // 3
+ "GPMC_AD4", // 4
+ "GPMC_AD5", // 5
+ "GPMC_AD6", // 6
+ "GPMC_AD7", // 7
+ "UART0_CTSN", // 8
+ "UART0_RTSN", // 9
+ "UART0_RXD", // 10
+ "UART0_TXD", // 11
+ "GPMC_AD12", // 12
+ "GPMC_AD13", // 13
+ "GPMC_AD14", // 14
+ "GPMC_AD15", // 15
+ "GPMC_A0", // 16
+ "GPMC_A1", // 17
+ "GPMC_A2", // 18
+ "GPMC_A3", // 19
+ "GPMC_A4", // 20
+ "GPMC_A5", // 21
+ "GPMC_A6", // 22
+ "GPMC_A7", // 23
+ "GPMC_A8", // 24
+ "GPMC_A9", // 25
+ "GPMC_A10", // 26
+ "GPMC_A11", // 27
+ "GPMC_BE1N", // 28
+ "GPMC_CSN0", // 29
+ "GPMC_CSN1", // 30
+ "GPMC_CSN2"; // 31
};
};
@@ -1711,6 +1777,39 @@
#interrupt-cells = <2>;
reg = <0x0 0x1000>;
interrupts = <32>;
+ gpio-line-names =
+ "GPMC_CSN3", // 0
+ "GPMC_CLK", // 1
+ "GPMC_ADVN_ALE", // 2
+ "GPMC_OEN_REN", // 3
+ "GPMC_WEN", // 4
+ "GPMC_BE0N_CLE", // 5
+ "LCD_DATA0", // 6
+ "LCD_DATA1", // 7
+ "LCD_DATA2", // 8
+ "LCD_DATA3", // 9
+ "LCD_DATA4", // 10
+ "LCD_DATA5", // 11
+ "LCD_DATA6", // 12
+ "LCD_DATA7", // 13
+ "LCD_DATA8", // 14
+ "LCD_DATA9", // 15
+ "LCD_DATA10", // 16
+ "LCD_DATA11", // 17
+ "GMII1_RXD3", // 18
+ "GMII1_RXD2", // 19
+ "GMII1_RXD1", // 20
+ "GMII1_RXD0", // 21
+ "LCD_VSYNC", // 22
+ "LCD_HSYNC", // 23
+ "LCD_PCLK", // 24
+ "LCD_AC_BIAS_EN", // 25
+ "MMC0_DAT3", // 26
+ "MMC0_DAT2", // 27
+ "MMC0_DAT1", // 28
+ "MMC0_DAT0", // 29
+ "MMC0_CLK", // 30
+ "MMC0_CMD"; // 31
};
};
@@ -1745,6 +1844,39 @@
#interrupt-cells = <2>;
reg = <0x0 0x1000>;
interrupts = <62>;
+ gpio-line-names =
+ "GMII1_COL", // 0
+ "GMII1_CRS", // 1
+ "GMII1_RXER", // 2
+ "GMII1_TXEN", // 3
+ "GMII1_RXDV", // 4
+ "I2C0_SDA", // 5
+ "I2C0_SCL", // 6
+ "EMU0", // 7
+ "EMU1", // 8
+ "GMII1_TXCLK", // 9
+ "GMII1_RXCLK", // 10
+ "NC", // 11
+ "NC", // 12
+ "USB1_DRVVBUS", // 13
+ "MCASP0_ACLKX", // 14
+ "MCASP0_FSX", // 15
+ "MCASP0_AXR0", // 16
+ "MCASP0_AHCLKR", // 17
+ "MCASP0_ACLKR", // 18
+ "MCASP0_FSR", // 19
+ "MCASP0_AXR1", // 20
+ "MCASP0_AHCLKX", // 21
+ "NC", // 22
+ "NC", // 23
+ "NC", // 24
+ "NC", // 25
+ "NC", // 26
+ "NC", // 27
+ "NC", // 28
+ "NC", // 29
+ "NC", // 30
+ "NC"; // 31
};
};
@@ -1910,6 +2042,16 @@
status = "disabled";
};
+ eqep0: eqep@180 {
+ compatible = "ti,am33xx-eqep";
+ reg = <0x180 0x80>;
+ clocks = <&l4ls_gclk>;
+ clock-names = "fck";
+ interrupts = <79>;
+ interrupt-names = "eqep0";
+ status = "disabled";
+ };
+
ehrpwm0: pwm@200 {
compatible = "ti,am3352-ehrpwm",
"ti,am33xx-ehrpwm";
@@ -1963,6 +2105,16 @@
status = "disabled";
};
+ eqep1: eqep@180 {
+ compatible = "ti,am33xx-eqep";
+ reg = <0x180 0x80>;
+ clocks = <&l4ls_gclk>;
+ clock-names = "fck";
+ interrupts = <88>;
+ interrupt-names = "eqep1";
+ status = "disabled";
+ };
+
ehrpwm1: pwm@200 {
compatible = "ti,am3352-ehrpwm",
"ti,am33xx-ehrpwm";
@@ -2016,6 +2168,16 @@
status = "disabled";
};
+ eqep2: eqep@180 {
+ compatible = "ti,am33xx-eqep";
+ reg = <0x180 0x80>;
+ clocks = <&l4ls_gclk>;
+ clock-names = "fck";
+ interrupts = <89>;
+ interrupt-names = "eqep2";
+ status = "disabled";
+ };
+
ehrpwm2: pwm@200 {
compatible = "ti,am3352-ehrpwm",
"ti,am33xx-ehrpwm";
diff --git a/arch/arm/boot/dts/am33xx.dtsi b/arch/arm/boot/dts/am33xx.dtsi
index 30778a4..d2abdcf 100644
--- a/arch/arm/boot/dts/am33xx.dtsi
+++ b/arch/arm/boot/dts/am33xx.dtsi
@@ -160,7 +160,7 @@
* for the moment, just use a fake OCP bus entry to represent
* the whole bus hierarchy.
*/
- ocp {
+ ocp: ocp {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
index d02f5fa..361f66b 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
+++ b/arch/arm/boot/dts/am57xx-beagle-x15-common.dtsi
@@ -164,6 +164,10 @@
};
};
+&bb2d {
+ status = "okay";
+};
+
&i2c1 {
status = "okay";
clock-frequency = <400000>;
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 953f0ff..05ebd38 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -377,6 +377,16 @@
ti,hwmods = "dmm";
};
+ bb2d: bb2d@59000000 {
+ compatible = "ti,dra7-bb2d","vivante,gc";
+ reg = <0x59000000 0x0700>;
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
+ ti,hwmods = "bb2d";
+ clocks = <&dpll_core_h24x2_ck>;
+ clock-names = "fclk";
+ status = "disabled";
+ };
+
mmu0_dsp1: mmu@40d01000 {
compatible = "ti,dra7-dsp-iommu";
reg = <0x40d01000 0x100>;
diff --git a/arch/arm/boot/dts/imx6q-evi.dts b/arch/arm/boot/dts/imx6q-evi.dts
index c63f371..546d9d4 100644
--- a/arch/arm/boot/dts/imx6q-evi.dts
+++ b/arch/arm/boot/dts/imx6q-evi.dts
@@ -55,18 +55,6 @@
reg = <0x10000000 0x40000000>;
};
- reg_usbh1_vbus: regulator-usbhubreset {
- compatible = "regulator-fixed";
- regulator-name = "usbh1_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- startup-delay-us = <2>;
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usbh1_hubreset>;
- gpio = <&gpio7 12 GPIO_ACTIVE_HIGH>;
- };
-
reg_usb_otg_vbus: regulator-usbotgvbus {
compatible = "regulator-fixed";
regulator-name = "usb_otg_vbus";
@@ -214,12 +202,18 @@
};
&usbh1 {
- vbus-supply = <®_usbh1_vbus>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh1>;
dr_mode = "host";
disable-over-current;
status = "okay";
+
+ usb2415host: hub@1 {
+ compatible = "usb424,2513";
+ reg = <1>;
+ reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
+ reset-duration-us = <3000>;
+ };
};
&usbotg {
@@ -482,11 +476,6 @@
MX6QDL_PAD_GPIO_3__USB_H1_OC 0x1b0b0
/* usbh1_b OC */
MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x1b0b0
- >;
- };
-
- pinctrl_usbh1_hubreset: usbh1hubresetgrp {
- fsl,pins = <
MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
>;
};
diff --git a/arch/arm/boot/dts/imx6qdl-udoo.dtsi b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
index 776bfc7..554f601 100644
--- a/arch/arm/boot/dts/imx6qdl-udoo.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-udoo.dtsi
@@ -5,6 +5,8 @@
* Author: Fabio Estevam <fabio.estevam@freescale.com>
*/
+#include <dt-bindings/gpio/gpio.h>
+
/ {
aliases {
backlight = &backlight;
@@ -62,17 +64,6 @@
#address-cells = <1>;
#size-cells = <0>;
- reg_usb_h1_vbus: regulator@0 {
- compatible = "regulator-fixed";
- reg = <0>;
- regulator-name = "usb_h1_vbus";
- regulator-min-microvolt = <5000000>;
- regulator-max-microvolt = <5000000>;
- enable-active-high;
- startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */
- gpio = <&gpio7 12 0>;
- };
-
reg_panel: regulator@1 {
compatible = "regulator-fixed";
reg = <1>;
@@ -93,6 +84,17 @@
mux-int-port = <1>;
mux-ext-port = <6>;
};
+
+ udoo_ard: udoo_ard_manager {
+ compatible = "udoo,imx6q-udoo-ard";
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_udooard>;
+ bossac-clk-gpio = <&gpio6 3 0>;
+ bossac-dat-gpio = <&gpio5 18 0>;
+ bossac-erase-gpio = <&gpio4 21 0>;
+ bossac-reset-gpio = <&gpio1 0 0>;
+ status = "okay";
+ };
};
&fec {
@@ -205,11 +207,20 @@
pinctrl_usbh: usbhgrp {
fsl,pins = <
- MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000
+ MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x1b0b0
MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0
>;
};
+ pinctrl_udooard: udooardgrp {
+ fsl,pins = <
+ MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 0x80000000
+ MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x80000000
+ MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x80000000
+ MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000
+ >;
+ };
+
pinctrl_usdhc3: usdhc3grp {
fsl,pins = <
MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
@@ -282,9 +293,16 @@
&usbh1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh>;
- vbus-supply = <®_usb_h1_vbus>;
- clocks = <&clks IMX6QDL_CLK_CKO>;
status = "okay";
+
+ usb2415: hub@1 {
+ compatible = "usb424,2514";
+ reg = <1>;
+
+ clocks = <&clks IMX6QDL_CLK_CKO>;
+ reset-gpios = <&gpio7 12 GPIO_ACTIVE_LOW>;
+ reset-duration-us = <3000>;
+ };
};
&usdhc3 {
diff --git a/arch/arm/boot/dts/imx6qdl-wandboard-revb1.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard-revb1.dtsi
index e781a45..68daf55 100644
--- a/arch/arm/boot/dts/imx6qdl-wandboard-revb1.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard-revb1.dtsi
@@ -6,6 +6,24 @@
#include "imx6qdl-wandboard.dtsi"
+/ {
+ rfkill {
+ compatible = "wand,imx6qdl-wandboard-rfkill";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ bluetooth-on = <&gpio3 13 0>;
+ bluetooth-wake = <&gpio3 14 0>;
+ bluetooth-host-wake = <&gpio3 15 0>;
+
+ wifi-ref-on = <&gpio2 29 0>;
+ wifi-rst-n = <&gpio5 2 0>;
+ wifi-reg-on = <&gpio1 26 0>;
+ wifi-host-wake = <&gpio1 29 0>;
+ wifi-wake = <&gpio1 30 0>;
+ };
+};
+
&iomuxc {
pinctrl-0 = <&pinctrl_hog>;
@@ -31,6 +49,5 @@
&usdhc2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2>;
- non-removable;
status = "okay";
};
diff --git a/arch/arm/boot/dts/imx6qdl-wandboard-revc1.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard-revc1.dtsi
index 3874e74..be5445d 100644
--- a/arch/arm/boot/dts/imx6qdl-wandboard-revc1.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard-revc1.dtsi
@@ -6,6 +6,24 @@
#include "imx6qdl-wandboard.dtsi"
+/ {
+ rfkill {
+ compatible = "wand,imx6qdl-wandboard-rfkill";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ bluetooth-on = <&gpio5 21 0>;
+ bluetooth-wake = <&gpio5 30 0>;
+ bluetooth-host-wake = <&gpio5 20 0>;
+
+ wifi-ref-on = <&gpio5 31 0>; /* Wifi Power Enable */
+ wifi-rst-n = <&gpio6 0 0>; /* WIFI_ON reset */
+ wifi-reg-on = <&gpio1 26 0>; /* WL_REG_ON */
+ wifi-host-wake = <&gpio1 29 0>; /* WL_HOST_WAKE */
+ wifi-wake = <&gpio1 30 0>; /* WL_WAKE */
+ };
+};
+
&iomuxc {
pinctrl-0 = <&pinctrl_hog>;
diff --git a/arch/arm/boot/dts/imx6qdl-wandboard-revd1.dtsi b/arch/arm/boot/dts/imx6qdl-wandboard-revd1.dtsi
index 9390979..d595f4e 100644
--- a/arch/arm/boot/dts/imx6qdl-wandboard-revd1.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-wandboard-revd1.dtsi
@@ -7,6 +7,26 @@
#include "imx6qdl-wandboard.dtsi"
/ {
+ rfkill {
+ compatible = "wand,imx6qdl-wandboard-rfkill";
+ pinctrl-names = "default";
+ pinctrl-0 = <>;
+
+ bluetooth-on = <&gpio5 30 0>; /* BT_RST_N */
+ bluetooth-wake = <&gpio5 21 0>; /* BT_WAKE */
+ bluetooth-host-wake = <&gpio5 20 0>; /* BT_HOST_WAKE */
+
+ wifi-ref-on = <&gpio6 0 0>; /* WIFI_ON: M4: CSI0_DAT14 */
+ wifi-reg-on = <&gpio1 26 0>; /* WL_REG_ON: W22: ENET_RXD1 */
+ wifi-host-wake = <&gpio1 29 0>; /* WL_HOST_WAKE: W20: ENET_TXD1 */
+
+ //HACK: use un-populated pins for missing rfkill pins, dont want to fix the driver...
+ //GPIO6_IO17 - SD3_DAT7
+ //GPIO6_IO18 - SD3_DAT6
+ wifi-rst-n = <&gpio6 17 0>; /* NOT POPULATED */
+ wifi-wake = <&gpio6 18 0>; /* NOT POPULATED */
+ };
+
reg_eth_phy: regulator-eth-phy {
compatible = "regulator-fixed";
regulator-name = "ETH_PHY";
diff --git a/arch/arm/boot/dts/imx6qdl.dtsi b/arch/arm/boot/dts/imx6qdl.dtsi
index 9dcee3b..9bf76f0 100644
--- a/arch/arm/boot/dts/imx6qdl.dtsi
+++ b/arch/arm/boot/dts/imx6qdl.dtsi
@@ -987,6 +987,8 @@
usbh1: usb@2184200 {
compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x02184200 0x200>;
interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_USBOH3>;
@@ -1001,6 +1003,8 @@
usbh2: usb@2184400 {
compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x02184400 0x200>;
interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_USBOH3>;
@@ -1016,6 +1020,8 @@
usbh3: usb@2184600 {
compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
+ #address-cells = <1>;
+ #size-cells = <0>;
reg = <0x02184600 0x200>;
interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6QDL_CLK_USBOH3>;
diff --git a/arch/arm/boot/dts/imx7d-pico-pi.dts b/arch/arm/boot/dts/imx7d-pico-pi.dts
index 70bea95..a50edba 100644
--- a/arch/arm/boot/dts/imx7d-pico-pi.dts
+++ b/arch/arm/boot/dts/imx7d-pico-pi.dts
@@ -8,6 +8,10 @@
model = "TechNexion PICO-IMX7D Board and PI baseboard";
compatible = "technexion,imx7d-pico-pi", "fsl,imx7d";
+ chosen {
+ stdout-path = "serial4:115200n8";
+ };
+
leds {
compatible = "gpio-leds";
pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/omap3-beagle-xm.dts b/arch/arm/boot/dts/omap3-beagle-xm.dts
index 1aa99fc..28d5c07 100644
--- a/arch/arm/boot/dts/omap3-beagle-xm.dts
+++ b/arch/arm/boot/dts/omap3-beagle-xm.dts
@@ -152,6 +152,7 @@
};
etb@5401b000 {
+ status = "disabled";
compatible = "arm,coresight-etb10", "arm,primecell";
reg = <0x5401b000 0x1000>;
@@ -167,6 +168,7 @@
};
etm@54010000 {
+ status = "disabled";
compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0x54010000 0x1000>;
@@ -214,6 +216,25 @@
>;
};
+ spi3_pins: pinmux_spi3_pins {
+ pinctrl-single,pins = <
+ OMAP3_CORE1_IOPAD(0x2128, PIN_INPUT | MUX_MODE1) /* sdmmc2_clk.mcspi3_clk gpio_130 */
+ OMAP3_CORE1_IOPAD(0x212a, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_cmd.mcspi3_simo gpio_131 */
+ OMAP3_CORE1_IOPAD(0x212c, PIN_INPUT_PULLUP | MUX_MODE1) /* sdmmc2_dat0.mcspi3_somi gpio_132 */
+ OMAP3_CORE1_IOPAD(0x2130, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat2.mcspi3_cs1 gpio_134 */
+ OMAP3_CORE1_IOPAD(0x2132, PIN_OUTPUT | MUX_MODE1) /* sdmmc2_dat3.mcspi3_cs0 gpio_135 */
+ >;
+ };
+
+ spi4_pins: pinmux_spi4_pins {
+ pinctrl-single,pins = <
+ OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT | MUX_MODE1) /* mcbsp1_clkr.mcspi4_clk gpio_156 */
+ OMAP3_CORE1_IOPAD(0x2160, PIN_OUTPUT | MUX_MODE1) /* mcbsp1_dx.mcspi4_simo gpio_158 */
+ OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE1) /* mcbsp1_dr.mcspi4_somi gpio_159 */
+ OMAP3_CORE1_IOPAD(0x2166, PIN_OUTPUT | MUX_MODE1) /* mcbsp1_fsx.mcspi4_cs0 gpio_161 */
+ >;
+ };
+
hsusb2_pins: pinmux_hsusb2_pins {
pinctrl-single,pins = <
OMAP3_CORE1_IOPAD(0x21d4, PIN_INPUT_PULLDOWN | MUX_MODE3) /* mcspi1_cs3.hsusb2_data2 */
@@ -291,7 +312,7 @@
};
twl_power: power {
- compatible = "ti,twl4030-power-beagleboard-xm", "ti,twl4030-power-idle-osc-off";
+ compatible = "ti,twl4030-power-reset";
ti,use_poweroff;
};
};
@@ -322,6 +343,36 @@
status = "disabled";
};
+&mcspi3 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi3_pins>;
+ status = "okay";
+
+ spidev0: spi@0 {
+ compatible = "spidev";
+ reg = <0>;
+ spi-max-frequency = <48000000>;
+ };
+
+ spidev1: spi@1 {
+ compatible = "spidev";
+ reg = <1>;
+ spi-max-frequency = <48000000>;
+ };
+};
+
+&mcspi4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&spi4_pins>;
+ status = "okay";
+
+ spidev2: spi@0 {
+ compatible = "spidev";
+ reg = <0>;
+ spi-max-frequency = <48000000>;
+ };
+};
+
&twl_gpio {
ti,use-leds;
/* pullups: BIT(1) */
diff --git a/arch/arm/boot/dts/omap3-beagle.dts b/arch/arm/boot/dts/omap3-beagle.dts
index e3df3c1..64f0787 100644
--- a/arch/arm/boot/dts/omap3-beagle.dts
+++ b/arch/arm/boot/dts/omap3-beagle.dts
@@ -139,6 +139,7 @@
};
etb@540000000 {
+ status = "disabled";
compatible = "arm,coresight-etb10", "arm,primecell";
reg = <0x5401b000 0x1000>;
@@ -154,6 +155,7 @@
};
etm@54010000 {
+ status = "disabled";
compatible = "arm,coresight-etm3x", "arm,primecell";
reg = <0x54010000 0x1000>;
@@ -272,9 +274,18 @@
codec {
};
};
+
+ twl_power: power {
+ compatible = "ti,twl4030-power-reset";
+ ti,use_poweroff;
+ };
};
};
+&i2c2 {
+ clock-frequency = <400000>;
+};
+
#include "twl4030.dtsi"
#include "twl4030_omap3.dtsi"
diff --git a/arch/arm/boot/dts/omap4-panda-a4.dts b/arch/arm/boot/dts/omap4-panda-a4.dts
index 6408307..065f3db 100644
--- a/arch/arm/boot/dts/omap4-panda-a4.dts
+++ b/arch/arm/boot/dts/omap4-panda-a4.dts
@@ -7,6 +7,18 @@
#include "omap443x.dtsi"
#include "omap4-panda-common.dtsi"
+&emif1 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
+ status = "ok";
+};
+
+&emif2 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
+ status = "ok";
+};
+
/* Pandaboard Rev A4+ have external pullups on SCL & SDA */
&dss_hdmi_pins {
pinctrl-single,pins = <
diff --git a/arch/arm/boot/dts/omap4-panda-common.dtsi b/arch/arm/boot/dts/omap4-panda-common.dtsi
index 14be2ec..e5f842c 100644
--- a/arch/arm/boot/dts/omap4-panda-common.dtsi
+++ b/arch/arm/boot/dts/omap4-panda-common.dtsi
@@ -481,16 +481,6 @@
};
};
-&emif1 {
- cs1-used;
- device-handle = <&elpida_ECB240ABACN>;
-};
-
-&emif2 {
- cs1-used;
- device-handle = <&elpida_ECB240ABACN>;
-};
-
&mcbsp1 {
pinctrl-names = "default";
pinctrl-0 = <&mcbsp1_pins>;
diff --git b/arch/arm/boot/dts/omap4-panda-es-b3.dts b/arch/arm/boot/dts/omap4-panda-es-b3.dts
new file mode 100644
index 0000000..19d02df
--- /dev/null
+++ b/arch/arm/boot/dts/omap4-panda-es-b3.dts
@@ -0,0 +1,85 @@
+/*
+ * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "omap4460.dtsi"
+#include "omap4-panda-common.dtsi"
+
+/ {
+ model = "TI OMAP4 PandaBoard-ES";
+ compatible = "ti,omap4-panda-es", "ti,omap4-panda", "ti,omap4460", "ti,omap4430", "ti,omap4";
+};
+
+/* Audio routing is differnet between PandaBoard4430 and PandaBoardES */
+&sound {
+ ti,model = "PandaBoardES";
+
+ /* Audio routing */
+ ti,audio-routing =
+ "Headset Stereophone", "HSOL",
+ "Headset Stereophone", "HSOR",
+ "Ext Spk", "HFL",
+ "Ext Spk", "HFR",
+ "Line Out", "AUXL",
+ "Line Out", "AUXR",
+ "AFML", "Line In",
+ "AFMR", "Line In";
+};
+
+/* PandaboardES has external pullups on SCL & SDA */
+&dss_hdmi_pins {
+ pinctrl-single,pins = <
+ OMAP4_IOPAD(0x09a, PIN_INPUT | MUX_MODE0) /* hdmi_cec.hdmi_cec */
+ OMAP4_IOPAD(0x09c, PIN_INPUT | MUX_MODE0) /* hdmi_scl.hdmi_scl */
+ OMAP4_IOPAD(0x09e, PIN_INPUT | MUX_MODE0) /* hdmi_sda.hdmi_sda */
+ >;
+};
+
+&omap4_pmx_core {
+ led_gpio_pins: gpio_led_pmx {
+ pinctrl-single,pins = <
+ OMAP4_IOPAD(0x0f6, PIN_OUTPUT | MUX_MODE3) /* gpio_110 */
+ >;
+ };
+
+ button_pins: pinmux_button_pins {
+ pinctrl-single,pins = <
+ OMAP4_IOPAD(0x11b, PIN_INPUT_PULLUP | MUX_MODE3) /* gpio_113 */
+ >;
+ };
+};
+
+&led_wkgpio_pins {
+ pinctrl-single,pins = <
+ OMAP4_IOPAD(0x05c, PIN_OUTPUT | MUX_MODE3) /* gpio_wk8 */
+ >;
+};
+
+&leds {
+ pinctrl-0 = <
+ &led_gpio_pins
+ &led_wkgpio_pins
+ >;
+
+ heartbeat {
+ gpios = <&gpio4 14 GPIO_ACTIVE_HIGH>;
+ };
+ mmc {
+ gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
+ };
+};
+
+&gpio_keys {
+ buttonS2 {
+ gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* gpio_113 */
+ };
+};
+
+&gpio1_target {
+ ti,no-reset-on-init;
+};
diff --git a/arch/arm/boot/dts/omap4-panda-es.dts b/arch/arm/boot/dts/omap4-panda-es.dts
index 9dd307b..ea4dce2 100644
--- a/arch/arm/boot/dts/omap4-panda-es.dts
+++ b/arch/arm/boot/dts/omap4-panda-es.dts
@@ -12,6 +12,18 @@
compatible = "ti,omap4-panda-es", "ti,omap4-panda", "ti,omap4460", "ti,omap4430", "ti,omap4";
};
+&emif1 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
+ status = "ok";
+};
+
+&emif2 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
+ status = "ok";
+};
+
/* Audio routing is differnet between PandaBoard4430 and PandaBoardES */
&sound {
ti,model = "PandaBoardES";
diff --git a/arch/arm/boot/dts/omap4-panda.dts b/arch/arm/boot/dts/omap4-panda.dts
index fb2f477..2ca852e 100644
--- a/arch/arm/boot/dts/omap4-panda.dts
+++ b/arch/arm/boot/dts/omap4-panda.dts
@@ -11,3 +11,15 @@
model = "TI OMAP4 PandaBoard";
compatible = "ti,omap4-panda", "ti,omap4430", "ti,omap4";
};
+
+&emif1 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
+ status = "ok";
+};
+
+&emif2 {
+ cs1-used;
+ device-handle = <&elpida_ECB240ABACN>;
+ status = "ok";
+};
diff --git a/arch/arm/boot/dts/omap4-sdp.dts b/arch/arm/boot/dts/omap4-sdp.dts
index 3c27496..97001fe 100644
--- a/arch/arm/boot/dts/omap4-sdp.dts
+++ b/arch/arm/boot/dts/omap4-sdp.dts
@@ -521,11 +521,13 @@
&emif1 {
cs1-used;
device-handle = <&elpida_ECB240ABACN>;
+ status = "ok";
};
&emif2 {
cs1-used;
device-handle = <&elpida_ECB240ABACN>;
+ status = "ok";
};
&keypad {
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index c43e52f..ec51eaa 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -252,6 +252,7 @@
hw-caps-read-idle-ctrl;
hw-caps-ll-interface;
hw-caps-temp-alert;
+ status = "disabled";
};
emif2: emif@4d000000 {
@@ -264,6 +265,7 @@
hw-caps-read-idle-ctrl;
hw-caps-ll-interface;
hw-caps-temp-alert;
+ status = "disabled";
};
aes1: aes@4b501000 {
diff --git a/arch/arm/boot/dts/twl6030.dtsi b/arch/arm/boot/dts/twl6030.dtsi
index 9d588cf..c0094e0 100644
--- a/arch/arm/boot/dts/twl6030.dtsi
+++ b/arch/arm/boot/dts/twl6030.dtsi
@@ -80,6 +80,11 @@
regulator-always-on;
};
+ clk32kg: regulator-clk32kg {
+ compatible = "ti,twl6030-clk32kg";
+ regulator-always-on;
+ };
+
twl_usb_comparator: usb-comparator {
compatible = "ti,twl6030-usb";
interrupts = <4>, <10>;
diff --git a/arch/arm/mach-imx/devices/Kconfig b/arch/arm/mach-imx/devices/Kconfig
index fdca73d..95e0e8e 100644
--- a/arch/arm/mach-imx/devices/Kconfig
+++ b/arch/arm/mach-imx/devices/Kconfig
@@ -69,3 +69,9 @@ config IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX
config IMX_HAVE_PLATFORM_SPI_IMX
bool
+
+config WAND_RFKILL
+ tristate "Wandboard RF Kill support"
+ depends on SOC_IMX6Q
+ default m
+ select RFKILL
diff --git a/arch/arm/mach-imx/devices/Makefile b/arch/arm/mach-imx/devices/Makefile
index e44758a..c179a55 100644
--- a/arch/arm/mach-imx/devices/Makefile
+++ b/arch/arm/mach-imx/devices/Makefile
@@ -26,3 +26,4 @@ obj-$(CONFIG_IMX_HAVE_PLATFORM_MXC_W1) += platform-mxc_w1.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_SDHCI_ESDHC_IMX) += platform-sdhci-esdhc-imx.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_SPI_IMX) += platform-spi_imx.o
obj-$(CONFIG_IMX_HAVE_PLATFORM_MX2_EMMA) += platform-mx2-emma.o
+obj-$(CONFIG_WAND_RFKILL) += wand-rfkill.o
diff --git b/arch/arm/mach-imx/devices/wand-rfkill.c b/arch/arm/mach-imx/devices/wand-rfkill.c
new file mode 100644
index 0000000..da7ef9f
--- /dev/null
+++ b/arch/arm/mach-imx/devices/wand-rfkill.c
@@ -0,0 +1,290 @@
+/*
+ * arch/arm/mach-imx/devices/wand-rfkill.c
+ *
+ * Copyright (C) 2013 Vladimir Ermakov <vooon341@gmail.com>
+ *
+ * based on net/rfkill/rfkill-gpio.c
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/of_device.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/platform_device.h>
+#include <linux/rfkill.h>
+#include <linux/delay.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/slab.h>
+
+
+struct wand_rfkill_data {
+ struct rfkill *rfkill_dev;
+ int shutdown_gpio;
+ const char *shutdown_name;
+};
+
+static int wand_rfkill_set_block(void *data, bool blocked)
+{
+ struct wand_rfkill_data *rfkill = data;
+
+ pr_debug("wandboard-rfkill: set block %d\n", blocked);
+
+ if (blocked) {
+ if (gpio_is_valid(rfkill->shutdown_gpio))
+ gpio_direction_output(rfkill->shutdown_gpio, 0);
+ } else {
+ if (gpio_is_valid(rfkill->shutdown_gpio))
+ gpio_direction_output(rfkill->shutdown_gpio, 1);
+ }
+
+ return 0;
+}
+
+static const struct rfkill_ops wand_rfkill_ops = {
+ .set_block = wand_rfkill_set_block,
+};
+
+static int wand_rfkill_wifi_probe(struct device *dev,
+ struct device_node *np,
+ struct wand_rfkill_data *rfkill)
+{
+ int ret;
+ int wl_ref_on, wl_rst_n, wl_reg_on, wl_wake, wl_host_wake;
+
+ wl_ref_on = of_get_named_gpio(np, "wifi-ref-on", 0);
+ wl_rst_n = of_get_named_gpio(np, "wifi-rst-n", 0);
+ wl_reg_on = of_get_named_gpio(np, "wifi-reg-on", 0);
+ wl_wake = of_get_named_gpio(np, "wifi-wake", 0);
+ wl_host_wake = of_get_named_gpio(np, "wifi-host-wake", 0);
+
+ if (!gpio_is_valid(wl_rst_n) || !gpio_is_valid(wl_ref_on) ||
+ !gpio_is_valid(wl_reg_on) || !gpio_is_valid(wl_wake) ||
+ !gpio_is_valid(wl_host_wake)) {
+
+ dev_err(dev, "incorrect wifi gpios (%d %d %d %d %d)\n",
+ wl_rst_n, wl_ref_on, wl_reg_on, wl_wake, wl_host_wake);
+ return -EINVAL;
+ }
+
+ dev_info(dev, "initialize wifi chip\n");
+
+ gpio_request(wl_rst_n, "wl_rst_n");
+ gpio_direction_output(wl_rst_n, 0);
+ msleep(11);
+ gpio_set_value(wl_rst_n, 1);
+
+ gpio_request(wl_ref_on, "wl_ref_on");
+ gpio_direction_output(wl_ref_on, 1);
+
+ gpio_request(wl_reg_on, "wl_reg_on");
+ gpio_direction_output(wl_reg_on, 1);
+
+ gpio_request(wl_wake, "wl_wake");
+ gpio_direction_output(wl_wake, 1);
+
+ gpio_request(wl_host_wake, "wl_host_wake");
+ gpio_direction_input(wl_host_wake);
+
+ rfkill->shutdown_name = "wifi_shutdown";
+ rfkill->shutdown_gpio = wl_wake;
+
+ rfkill->rfkill_dev = rfkill_alloc("wifi-rfkill", dev, RFKILL_TYPE_WLAN,
+ &wand_rfkill_ops, rfkill);
+ if (!rfkill->rfkill_dev) {
+ ret = -ENOMEM;
+ goto wifi_fail_free_gpio;
+ }
+
+ ret = rfkill_register(rfkill->rfkill_dev);
+ if (ret < 0)
+ goto wifi_fail_unregister;
+
+ dev_info(dev, "wifi-rfkill registered.\n");
+
+ return 0;
+
+wifi_fail_unregister:
+ rfkill_destroy(rfkill->rfkill_dev);
+wifi_fail_free_gpio:
+ if (gpio_is_valid(wl_rst_n)) gpio_free(wl_rst_n);
+ if (gpio_is_valid(wl_ref_on)) gpio_free(wl_ref_on);
+ if (gpio_is_valid(wl_reg_on)) gpio_free(wl_reg_on);
+ if (gpio_is_valid(wl_wake)) gpio_free(wl_wake);
+ if (gpio_is_valid(wl_host_wake)) gpio_free(wl_host_wake);
+
+ return ret;
+}
+
+static int wand_rfkill_bt_probe(struct device *dev,
+ struct device_node *np,
+ struct wand_rfkill_data *rfkill)
+{
+ int ret;
+ int bt_on, bt_wake, bt_host_wake;
+
+ bt_on = of_get_named_gpio(np, "bluetooth-on", 0);
+ bt_wake = of_get_named_gpio(np, "bluetooth-wake", 0);
+ bt_host_wake = of_get_named_gpio(np, "bluetooth-host-wake", 0);
+
+ if (!gpio_is_valid(bt_on) || !gpio_is_valid(bt_wake) ||
+ !gpio_is_valid(bt_host_wake)) {
+
+ dev_err(dev, "incorrect bt gpios (%d %d %d)\n",
+ bt_on, bt_wake, bt_host_wake);
+ return -EINVAL;
+ }
+
+ dev_info(dev, "initialize bluetooth chip\n");
+
+ gpio_request(bt_on, "bt_on");
+ gpio_direction_output(bt_on, 0);
+ msleep(11);
+ gpio_set_value(bt_on, 1);
+
+ gpio_request(bt_wake, "bt_wake");
+ gpio_direction_output(bt_wake, 1);
+
+ gpio_request(bt_host_wake, "bt_host_wake");
+ gpio_direction_input(bt_host_wake);
+
+ rfkill->shutdown_name = "bluetooth_shutdown";
+ rfkill->shutdown_gpio = bt_wake;
+
+ rfkill->rfkill_dev = rfkill_alloc("bluetooth-rfkill", dev, RFKILL_TYPE_BLUETOOTH,
+ &wand_rfkill_ops, rfkill);
+ if (!rfkill->rfkill_dev) {
+ ret = -ENOMEM;
+ goto bt_fail_free_gpio;
+ }
+
+ ret = rfkill_register(rfkill->rfkill_dev);
+ if (ret < 0)
+ goto bt_fail_unregister;
+
+ dev_info(dev, "bluetooth-rfkill registered.\n");
+
+ return 0;
+
+bt_fail_unregister:
+ rfkill_destroy(rfkill->rfkill_dev);
+bt_fail_free_gpio:
+ if (gpio_is_valid(bt_on)) gpio_free(bt_on);
+ if (gpio_is_valid(bt_wake)) gpio_free(bt_wake);
+ if (gpio_is_valid(bt_host_wake)) gpio_free(bt_host_wake);
+
+ return ret;
+}
+
+static int wand_rfkill_probe(struct platform_device *pdev)
+{
+ struct wand_rfkill_data *rfkill;
+ struct pinctrl *pinctrl;
+ int ret;
+
+ dev_info(&pdev->dev, "Wandboard rfkill initialization\n");
+
+ if (!pdev->dev.of_node) {
+ dev_err(&pdev->dev, "no device tree node\n");
+ return -ENODEV;
+ }
+
+ rfkill = kzalloc(sizeof(*rfkill) * 2, GFP_KERNEL);
+ if (!rfkill)
+ return -ENOMEM;
+
+ pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
+ if (IS_ERR(pinctrl)) {
+ int ret = PTR_ERR(pinctrl);
+ dev_err(&pdev->dev, "failed to get default pinctrl: %d\n", ret);
+ return ret;
+ }
+
+ /* setup WiFi */
+ ret = wand_rfkill_wifi_probe(&pdev->dev, pdev->dev.of_node, &rfkill[0]);
+ if (ret < 0)
+ goto fail_free_rfkill;
+
+ /* setup bluetooth */
+ ret = wand_rfkill_bt_probe(&pdev->dev, pdev->dev.of_node, &rfkill[1]);
+ if (ret < 0)
+ goto fail_unregister_wifi;
+
+ platform_set_drvdata(pdev, rfkill);
+
+ return 0;
+
+fail_unregister_wifi:
+ if (rfkill[1].rfkill_dev) {
+ rfkill_unregister(rfkill[1].rfkill_dev);
+ rfkill_destroy(rfkill[1].rfkill_dev);
+ }
+
+ /* TODO free gpio */
+
+fail_free_rfkill:
+ kfree(rfkill);
+
+ return ret;
+}
+
+static int wand_rfkill_remove(struct platform_device *pdev)
+{
+ struct wand_rfkill_data *rfkill = platform_get_drvdata(pdev);
+
+ dev_info(&pdev->dev, "Module unloading\n");
+
+ if (!rfkill)
+ return 0;
+
+ /* WiFi */
+ if (gpio_is_valid(rfkill[0].shutdown_gpio))
+ gpio_free(rfkill[0].shutdown_gpio);
+
+ rfkill_unregister(rfkill[0].rfkill_dev);
+ rfkill_destroy(rfkill[0].rfkill_dev);
+
+ /* Bt */
+ if (gpio_is_valid(rfkill[1].shutdown_gpio))
+ gpio_free(rfkill[1].shutdown_gpio);
+
+ rfkill_unregister(rfkill[1].rfkill_dev);
+ rfkill_destroy(rfkill[1].rfkill_dev);
+
+ kfree(rfkill);
+
+ return 0;
+}
+
+static struct of_device_id wand_rfkill_match[] = {
+ { .compatible = "wand,imx6q-wandboard-rfkill", },
+ { .compatible = "wand,imx6dl-wandboard-rfkill", },
+ { .compatible = "wand,imx6qdl-wandboard-rfkill", },
+ {}
+};
+
+static struct platform_driver wand_rfkill_driver = {
+ .driver = {
+ .name = "wandboard-rfkill",
+ .owner = THIS_MODULE,
+ .of_match_table = of_match_ptr(wand_rfkill_match),
+ },
+ .probe = wand_rfkill_probe,
+ .remove = wand_rfkill_remove
+};
+
+module_platform_driver(wand_rfkill_driver);
+
+MODULE_AUTHOR("Vladimir Ermakov <vooon341@gmail.com>");
+MODULE_DESCRIPTION("Wandboard rfkill driver");
+MODULE_LICENSE("GPL v2");
diff --git a/drivers/clk/imx/clk-imx6q.c b/drivers/clk/imx/clk-imx6q.c
index d5de733..54620f6 100644
--- a/drivers/clk/imx/clk-imx6q.c
+++ b/drivers/clk/imx/clk-imx6q.c
@@ -977,5 +977,10 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node)
}
imx_register_uart_clocks(uart_clks);
+
+ if (of_machine_is_compatible("udoo,imx6dl-udoo") ||
+ of_machine_is_compatible("udoo,imx6q-udoo"))
+ clk_prepare_enable(clk[IMX6QDL_CLK_CKO]);
+
}
CLK_OF_DECLARE(imx6q, "fsl,imx6q-ccm", imx6q_clocks_init);
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index acd40eb..b37aa21 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -73,6 +73,20 @@ config GPIO_SYSFS
Kernel drivers may also request that a particular GPIO be
exported to userspace; this can be useful when debugging.
+config GPIO_OF_HELPER
+ bool "GPIO OF helper device (EXPERIMENTAL)"
+ depends on OF_GPIO
+ help
+ Say Y here to add an GPIO OF helper driver
+
+ Allows you specify a GPIO helper based on OF
+ which allows simple export of GPIO functionality
+ in user-space.
+
+ Features include, value set/get, direction control,
+ interrupt/value change poll support, event counting
+ and others.
+
config GPIO_GENERIC
depends on HAS_IOMEM # Only for IOMEM drivers
tristate
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 6700eee..eed116d 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_GPIOLIB) += gpiolib-devprop.o
obj-$(CONFIG_OF_GPIO) += gpiolib-of.o
obj-$(CONFIG_GPIO_SYSFS) += gpiolib-sysfs.o
obj-$(CONFIG_GPIO_ACPI) += gpiolib-acpi.o
+obj-$(CONFIG_GPIO_OF_HELPER) += gpio-of-helper.o
# Device drivers. Generally keep list sorted alphabetically
obj-$(CONFIG_GPIO_GENERIC) += gpio-generic.o
diff --git b/drivers/gpio/gpio-of-helper.c b/drivers/gpio/gpio-of-helper.c
new file mode 100644
index 0000000..83f362f
--- /dev/null
+++ b/drivers/gpio/gpio-of-helper.c
@@ -0,0 +1,435 @@
+/*
+ * GPIO OF based helper
+ *
+ * A simple DT based driver to provide access to GPIO functionality
+ * to user-space via sysfs.
+ *
+ * Copyright (C) 2013 Pantelis Antoniou <panto@antoniou-consulting.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/timer.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/bitops.h>
+#include <linux/err.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_gpio.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/atomic.h>
+#include <linux/clk.h>
+#include <linux/interrupt.h>
+#include <linux/math64.h>
+#include <linux/atomic.h>
+#include <linux/idr.h>
+
+/* fwd decl. */
+struct gpio_of_helper_info;
+
+enum gpio_type {
+ GPIO_TYPE_INPUT = 0,
+ GPIO_TYPE_OUTPUT = 1,
+};
+
+struct gpio_of_entry {
+ int id;
+ struct gpio_of_helper_info *info;
+ struct device_node *node;
+ enum gpio_type type;
+ int gpio;
+ int irq;
+ const char *name;
+ atomic64_t counter;
+ unsigned int count_flags;
+#define COUNT_RISING_EDGE (1 << 0)
+#define COUNT_FALLING_EDGE (1 << 1)
+};
+
+struct gpio_of_helper_info {
+ struct platform_device *pdev;
+ struct idr idr;
+};
+
+static const struct of_device_id gpio_of_helper_of_match[] = {
+ {
+ .compatible = "gpio-of-helper",
+ },
+ { },
+};
+MODULE_DEVICE_TABLE(of, gpio_of_helper_of_match);
+
+static ssize_t gpio_of_helper_show_status(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct gpio_of_helper_info *info = platform_get_drvdata(pdev);
+ struct gpio_of_entry *entry;
+ char *p, *e;
+ int id, n;
+
+ p = buf;
+ e = p + PAGE_SIZE;
+ n = 0;
+ idr_for_each_entry(&info->idr, entry, id) {
+ switch (entry->type) {
+ case GPIO_TYPE_INPUT:
+ n = snprintf(p, e - p, "%2d %-24s %3d %-3s %llu\n",
+ entry->id, entry->name, entry->gpio, "IN",
+ (unsigned long long)
+ atomic64_read(&entry->counter));
+ break;
+ case GPIO_TYPE_OUTPUT:
+ n = snprintf(p, e - p, "%2d %-24s %3d %-3s\n",
+ entry->id, entry->name, entry->gpio, "OUT");
+ break;
+ }
+ p += n;
+ }
+
+ return p - buf;
+}
+
+static DEVICE_ATTR(status, S_IRUGO,
+ gpio_of_helper_show_status, NULL);
+
+static irqreturn_t gpio_of_helper_handler(int irq, void *ptr)
+{
+ struct gpio_of_entry *entry = ptr;
+
+ /* caution - low speed interfaces only! */
+ atomic64_inc(&entry->counter);
+
+ return IRQ_HANDLED;
+}
+
+static struct gpio_of_entry *
+gpio_of_entry_create(struct gpio_of_helper_info *info,
+ struct device_node *node)
+{
+ struct platform_device *pdev = info->pdev;
+ struct device *dev = &pdev->dev;
+ struct gpio_of_entry *entry;
+ int err, gpio, irq;
+ unsigned int req_flags, count_flags, irq_flags;
+ enum gpio_type type;
+ enum of_gpio_flags gpio_flags;
+ const char *name;
+
+ /* get the type of the node first */
+ if (of_property_read_bool(node, "input"))
+ type = GPIO_TYPE_INPUT;
+ else if (of_property_read_bool(node, "output")
+ || of_property_read_bool(node, "init-low")
+ || of_property_read_bool(node, "init-high"))
+ type = GPIO_TYPE_OUTPUT;
+ else {
+ dev_err(dev, "Not valid gpio node type\n");
+ err = -EINVAL;
+ goto err_bad_node;
+ }
+
+ /* get the name */
+ if (of_property_read_string(node, "line-name", &name))
+ if (of_property_read_string(node, "gpio-name", &name))
+ name = node->name;
+
+ err = of_get_named_gpio_flags(node, "gpio", 0, &gpio_flags);
+ if (IS_ERR_VALUE(err)) {
+ dev_err(dev, "Failed to get gpio property of '%s'\n", name);
+ goto err_bad_node;
+ }
+ gpio = err;
+
+ req_flags = 0;
+ count_flags = 0;
+
+ /* set the request flags */
+ switch (type) {
+ case GPIO_TYPE_INPUT:
+ req_flags = GPIOF_DIR_IN | GPIOF_EXPORT;
+ if (of_property_read_bool(node, "count-falling-edge"))
+ count_flags |= COUNT_FALLING_EDGE;
+ if (of_property_read_bool(node, "count-rising-edge"))
+ count_flags |= COUNT_RISING_EDGE;
+ break;
+ case GPIO_TYPE_OUTPUT:
+ req_flags = GPIOF_DIR_OUT | GPIOF_EXPORT;
+ if (of_property_read_bool(node, "init-high"))
+ req_flags |= GPIOF_OUT_INIT_HIGH;
+ else if (of_property_read_bool(node, "init-low"))
+ req_flags |= GPIOF_OUT_INIT_LOW;
+ break;
+ }
+ if (of_property_read_bool(node, "dir-changeable"))
+ req_flags |= GPIOF_EXPORT_CHANGEABLE;
+ if (gpio_flags & OF_GPIO_ACTIVE_LOW)
+ req_flags |= GPIOF_ACTIVE_LOW;
+ if (gpio_flags & OF_GPIO_SINGLE_ENDED) {
+ if (gpio_flags & OF_GPIO_ACTIVE_LOW)
+ req_flags |= GPIOF_OPEN_DRAIN;
+ else
+ req_flags |= GPIOF_OPEN_SOURCE;
+ }
+
+ /* request the gpio */
+ err = devm_gpio_request_one(dev, gpio, req_flags, name);
+ if (err != 0) {
+ dev_err(dev, "Failed to request gpio '%s'\n", name);
+ goto err_bad_node;
+ }
+
+ irq = -1;
+ irq_flags = 0;
+
+ /* counter mode requested - need an interrupt */
+ if (count_flags != 0) {
+ irq = gpio_to_irq(gpio);
+ if (IS_ERR_VALUE(irq)) {
+ dev_err(dev, "Failed to request gpio '%s'\n", name);
+ goto err_bad_node;
+ }
+
+ if (count_flags & COUNT_RISING_EDGE)
+ irq_flags |= IRQF_TRIGGER_RISING;
+ if (count_flags & COUNT_FALLING_EDGE)
+ irq_flags |= IRQF_TRIGGER_FALLING;
+ }
+
+// if (!idr_pre_get(&info->idr, GFP_KERNEL)) {
+// dev_err(dev, "Failed on idr_pre_get of '%s'\n", name);
+// err = -ENOMEM;
+// goto err_no_mem;
+// }
+
+ idr_preload(GFP_KERNEL);
+
+ entry = devm_kzalloc(dev, sizeof(*entry), GFP_KERNEL);
+ if (entry == NULL) {
+ dev_err(dev, "Failed to allocate gpio entry of '%s'\n", name);
+ err = -ENOMEM;
+ goto err_no_mem;
+ }
+
+ entry->id = -1;
+ entry->info = info;
+ entry->node = of_node_get(node); /* get node reference */
+ entry->type = type;
+ entry->gpio = gpio;
+ entry->irq = irq;
+ entry->name = name;
+
+ /* interrupt enable is last thing done */
+ if (irq >= 0) {
+ atomic64_set(&entry->counter, 0);
+ entry->count_flags = count_flags;
+ err = devm_request_irq(dev, irq, gpio_of_helper_handler,
+ irq_flags, name, entry);
+ if (err != 0) {
+ dev_err(dev, "Failed to request irq of '%s'\n", name);
+ goto err_no_irq;
+ }
+ }
+
+ /* all done; insert */
+// err = idr_get_new(&info->idr, entry, &entry->id);
+// if (IS_ERR_VALUE(err)) {
+// dev_err(dev, "Failed to idr_get_new of '%s'\n", name);
+// goto err_fail_idr;
+// }
+
+ err = idr_alloc(&info->idr, entry, 0, 0, GFP_NOWAIT);
+ if (err >= 0)
+ entry->id = err;
+
+ idr_preload_end();
+
+ if (err < 0) {
+ dev_err(dev, "Failed to idr_get_new of '%s'\n", name);
+ goto err_fail_idr;
+ }
+
+ dev_dbg(dev, "Allocated GPIO id=%d name='%s'\n", entry->id, name);
+
+ return entry;
+
+err_fail_idr:
+ /* nothing to do */
+err_no_irq:
+ /* release node ref */
+ of_node_put(node);
+ /* nothing else needs to be done, devres handles it */
+err_no_mem:
+err_bad_node:
+ return ERR_PTR(err);
+}
+
+static int gpio_of_entry_destroy(struct gpio_of_entry *entry)
+{
+ struct gpio_of_helper_info *info = entry->info;
+ struct platform_device *pdev = info->pdev;
+ struct device *dev = &pdev->dev;
+
+ dev_dbg(dev, "Destroying GPIO id=%d\n", entry->id);
+
+ /* remove from the IDR */
+ idr_remove(&info->idr, entry->id);
+
+ /* remove node ref */
+ of_node_put(entry->node);
+
+ /* free gpio */
+ devm_gpio_free(dev, entry->gpio);
+
+ /* gree irq */
+ if (entry->irq >= 0)
+ devm_free_irq(dev, entry->irq, entry);
+
+ /* and free */
+ devm_kfree(dev, entry);
+
+ return 0;
+}
+
+static int gpio_of_helper_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct gpio_of_helper_info *info;
+ struct gpio_of_entry *entry;
+ struct device_node *pnode = pdev->dev.of_node;
+ struct device_node *cnode;
+ struct pinctrl *pinctrl;
+ int err;
+
+ /* we only support OF */
+ if (pnode == NULL) {
+ dev_err(&pdev->dev, "No platform of_node!\n");
+ return -ENODEV;
+ }
+
+ pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
+ if (IS_ERR(pinctrl)) {
+ /* special handling for probe defer */
+ if (PTR_ERR(pinctrl) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
+
+ dev_warn(&pdev->dev,
+ "pins are not configured from the driver\n");
+ }
+
+ info = devm_kzalloc(&pdev->dev, sizeof(*info), GFP_KERNEL);
+ if (info == NULL) {
+ dev_err(&pdev->dev, "Failed to allocate info\n");
+ err = -ENOMEM;
+ goto err_no_mem;
+ }
+ platform_set_drvdata(pdev, info);
+ info->pdev = pdev;
+
+ idr_init(&info->idr);
+
+ err = device_create_file(dev, &dev_attr_status);
+ if (err != 0) {
+ dev_err(dev, "Failed to create status sysfs attribute\n");
+ goto err_no_sysfs;
+ }
+
+ for_each_child_of_node(pnode, cnode) {
+
+ entry = gpio_of_entry_create(info, cnode);
+ if (IS_ERR_OR_NULL(entry)) {
+ dev_err(dev, "Failed to create gpio entry\n");
+ err = PTR_ERR(entry);
+ goto err_fail_entry;
+ }
+ }
+
+ dev_info(&pdev->dev, "ready\n");
+
+ return 0;
+err_fail_entry:
+ device_remove_file(&pdev->dev, &dev_attr_status);
+err_no_sysfs:
+err_no_mem:
+ return err;
+}
+
+static int gpio_of_helper_remove(struct platform_device *pdev)
+{
+ struct gpio_of_helper_info *info = platform_get_drvdata(pdev);
+ struct gpio_of_entry *entry;
+ int id;
+
+ dev_info(&pdev->dev, "removing\n");
+
+ device_remove_file(&pdev->dev, &dev_attr_status);
+
+ id = 0;
+ idr_for_each_entry(&info->idr, entry, id) {
+ /* destroy each and every one */
+ gpio_of_entry_destroy(entry);
+ }
+
+ return 0;
+}
+
+#ifdef CONFIG_PM
+//#ifdef CONFIG_PM_RUNTIME
+static int gpio_of_helper_runtime_suspend(struct device *dev)
+{
+ /* place holder */
+ return 0;
+}
+
+static int gpio_of_helper_runtime_resume(struct device *dev)
+{
+ /* place holder */
+ return 0;
+}
+//#endif /* CONFIG_PM_RUNTIME */
+
+static struct dev_pm_ops gpio_of_helper_pm_ops = {
+ SET_RUNTIME_PM_OPS(gpio_of_helper_runtime_suspend,
+ gpio_of_helper_runtime_resume, NULL)
+};
+#define GPIO_OF_HELPER_PM_OPS (&gpio_of_helper_pm_ops)
+#else
+#define GPIO_OF_HELPER_PM_OPS NULL
+#endif /* CONFIG_PM */
+
+struct platform_driver gpio_of_helper_driver = {
+ .probe = gpio_of_helper_probe,
+ .remove = gpio_of_helper_remove,
+ .driver = {
+ .name = "gpio-of-helper",
+ .owner = THIS_MODULE,
+ .pm = GPIO_OF_HELPER_PM_OPS,
+ .of_match_table = gpio_of_helper_of_match,
+ },
+};
+
+module_platform_driver(gpio_of_helper_driver);
+
+MODULE_AUTHOR("Pantelis Antoniou <panto@antoniou-consulting.com>");
+MODULE_DESCRIPTION("GPIO OF Helper driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:gpio-of-helper");
diff --git a/drivers/gpio/gpiolib-sysfs.c b/drivers/gpio/gpiolib-sysfs.c
index fbf6b1a..ec7aa6f 100644
--- a/drivers/gpio/gpiolib-sysfs.c
+++ b/drivers/gpio/gpiolib-sysfs.c
@@ -37,10 +37,10 @@ static DEFINE_MUTEX(sysfs_lock);
/*
* /sys/class/gpio/gpioN... only for GPIOs that are exported
* /direction
- * * MAY BE OMITTED if kernel won't allow direction changes
* * is read/write as "in" or "out"
* * may also be written as "high" or "low", initializing
* output value as specified ("out" implies "low")
+ * * read-only if kernel won't allow direction changes
* /value
* * always readable, subject to hardware behavior
* * may be writable, as zero/nonzero
@@ -53,6 +53,8 @@ static DEFINE_MUTEX(sysfs_lock);
* * is read/write as zero/nonzero
* * also affects existing and subsequent "falling" and "rising"
* /edge configuration
+ * /label
+ * * descriptor label
*/
static ssize_t direction_show(struct device *dev,
@@ -83,7 +85,9 @@ static ssize_t direction_store(struct device *dev,
mutex_lock(&data->mutex);
- if (sysfs_streq(buf, "high"))
+ if (!data->direction_can_change)
+ status = -EPERM;
+ else if (sysfs_streq(buf, "high"))
status = gpiod_direction_output_raw(desc, 1);
else if (sysfs_streq(buf, "out") || sysfs_streq(buf, "low"))
status = gpiod_direction_output_raw(desc, 0);
@@ -362,6 +366,23 @@ static ssize_t active_low_store(struct device *dev,
}
static DEVICE_ATTR_RW(active_low);
+static ssize_t label_show(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct gpiod_data *data = dev_get_drvdata(dev);
+ struct gpio_desc *desc = data->desc;
+ ssize_t status;
+
+ mutex_lock(&data->mutex);
+
+ status = sprintf(buf, "%s\n", desc->label);
+
+ mutex_unlock(&data->mutex);
+
+ return status;
+}
+static DEVICE_ATTR_RO(label);
+
static umode_t gpio_is_visible(struct kobject *kobj, struct attribute *attr,
int n)
{
@@ -373,12 +394,15 @@ static umode_t gpio_is_visible(struct kobject *kobj, struct attribute *attr,
if (attr == &dev_attr_direction.attr) {
if (!show_direction)
- mode = 0;
+ mode &= 0444;
} else if (attr == &dev_attr_edge.attr) {
if (gpiod_to_irq(desc) < 0)
mode = 0;
if (!show_direction && test_bit(FLAG_IS_OUT, &desc->flags))
mode = 0;
+ } else if (attr == &dev_attr_value.attr) {
+ if (!show_direction && !test_bit(FLAG_IS_OUT, &desc->flags))
+ mode &= 0444;
}
return mode;
@@ -389,6 +413,7 @@ static struct attribute *gpio_attrs[] = {
&dev_attr_edge.attr,
&dev_attr_value.attr,
&dev_attr_active_low.attr,
+ &dev_attr_label.attr,
NULL,
};
@@ -402,6 +427,10 @@ static const struct attribute_group *gpio_groups[] = {
NULL
};
+/* bwlegh, a second device in the same file... get out of my namespace! */
+#define dev_attr_label dev_attr_chip_label
+#define label_show chip_label_show
+
/*
* /sys/class/gpio/gpiochipN/
* /base ... matching gpio_chip.base (N)
diff --git a/drivers/gpio/gpiolib.c b/drivers/gpio/gpiolib.c
index e013d41..8bd526d 100644
--- a/drivers/gpio/gpiolib.c
+++ b/drivers/gpio/gpiolib.c
@@ -2332,10 +2332,10 @@ static int gpiod_request_commit(struct gpio_desc *desc, const char *label)
if (test_and_set_bit(FLAG_REQUESTED, &desc->flags) == 0) {
desc_set_label(desc, label ? : "?");
status = 0;
- } else {
- kfree_const(label);
- status = -EBUSY;
- goto done;
+// } else {
+// kfree_const(label);
+// status = -EBUSY;
+// goto done;
}
if (chip->request) {
diff --git a/drivers/input/misc/tps65218-pwrbutton.c b/drivers/input/misc/tps65218-pwrbutton.c
index a4455bb..b6d4321 100644
--- a/drivers/input/misc/tps65218-pwrbutton.c
+++ b/drivers/input/misc/tps65218-pwrbutton.c
@@ -36,7 +36,7 @@ struct tps6521x_data {
static const struct tps6521x_data tps65217_data = {
.reg_status = TPS65217_REG_STATUS,
.pb_mask = TPS65217_STATUS_PB,
- .name = "tps65217_pwrbutton",
+ .name = "tps65217_pwr_but",
};
static const struct tps6521x_data tps65218_data = {
diff --git a/drivers/input/touchscreen/ar1021_i2c.c b/drivers/input/touchscreen/ar1021_i2c.c
index 28644f3..230d27c 100644
--- a/drivers/input/touchscreen/ar1021_i2c.c
+++ b/drivers/input/touchscreen/ar1021_i2c.c
@@ -17,6 +17,11 @@
#define AR1021_MAX_X 4095
#define AR1021_MAX_Y 4095
+#define AR1021_MAX_PRESSURE 255
+
+#define AR1021_CMD 0x55
+
+#define AR1021_CMD_ENABLE_TOUCH 0x12
#define AR1021_CMD 0x55
@@ -26,8 +31,29 @@ struct ar1021_i2c {
struct i2c_client *client;
struct input_dev *input;
u8 data[AR1021_TOCUH_PKG_SIZE];
+ bool invert_x;
+ bool invert_y;
+ bool swap_xy;
};
+static bool ar1021_get_prop_u32(struct device *dev,
+ const char *property,
+ unsigned int default_value,
+ unsigned int *value)
+{
+ u32 val;
+ int error;
+
+ error = device_property_read_u32(dev, property, &val);
+ if (error) {
+ *value = default_value;
+ return false;
+ }
+
+ *value = val;
+ return true;
+}
+
static irqreturn_t ar1021_i2c_irq(int irq, void *dev_id)
{
struct ar1021_i2c *ar1021 = dev_id;
@@ -49,9 +75,22 @@ static irqreturn_t ar1021_i2c_irq(int irq, void *dev_id)
x = ((data[2] & 0x1f) << 7) | (data[1] & 0x7f);
y = ((data[4] & 0x1f) << 7) | (data[3] & 0x7f);
- input_report_abs(input, ABS_X, x);
- input_report_abs(input, ABS_Y, y);
+ if (ar1021->invert_x)
+ x = AR1021_MAX_X - x;
+
+ if (ar1021->invert_y)
+ y = AR1021_MAX_Y - y;
+
+ if (ar1021->swap_xy) {
+ input_report_abs(input, ABS_X, y);
+ input_report_abs(input, ABS_Y, x);
+ } else {
+ input_report_abs(input, ABS_X, x);
+ input_report_abs(input, ABS_Y, y);
+ }
+
input_report_key(input, BTN_TOUCH, button);
+ input_report_abs(input, ABS_PRESSURE, AR1021_MAX_PRESSURE);
input_sync(input);
out:
@@ -93,6 +132,8 @@ static int ar1021_i2c_probe(struct i2c_client *client,
struct ar1021_i2c *ar1021;
struct input_dev *input;
int error;
+ unsigned int offset_x, offset_y;
+ bool data_present;
if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
dev_err(&client->dev, "i2c_check_functionality error\n");
@@ -116,10 +157,44 @@ static int ar1021_i2c_probe(struct i2c_client *client,
input->open = ar1021_i2c_open;
input->close = ar1021_i2c_close;
+ ar1021->invert_x = device_property_read_bool(&client->dev, "touchscreen-inverted-x");
+ ar1021->invert_y = device_property_read_bool(&client->dev, "touchscreen-inverted-y");
+ ar1021->swap_xy = device_property_read_bool(&client->dev, "touchscreen-swapped-x-y");
+
+ data_present = ar1021_get_prop_u32(&client->dev,
+ "touchscreen-offset-x",
+ 0,
+ &offset_x);
+
+ if (data_present)
+ dev_info(&client->dev, "touchscreen-offset-x: %d\n", offset_x);
+
+ data_present = ar1021_get_prop_u32(&client->dev,
+ "touchscreen-offset-y",
+ 0,
+ &offset_y);
+
+ if (data_present)
+ dev_info(&client->dev, "touchscreen-offset-y: %d\n", offset_y);
+
__set_bit(INPUT_PROP_DIRECT, input->propbit);
- input_set_capability(input, EV_KEY, BTN_TOUCH);
- input_set_abs_params(input, ABS_X, 0, AR1021_MAX_X, 0, 0);
- input_set_abs_params(input, ABS_Y, 0, AR1021_MAX_Y, 0, 0);
+ //input_set_capability(input, EV_KEY, BTN_TOUCH);
+
+ input->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
+ input->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
+
+ if(ar1021->swap_xy)
+ {
+ input_set_abs_params(input, ABS_X, 0, AR1021_MAX_Y, 0, 0);
+ input_set_abs_params(input, ABS_Y, 0, AR1021_MAX_X, 0, 0);
+ }
+ else
+ {
+ input_set_abs_params(input, ABS_X, offset_x, AR1021_MAX_X-offset_x, 0, 0);
+ input_set_abs_params(input, ABS_Y, offset_y, AR1021_MAX_Y-offset_y, 0, 0);
+ }
+
+ input_set_abs_params(input, ABS_PRESSURE, 0, AR1021_MAX_PRESSURE, 0, 0);
input_set_drvdata(input, ar1021);
diff --git a/drivers/input/touchscreen/ti_am335x_tsc.c b/drivers/input/touchscreen/ti_am335x_tsc.c
index 83e6855..dd358bf 100644
--- a/drivers/input/touchscreen/ti_am335x_tsc.c
+++ b/drivers/input/touchscreen/ti_am335x_tsc.c
@@ -34,6 +34,7 @@
#define ADCFSM_STEPID 0x10
#define SEQ_SETTLE 275
#define MAX_12BIT ((1 << 12) - 1)
+#define PRESSURE_MAX 1000
#define TSC_IRQENB_MASK (IRQENB_FIFO0THRES | IRQENB_EOS | IRQENB_HW_PEN)
@@ -234,6 +235,7 @@ static void titsc_read_coordinates(struct titsc *ts_dev,
for (i = 0; i < creads; i++) {
xvals[i] = titsc_readl(ts_dev, REG_FIFO0);
xvals[i] &= 0xfff;
+ pr_debug("i %d xval %d yval %d z1 %d z2 %d\n", i, xvals[i], yvals[i], *z1, *z2);
}
/*
@@ -312,13 +314,13 @@ static irqreturn_t titsc_irq(int irq, void *dev)
* Resistance(touch) = x plate resistance *
* x postion/4096 * ((z2 / z1) - 1)
*/
- z = z1 - z2;
+ z = z2 - z1;
z *= x;
z *= ts_dev->x_plate_resistance;
- z /= z2;
+ z /= z1;
z = (z + 2047) >> 12;
-
- if (z <= MAX_12BIT) {
+ pr_debug("x %d y %d z1 %d z2 %d z %d\n", x, y, z1, z2, z);
+ if (z <= PRESSURE_MAX) {
input_report_abs(input_dev, ABS_X, x);
input_report_abs(input_dev, ABS_Y, y);
input_report_abs(input_dev, ABS_PRESSURE, z);
@@ -459,6 +461,7 @@ static int titsc_probe(struct platform_device *pdev)
input_dev->name = "ti-tsc";
input_dev->dev.parent = &pdev->dev;
+ __set_bit(INPUT_PROP_DIRECT, input_dev->propbit);
input_dev->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_ABS);
input_dev->keybit[BIT_WORD(BTN_TOUCH)] = BIT_MASK(BTN_TOUCH);
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig
index 85fc771..34b0c3b 100644
--- a/drivers/misc/Kconfig
+++ b/drivers/misc/Kconfig
@@ -493,6 +493,24 @@ config PVPANIC
a paravirtualized device provided by QEMU; it lets a virtual machine
(guest) communicate panic events to the host.
+config TIEQEP
+ tristate "EQEP Hardware quadrature encoder controller"
+ depends on SOC_AM33XX
+ select PWM_TIPWMSS
+ help
+ Driver support for the EQEP quadrature encoder controller AM33XX
+ TI SOC
+
+ To compile this driver as a module, choose M here: the module
+ will be called tieqep.
+
+config UDOO_ARD
+ tristate "UDOO-Arduino erase/reset Driver"
+ default y
+ help
+ This driver is used to erase and reset arduino board via command sent
+ over USB-to-SERIAL connection.
+
source "drivers/misc/c2port/Kconfig"
source "drivers/misc/eeprom/Kconfig"
source "drivers/misc/cb710/Kconfig"
@@ -503,6 +521,7 @@ source "drivers/misc/mei/Kconfig"
source "drivers/misc/vmw_vmci/Kconfig"
source "drivers/misc/mic/Kconfig"
source "drivers/misc/genwqe/Kconfig"
+source "drivers/misc/cape/Kconfig"
source "drivers/misc/echo/Kconfig"
source "drivers/misc/cxl/Kconfig"
source "drivers/misc/ocxl/Kconfig"
diff --git a/drivers/misc/Makefile b/drivers/misc/Makefile
index b9affcd..225162d 100644
--- a/drivers/misc/Makefile
+++ b/drivers/misc/Makefile
@@ -44,6 +44,7 @@ obj-y += ti-st/
obj-y += lis3lv02d/
obj-$(CONFIG_USB_SWITCH_FSA9480) += fsa9480.o
obj-$(CONFIG_ALTERA_STAPL) +=altera-stapl/
+obj-$(CONFIG_TIEQEP) += tieqep.o
obj-$(CONFIG_INTEL_MEI) += mei/
obj-$(CONFIG_VMWARE_VMCI) += vmw_vmci/
obj-$(CONFIG_LATTICE_ECP3_CONFIG) += lattice-ecp3-config.o
@@ -51,9 +52,11 @@ obj-$(CONFIG_SRAM) += sram.o
obj-$(CONFIG_SRAM_EXEC) += sram-exec.o
obj-y += mic/
obj-$(CONFIG_GENWQE) += genwqe/
+obj-y += cape/
obj-$(CONFIG_ECHO) += echo/
obj-$(CONFIG_VEXPRESS_SYSCFG) += vexpress-syscfg.o
obj-$(CONFIG_CXL_BASE) += cxl/
+obj-$(CONFIG_UDOO_ARD) += udoo_ard.o
obj-$(CONFIG_PCI_ENDPOINT_TEST) += pci_endpoint_test.o
obj-$(CONFIG_OCXL) += ocxl/
obj-y += cardreader/
diff --git b/drivers/misc/cape/Kconfig b/drivers/misc/cape/Kconfig
new file mode 100644
index 0000000..a2ef85e
--- /dev/null
+++ b/drivers/misc/cape/Kconfig
@@ -0,0 +1,5 @@
+#
+# Capes
+#
+
+source "drivers/misc/cape/beaglebone/Kconfig"
diff --git b/drivers/misc/cape/Makefile b/drivers/misc/cape/Makefile
new file mode 100644
index 0000000..7c4eb96
--- /dev/null
+++ b/drivers/misc/cape/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for cape like devices
+#
+
+obj-y += beaglebone/
diff --git b/drivers/misc/cape/beaglebone/Kconfig b/drivers/misc/cape/beaglebone/Kconfig
new file mode 100644
index 0000000..eeb6782
--- /dev/null
+++ b/drivers/misc/cape/beaglebone/Kconfig
@@ -0,0 +1,10 @@
+#
+# Beaglebone capes
+#
+
+config BEAGLEBONE_PINMUX_HELPER
+ tristate "Beaglebone Pinmux Helper"
+ depends on ARCH_OMAP2PLUS && OF
+ default n
+ help
+ Say Y here to include support for the pinmux helper
diff --git b/drivers/misc/cape/beaglebone/Makefile b/drivers/misc/cape/beaglebone/Makefile
new file mode 100644
index 0000000..7f4617a
--- /dev/null
+++ b/drivers/misc/cape/beaglebone/Makefile
@@ -0,0 +1,5 @@
+#
+# Makefile for beaglebone capes
+#
+
+obj-$(CONFIG_BEAGLEBONE_PINMUX_HELPER) += bone-pinmux-helper.o
diff --git b/drivers/misc/cape/beaglebone/bone-pinmux-helper.c b/drivers/misc/cape/beaglebone/bone-pinmux-helper.c
new file mode 100644
index 0000000..d81363a
--- /dev/null
+++ b/drivers/misc/cape/beaglebone/bone-pinmux-helper.c
@@ -0,0 +1,242 @@
+/*
+ * Pinmux helper driver
+ *
+ * Copyright (C) 2013 Pantelis Antoniou <panto@antoniou-consulting.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/err.h>
+#include <linux/of.h>
+#include <linux/of_device.h>
+#include <linux/of_gpio.h>
+#include <linux/slab.h>
+#include <linux/pinctrl/pinctrl.h>
+#include <linux/pinctrl/pinmux.h>
+#include <linux/pinctrl/consumer.h>
+
+static const struct of_device_id bone_pinmux_helper_of_match[] = {
+ {
+ .compatible = "bone-pinmux-helper",
+ },
+ { },
+};
+MODULE_DEVICE_TABLE(of, bone_pinmux_helper_of_match);
+
+struct pinmux_helper_data {
+ struct pinctrl *pinctrl;
+ char *selected_state_name;
+};
+
+static ssize_t pinmux_helper_show_state(struct device *dev,
+ struct device_attribute *attr, char *buf)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct pinmux_helper_data *data = platform_get_drvdata(pdev);
+ const char *name;
+
+ name = data->selected_state_name;
+ if (name == NULL || strlen(name) == 0)
+ name = "none";
+ return sprintf(buf, "%s\n", name);
+}
+
+static ssize_t pinmux_helper_store_state(struct device *dev,
+ struct device_attribute *attr, const char *buf, size_t count)
+{
+ struct platform_device *pdev = to_platform_device(dev);
+ struct pinmux_helper_data *data = platform_get_drvdata(pdev);
+ struct pinctrl_state *state;
+ char *state_name;
+ char *s;
+ int err;
+
+ /* duplicate (as a null terminated string) */
+ state_name = kmalloc(count + 1, GFP_KERNEL);
+ if (state_name == NULL)
+ return -ENOMEM;
+ memcpy(state_name, buf, count);
+ state_name[count] = '\0';
+
+ /* and chop off newline */
+ s = strchr(state_name, '\n');
+ if (s != NULL)
+ *s = '\0';
+
+ /* try to select default state at first (if it exists) */
+ state = pinctrl_lookup_state(data->pinctrl, state_name);
+ if (!IS_ERR(state)) {
+ err = pinctrl_select_state(data->pinctrl, state);
+ if (err != 0)
+ dev_err(dev, "Failed to select state %s\n",
+ state_name);
+ } else {
+ dev_err(dev, "Failed to find state %s\n", state_name);
+ err = PTR_RET(state);
+ }
+
+ if (err == 0) {
+ kfree(data->selected_state_name);
+ data->selected_state_name = state_name;
+ }
+
+ return err ? err : count;
+}
+
+static DEVICE_ATTR(state, S_IWUSR | S_IRUGO,
+ pinmux_helper_show_state, pinmux_helper_store_state);
+
+static struct attribute *pinmux_helper_attributes[] = {
+ &dev_attr_state.attr,
+ NULL
+};
+
+static const struct attribute_group pinmux_helper_attr_group = {
+ .attrs = pinmux_helper_attributes,
+};
+
+static int bone_pinmux_helper_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct pinmux_helper_data *data;
+ struct pinctrl_state *state;
+ char *state_name;
+ const char *mode_name;
+ int mode_len;
+ int err;
+
+ data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
+ if (data == NULL) {
+ dev_err(dev, "Failed to allocate data\n");
+ err = -ENOMEM;
+ goto err_no_mem;
+ }
+
+ state_name = kmalloc(strlen(PINCTRL_STATE_DEFAULT) + 1,
+ GFP_KERNEL);
+ if (state_name == NULL) {
+ dev_err(dev, "Failed to allocate state name\n");
+ err = -ENOMEM;
+ goto err_no_state_mem;
+ }
+ data->selected_state_name = state_name;
+ strcpy(data->selected_state_name, PINCTRL_STATE_DEFAULT);
+
+ platform_set_drvdata(pdev, data);
+
+ data->pinctrl = devm_pinctrl_get(dev);
+ if (IS_ERR(data->pinctrl)) {
+ dev_err(dev, "Failed to get pinctrl\n");
+ err = PTR_RET(data->pinctrl);
+ goto err_no_pinctrl;
+ }
+
+ /* See if an initial mode is specified in the device tree */
+ mode_name = of_get_property(dev->of_node, "mode", &mode_len);
+
+ err = -1;
+ if (mode_name != NULL ) {
+ state_name = kmalloc(mode_len + 1, GFP_KERNEL);
+ if (state_name == NULL) {
+ dev_err(dev, "Failed to allocate state name\n");
+ err = -ENOMEM;
+ goto err_no_mode_mem;
+ }
+ strncpy(state_name, mode_name, mode_len);
+
+ /* try to select requested mode */
+ state = pinctrl_lookup_state(data->pinctrl, state_name);
+ if (!IS_ERR(state)) {
+ err = pinctrl_select_state(data->pinctrl, state);
+ if (err != 0) {
+ dev_warn(dev, "Unable to select requested mode %s\n", state_name);
+ kfree(state_name);
+ } else {
+ kfree(data->selected_state_name);
+ data->selected_state_name = state_name;
+ dev_notice(dev, "Set initial pinmux mode to %s\n", state_name);
+ }
+ }
+ }
+
+ /* try to select default state if mode_name failed */
+ if ( err != 0) {
+ state = pinctrl_lookup_state(data->pinctrl,
+ data->selected_state_name);
+ if (!IS_ERR(state)) {
+ err = pinctrl_select_state(data->pinctrl, state);
+ if (err != 0) {
+ dev_err(dev, "Failed to select default state\n");
+ goto err_no_state;
+ }
+ } else {
+ data->selected_state_name = '\0';
+ }
+ }
+
+ /* Register sysfs hooks */
+ err = sysfs_create_group(&dev->kobj, &pinmux_helper_attr_group);
+ if (err) {
+ dev_err(dev, "Failed to create sysfs group\n");
+ goto err_no_sysfs;
+ }
+
+ return 0;
+
+err_no_sysfs:
+err_no_state:
+err_no_mode_mem:
+ devm_pinctrl_put(data->pinctrl);
+err_no_pinctrl:
+ devm_kfree(dev, data->selected_state_name);
+err_no_state_mem:
+ devm_kfree(dev, data);
+err_no_mem:
+ return err;
+}
+
+static int bone_pinmux_helper_remove(struct platform_device *pdev)
+{
+ struct pinmux_helper_data *data = platform_get_drvdata(pdev);
+ struct device *dev = &pdev->dev;
+
+ sysfs_remove_group(&dev->kobj, &pinmux_helper_attr_group);
+ kfree(data->selected_state_name);
+ devm_pinctrl_put(data->pinctrl);
+ devm_kfree(dev, data);
+
+ return 0;
+}
+
+struct platform_driver bone_pinmux_helper_driver = {
+ .probe = bone_pinmux_helper_probe,
+ .remove = bone_pinmux_helper_remove,
+ .driver = {
+ .name = "bone-pinmux-helper",
+ .owner = THIS_MODULE,
+ .of_match_table = bone_pinmux_helper_of_match,
+ },
+};
+
+module_platform_driver(bone_pinmux_helper_driver);
+
+MODULE_AUTHOR("Pantelis Antoniou");
+MODULE_DESCRIPTION("Beaglebone pinmux helper driver");
+MODULE_LICENSE("GPL");
+MODULE_ALIAS("platform:bone-pinmux-helper");
diff --git b/drivers/misc/tieqep.c b/drivers/misc/tieqep.c
new file mode 100644
index 0000000..bb69ad4
--- /dev/null
+++ b/drivers/misc/tieqep.c
@@ -0,0 +1,754 @@
+/*
+ * TI eQEP driver for AM33xx devices
+ *
+ * Copyright (C) 2013 Nathaniel R. Lewis - http://teknoman117.wordpress.com/
+ * Copyright (C) 2015 SoftPLC Corporation, Dick Hollenbeck <dick@softplc.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ *
+ *
+ * sysfs entries
+ * - position = absolute - current position; relative - last latched value
+ * - mode => 0 - absolute; 1 - relative
+ * - period => sampling period for the hardware
+ * - enable => 0 - eQEP disabled, 1 - eQEP enabled
+ */
+
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/err.h>
+#include <linux/clk.h>
+#include <linux/pm_runtime.h>
+#include <linux/of_device.h>
+#include <linux/pinctrl/consumer.h>
+#include <linux/input.h>
+
+/* eQEP register offsets from its base IO address */
+#define QPOSCNT 0x0000
+#define QPOSINIT 0x0004
+#define QPOSMAX 0x0008
+#define QPOSCMP 0x000C
+#define QPOSILAT 0x0010
+#define QPOSSLAT 0x0014
+#define QPOSLAT 0x0018
+#define QUTMR 0x001C
+#define QUPRD 0x0020
+#define QWDTMR 0x0024
+#define QWDPRD 0x0026
+#define QDECCTL 0x0028
+#define QEPCTL 0x002A
+#define QCAPCTL 0x002C
+#define QPOSCTL 0x002E
+#define QEINT 0x0030
+#define QFLG 0x0032
+#define QCLR 0x0034
+#define QFRC 0x0036
+#define QEPSTS 0x0038
+#define QCTMR 0x003A
+#define QCPRD 0x003C
+#define QCTMRLAT 0x003E
+#define QCPRDLAT 0x0040
+#define QREVID 0x005C
+
+#if 0 /* if you wanted another way to modify IP registers... */
+typedef volatile u32 REG32;
+typedef volatile u16 REG16;
+struct EQEP_REGS {
+ REG32 q_poscnt; /* 0x00 position counter */
+ REG32 q_posinit; /* 0x04 position counter initialization */
+ REG32 q_posmax; /* 0x08 maximum position count */
+ REG32 q_poscmp; /* 0x0C position compare */
+ REG32 q_posilat; /* 0x10 index position latch */
+ REG32 q_posslat; /* 0x14 strobe position latch */
+ REG32 q_poslat; /* 0x18 position counter latch */
+ REG32 q_utmr; /* 0x1C unit timer */
+ REG32 q_uprd; /* 0x20 unit period */
+ REG16 q_wdtmr; /* 0x24 watchdog timer */
+ REG16 q_wdprd; /* 0x26 watchdog period */
+ REG16 q_decctl; /* 0x28 decoder control */
+ REG16 q_epctl; /* 0x2A control register */
+ REG16 q_capctl; /* 0x2C capture control */
+ REG16 q_posctl; /* 0x2E position compare control */
+ REG16 q_eint; /* 0x30 interrupt enable */
+ REG16 q_flg; /* 0x32 interrupt flag */
+ REG16 q_clr; /* 0x34 interrupt clear */
+ REG16 q_frc; /* 0x36 interrupt force */
+ REG16 q_epsts; /* 0x38 status */
+ REG16 q_ctmr; /* 0x3A capture timer */
+ REG16 q_cprd; /* 0x3C capture period */
+ REG16 q_ctmrlat; /* 0x3E capture timer latch */
+ REG16 q_prdlat; /* 0x40 capture period latch */
+ char q_fill1[0x5c-0x40];
+ REG32 q_revid; /* 0x5C revision id */
+};
+#endif
+
+
+/* Bits for the QDECTL register */
+#define QSRC1 (1 << 15)
+#define QSRC0 (1 << 14)
+#define SOEN (1 << 13)
+#define SPSEL (1 << 12)
+#define XCR (1 << 11)
+#define SWAP (1 << 10)
+#define IGATE (1 << 9)
+#define QAP (1 << 8)
+#define QBP (1 << 7)
+#define QIP (1 << 6)
+#define QSP (1 << 5)
+
+/* Bits for the QEPCTL register */
+#define FREESOFT1 (1 << 15)
+#define FREESOFT0 (1 << 14)
+#define PCRM1 (1 << 13)
+#define PCRM0 (1 << 12)
+#define SEI1 (1 << 11)
+#define SEI0 (1 << 10)
+#define IEI1 (1 << 9)
+#define IEI0 (1 << 8)
+#define SWI (1 << 7)
+#define SEL (1 << 6)
+#define IEL1 (1 << 5)
+#define IEL0 (1 << 4)
+#define PHEN (1 << 3)
+#define QCLM (1 << 2)
+#define UTE (1 << 1)
+#define WDE (1 << 0)
+
+/* Bits for the QCAPCTL register */
+#define CEN (1 << 15)
+#define CCPS2 (1 << 6)
+#define CCPS0 (1 << 5)
+#define CCPS1 (1 << 4)
+#define UPPS3 (1 << 3)
+#define UPPS2 (1 << 2)
+#define UPPS1 (1 << 1)
+#define UPPS0 (1 << 0)
+
+/* Bits for the QPOSCTL register */
+#define PCSHDW (1 << 15)
+#define PCLOAD (1 << 14)
+#define PCPOL (1 << 13)
+#define PCE (1 << 12)
+#define PCSPW11 (1 << 11)
+#define PCSPW10 (1 << 10)
+#define PCSPW9 (1 << 9)
+#define PCSPW8 (1 << 8)
+#define PCSPW7 (1 << 7)
+#define PCSPW6 (1 << 6)
+#define PCSPW5 (1 << 5)
+#define PCSPW4 (1 << 4)
+#define PCSPW3 (1 << 3)
+#define PCSPW2 (1 << 2)
+#define PCSPW1 (1 << 1)
+#define PCSPW0 (1 << 0)
+
+/* Bits for the interrupt registers */
+#define EQEP_INTERRUPT_MASK 0x0FFF
+#define UTOF (1 << 11)
+
+/* Bits to control the clock in the PWMSS subsystem */
+#define PWMSS_EQEPCLK_EN BIT(4)
+#define PWMSS_EQEPCLK_STOP_REQ BIT(5)
+#define PWMSS_EQEPCLK_EN_ACK BIT(4)
+
+/*
+ * Modes for the eQEP unit
+ * Absolute - the position entry represents the current position of the encoder.
+ * Poll this value and it will be notified every period nanoseconds
+ * Relative - the position entry represents the last latched position of the encoder
+ * This value is latched every period nanoseconds and the internal counter
+ * is subsequenty reset
+ */
+#define TIEQEP_MODE_ABSOLUTE 0
+#define TIEQEP_MODE_RELATIVE 1
+
+/* Structure defining the characteristics of the eQEP unit */
+struct eqep_chip
+{
+ /* Platform device for this eQEP unit */
+ struct platform_device *pdev;
+
+ /* Pointer to the base of the memory of the eQEP unit */
+ void __iomem *mmio_base;
+
+ /* SYSCLKOUT to the eQEP unit */
+ u32 clk_rate;
+
+ /* IRQ for the eQEP unit */
+ u16 irq;
+
+ /* Mode of the eQEP unit */
+ u8 op_mode;
+
+ /* work stuct for the notify userspace work */
+ struct work_struct notify_work;
+
+ /* Backup for driver suspension */
+ u16 prior_qepctl;
+ u16 prior_qeint;
+};
+
+/* Notify userspace work */
+static void notify_handler(struct work_struct *work)
+{
+ /* Get a reference to the eQEP driver */
+ struct eqep_chip *eqep = container_of(work, struct eqep_chip, notify_work);
+
+ /* Notify the userspace */
+ sysfs_notify(&eqep->pdev->dev.kobj, NULL, "position");
+}
+
+/* eQEP Interrupt handler */
+static irqreturn_t eqep_irq_handler(int irq, void *dev_id)
+{
+ /* Get the instance information */
+ struct platform_device *pdev = dev_id;
+ struct eqep_chip *eqep = platform_get_drvdata(pdev);
+
+ /* Get the interrupt flags */
+ u16 iflags = readw(eqep->mmio_base + QFLG) & EQEP_INTERRUPT_MASK;
+
+ /* Check the interrupt source(s) */
+ if (iflags & UTOF) {
+ /* Handle the unit timer overflow interrupt by notifying any potential pollers */
+ schedule_work(&eqep->notify_work);
+ }
+
+ /* Clear interrupt flags (write back triggered flags to the clear register) */
+ writew(iflags, eqep->mmio_base + QCLR);
+
+ /* Return that the IRQ was handled successfully */
+ return IRQ_HANDLED;
+}
+
+/* Function to read whether the eQEP unit is enabled or disabled */
+static ssize_t eqep_get_enabled(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ /* Get the instance structure */
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+ u16 enabled = 0;
+
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(dev);
+
+ /* Read the qep control register and mask all but the enabled bit */
+ enabled = readw(eqep->mmio_base + QEPCTL) & PHEN;
+
+ /* Return the target in string format */
+ return sprintf(buf, "%u\n", (enabled) ? 1 : 0);
+}
+
+/* Function to set if the eQEP is enabled */
+static ssize_t eqep_set_enabled(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
+{
+ /* Get the instance structure */
+ int rc;
+ u16 val;
+ u8 enabled;
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+
+ /* Convert the input string to an 8 bit uint */
+ if ((rc = kstrtou8(buf, 0, &enabled)))
+ return rc;
+
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(dev);
+ /* Get the existing state of QEPCTL */
+ val = readw(eqep->mmio_base + QEPCTL);
+
+ /* If we passed a number that is not 0, enable the eQEP */
+ if (enabled)
+ /* Enable the eQEP (Set PHEN in QEPCTL) */
+ val |= PHEN;
+ else
+ /* Disable the eQEP (Clear PHEN in QEPCTL) */
+ val &= ~PHEN;
+
+ /* Write flags back to control register */
+ writew(val, eqep->mmio_base + QEPCTL);
+
+ /* Return buffer length consumed (all) */
+ return count;
+}
+
+/* Function to read the current position of the eQEP */
+static ssize_t eqep_get_position(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+
+ s32 position = 0;
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(dev);
+
+ if (eqep->op_mode == TIEQEP_MODE_ABSOLUTE) {
+ position = readl(eqep->mmio_base + QPOSCNT);
+ } else if (eqep->op_mode == TIEQEP_MODE_RELATIVE) {
+ /* in relative mode, use the last latched value of the eQEP hardware */
+ position = readl(eqep->mmio_base + QPOSLAT);
+ dev_dbg(dev, "get_position:0x%08x\n", position);
+ }
+
+ return sprintf(buf, "%d\n", position);
+}
+
+/* Function to set the position of the eQEP hardware */
+static ssize_t eqep_set_position(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
+{
+ int rc;
+ s32 position;
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+
+ if ((rc = kstrtos32(buf, 0, &position)))
+ return rc;
+
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(dev);
+ /*
+ * If we are in absolute mode, set the position of the encoder,
+ * discard relative mode because thats pointless
+ */
+ if (eqep->op_mode == TIEQEP_MODE_ABSOLUTE) {
+ /* If absolute mode, set the current value of the eQEP hardware */
+ writel(position, eqep->mmio_base + QPOSCNT);
+ }
+
+ /* Return buffer length consumed (all) */
+ return count;
+}
+
+/* Function to read the period of the unit time event timer */
+static ssize_t eqep_get_timer_period(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+ u64 period;
+
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(dev);
+ /* Convert from counts per interrupt back into period_ns */
+ period = readl(eqep->mmio_base + QUPRD);
+ period = period * NSEC_PER_SEC;
+ do_div(period, eqep->clk_rate);
+
+ /* Otherwise write out the data */
+ return sprintf(buf, "%llu\n", period);
+}
+
+/* Function to set the unit timer period. 0 = off, greater than zero sets the period */
+static ssize_t eqep_set_timer_period(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
+{
+ int rc;
+ u16 tmp;
+ u64 period;
+
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+
+ if ((rc = kstrtou64(buf, 0, &period)))
+ return rc;
+
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(dev);
+ /* Disable the unit timer before modifying its period register */
+ tmp = readw(eqep->mmio_base + QEPCTL);
+ tmp &= ~(UTE | QCLM);
+ writew(tmp, eqep->mmio_base + QEPCTL);
+
+ /* Zero the unit timer counter register */
+ writel(0, eqep->mmio_base + QUTMR);
+
+ /* If the timer is enabled (a non-zero period has been passed) */
+ if (period) {
+ /* update the period */
+ period = period * eqep->clk_rate;
+ do_div(period, NSEC_PER_SEC);
+
+ dev_dbg(dev, "eqep_set_timer_period:%llu\n", period);
+
+ writel(period, eqep->mmio_base + QUPRD);
+
+ /* Enable unit timer, and latch QPOSLAT to QPOSCNT on timer expiration */
+ tmp |= UTE | QCLM;
+ writew(tmp, eqep->mmio_base + QEPCTL);
+ }
+
+ return count;
+}
+
+/* Function to read the mode of the eQEP hardware */
+static ssize_t eqep_get_mode(struct device *dev, struct device_attribute *attr, char *buf)
+{
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+
+ return sprintf(buf, "%u\n", eqep->op_mode);
+}
+
+/* Function to set the mode of the eQEP hardware */
+static ssize_t eqep_set_mode(struct device *dev, struct device_attribute *attr, const char *buf, size_t count)
+{
+ int rc;
+ u16 val;
+ u8 tmp_mode;
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+
+ if ((rc = kstrtou8(buf, 0, &tmp_mode)))
+ return rc;
+
+ dev_dbg(dev, "eqep_set_mode:%d\n", tmp_mode);
+
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(dev);
+ val = readw(eqep->mmio_base + QEPCTL);
+
+ if (tmp_mode == TIEQEP_MODE_ABSOLUTE) {
+ /*
+ * In absolute mode, don't reset the hardware based on time,
+ * so disable the unit timer position reset (Set PCRM[1:0] = 0)
+ */
+ val &= ~(PCRM1 | PCRM0);
+
+ eqep->op_mode = TIEQEP_MODE_ABSOLUTE;
+ } else if (tmp_mode == TIEQEP_MODE_RELATIVE) {
+ /*
+ * In relative mode, latch the value of the eQEP hardware on the
+ * overflow of the unit timer. So enable the unit timer position reset
+ * (Set PCRM[1:0] = 3)
+ */
+ val |= PCRM1 | PCRM0;
+
+ eqep->op_mode = TIEQEP_MODE_RELATIVE;
+ }
+
+ writew(val, eqep->mmio_base + QEPCTL);
+
+ return count;
+}
+
+/* Bind read/write functions to sysfs entries */
+static DEVICE_ATTR(enabled, 0644, eqep_get_enabled, eqep_set_enabled);
+static DEVICE_ATTR(position, 0644, eqep_get_position, eqep_set_position);
+static DEVICE_ATTR(period, 0644, eqep_get_timer_period, eqep_set_timer_period);
+static DEVICE_ATTR(mode, 0644, eqep_get_mode, eqep_set_mode);
+
+/* Array holding all of the sysfs entries */
+static const struct attribute *eqep_attrs[] = {
+ &dev_attr_enabled.attr,
+ &dev_attr_position.attr,
+ &dev_attr_period.attr,
+ &dev_attr_mode.attr,
+ NULL,
+};
+
+/* Driver function group */
+static const struct attribute_group eqep_device_attr_group = {
+ .attrs = (struct attribute **) eqep_attrs,
+};
+
+/* Driver compatibility list */
+static struct of_device_id eqep_of_match[] =
+{
+ { .compatible = "ti,am33xx-eqep" },
+ { }
+};
+
+/* Register our compatibilities for device trees */
+MODULE_DEVICE_TABLE(of, eqep_of_match);
+
+/* Create an instance of the eQEP driver */
+static int eqep_probe(struct platform_device *pdev)
+{
+ struct resource *r;
+ struct clk *clk;
+ struct eqep_chip *eqep;
+ struct pinctrl *pinctrl;
+
+ u64 period;
+ u16 status;
+ u32 value;
+
+ dev_info(&pdev->dev, "ver. 1.0\n");
+
+ /* Select pins provided through the device tree */
+ pinctrl = devm_pinctrl_get_select_default(&pdev->dev);
+ if (IS_ERR(pinctrl))
+ {
+ dev_warn(&pdev->dev, "unable to select pin group\n");
+ }
+
+ /* Allocate a eqep_driver object */
+ eqep = devm_kzalloc(&pdev->dev, sizeof(struct eqep_chip), GFP_KERNEL);
+ if (!eqep) {
+ dev_err(&pdev->dev, "failed to allocate memory\n");
+ return -ENOMEM;
+ }
+
+ /* Get a handle to the system clock object */
+ clk = devm_clk_get(pdev->dev.parent, "fck");
+ if (IS_ERR(clk)) {
+ dev_err(&pdev->dev, "failed to get clock\n");
+ return PTR_ERR(clk);
+ }
+
+ /* Get the frequency of the system clock */
+ eqep->clk_rate = clk_get_rate(clk);
+ if (!eqep->clk_rate) {
+ dev_err(&pdev->dev, "failed to get clock rate\n");
+ return -EINVAL;
+ }
+
+ /* Get a resource containing the IRQ for this eQEP controller */
+ r = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ if (unlikely(!r)) {
+ dev_err(&pdev->dev, "Invalid IRQ resource\n");
+ return -ENODEV;
+ }
+
+ /* Store the irq */
+ eqep->irq = r->start;
+
+ /* Get a resource containing the requested (from DT) memory address and range of eQEP controller */
+ r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!r) {
+ dev_err(&pdev->dev, "no memory resource defined\n");
+ return -ENODEV;
+ }
+
+ /* Remap the eQEP controller memory into our own memory space */
+ eqep->mmio_base = devm_ioremap_resource(&pdev->dev, r);
+ if (IS_ERR(eqep->mmio_base))
+ return PTR_ERR(eqep->mmio_base);
+
+ /* Store the platform device in our eQEP data structure for later usage */
+ eqep->pdev = pdev;
+
+ /* Subscribe to the eQEP interrupt */
+ if (request_irq(eqep->irq, eqep_irq_handler, IRQF_IRQPOLL, "eqep_interrupt", pdev))
+ {
+ dev_err(&pdev->dev, "unable to request irq for eQEP\n");
+ return -ENODEV;
+ }
+
+ /* Register controls to sysfs */
+ if (sysfs_create_group(&pdev->dev.kobj, &eqep_device_attr_group))
+ {
+ dev_err(&pdev->dev, "sysfs creation failed\n");
+ return -EINVAL;
+ }
+
+ /* set QDECCTL */
+ status = 0; /* default to Quadrature count mode, QSRC1 & QSRC0 = 0 */
+
+ /* set QSRC1 & QSRC0 bits, one of 4 count_modes. */
+ if (!of_property_read_u32(pdev->dev.of_node, "count_mode", &value) && value <= 3) {
+ status |= value << 14;
+
+ /*
+ * in count up or count down mode, count on rising edge only
+ * not on both edges.
+ */
+ if (value >= 2)
+ status |= XCR;
+ }
+ dev_info(&pdev->dev, "count_mode:%d\n", value);
+
+ /* Should we invert the qa input */
+ if (!of_property_read_u32(pdev->dev.of_node, "invert_qa", &value))
+ status = value ? status | QAP : status & ~QAP;
+ dev_info(&pdev->dev, "invert_qa:%d\n", value);
+
+ /* Should we invert the qb input */
+ if (!of_property_read_u32(pdev->dev.of_node, "invert_qb", &value))
+ status = value ? status | QBP : status & ~QBP;
+ dev_info(&pdev->dev, "invert_qb:%d\n", value);
+
+ /* Should we invert the index input */
+ if (!of_property_read_u32(pdev->dev.of_node, "invert_qi", &value))
+ status = value ? status | QIP : status & ~QIP;
+ dev_info(&pdev->dev, "invert_qi:%d\n", value);
+
+ /* Should we invert the strobe input */
+ if (!of_property_read_u32(pdev->dev.of_node, "invert_qs", &value))
+ status = value ? status | QSP : status & ~QSP;
+ dev_info(&pdev->dev, "invert_qs:%d\n", value);
+
+ /* Should we swap the cha and chb inputs */
+ if (!of_property_read_u32(pdev->dev.of_node, "swap_inputs", &value))
+ status = value ? status | SWAP : status & ~SWAP;
+ dev_info(&pdev->dev, "swap_inputs:%d\n", value);
+
+ dev_info(&pdev->dev, "QDECCTL:0x%04x\n", status);
+
+ /* Write the decoder control settings back to the control register */
+ writew(status, eqep->mmio_base + QDECCTL);
+
+ writel( 0, eqep->mmio_base + QPOSINIT);
+ writel(~0, eqep->mmio_base + QPOSMAX);
+ writel( 0, eqep->mmio_base + QPOSCNT);
+
+ dev_info(&pdev->dev, "QPOSINIT:0x%08x\n", readl(eqep->mmio_base + QPOSINIT));
+ dev_info(&pdev->dev, "QPOSMAX:0x%08x\n", readl(eqep->mmio_base + QPOSMAX));
+ dev_info(&pdev->dev, "QPOSCNT:0x%08x\n", readl(eqep->mmio_base + QPOSCNT));
+
+ status = UTOF; /* Enable Unit Time Period interrupt. */
+ if (!of_property_read_u32(pdev->dev.of_node, "omit_interrupt", &value) && value) {
+ status = 0; /* no interrupt */
+ }
+ writew(status, eqep->mmio_base + QEINT);
+ dev_info(&pdev->dev, "omit_interrupt:%d\n", value);
+ dev_info(&pdev->dev, "QEINT:0x%04x\n", status);
+
+ /* Calculate the timer ticks per second */
+ period = 1000000000;
+ period = period * eqep->clk_rate;
+ do_div(period, NSEC_PER_SEC);
+
+ /* Set this period into the unit timer period register */
+ writel(period, eqep->mmio_base + QUPRD);
+ dev_info(&pdev->dev, "QUPRD:0x%08x\n", (u32) period);
+
+ /*
+ * Enable the eQEP with basic position counting turned on
+ * PHEN - Quadrature position counter enable bit
+ * UTE - unit timer enable
+ * QCLM - latch QPOSLAT to QPOSCNT upon unit timer overflow
+ * IEL0 - Latch QPOSILAT on index signal. Rising or falling, IEL[1:0] = 0 is reserved
+ * SWI - Software initialization of position count register, i.e. set QPOSCNT <= QPOSINIT,
+ * but this bit was not being reset by hardware as advertised in TRM,
+ * (so omit & clear QPOSCNT manually elsewhere?)
+ */
+ status = PHEN | UTE | QCLM | IEL0 | SWI;
+ writew(status, eqep->mmio_base + QEPCTL);
+ dev_info(&pdev->dev, "QEPCTL:0x%04x write\n", status);
+ dev_info(&pdev->dev, "QEPCTL:0x%04x read\n", readw(eqep->mmio_base + QEPCTL));
+
+ /* We default to absolute mode */
+ eqep->op_mode = TIEQEP_MODE_ABSOLUTE;
+
+ /* Enable the power management runtime */
+ pm_runtime_enable(&pdev->dev);
+
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(&pdev->dev);
+
+ /* Initialize the notify work struture */
+ INIT_WORK(&eqep->notify_work, notify_handler);
+
+ /* Decrement the device usage count (twice) and run pm_runtime_idle() if zero */
+ pm_runtime_put_sync(&pdev->dev);
+
+ /* Set the platform driver data to the data object we've been creating for the eQEP unit */
+ platform_set_drvdata(pdev, eqep);
+
+ /* Success! */
+ dev_info(&pdev->dev, "irq:%d, clk_rate:%u\n", eqep->irq, eqep->clk_rate);
+ return 0;
+}
+
+/* Remove an instance of the eQEP driver */
+static int eqep_remove(struct platform_device *pdev)
+{
+ /* Get the eQEP driver data from the platform device structure */
+ struct eqep_chip *eqep = platform_get_drvdata(pdev);
+
+ /* Cancel work */
+ cancel_work_sync(&eqep->notify_work);
+
+ /* Unmap from sysfs */
+ sysfs_remove_group(&pdev->dev.kobj, &eqep_device_attr_group);
+
+ /* Release important assets */
+ free_irq(eqep->irq, pdev);
+
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(&pdev->dev);
+
+ /* Decrement the device usage count (twice) and run pm_runtime_idle() if zero */
+ pm_runtime_put_sync(&pdev->dev);
+ pm_runtime_put_sync(&pdev->dev);
+
+ /* Disable the runtime power management of this device */
+ pm_runtime_disable(&pdev->dev);
+
+ /* Return success */
+ return 0;
+}
+
+/* Power management suspend device */
+static int eqep_suspend(struct device *dev)
+{
+ /* Get the eqep driver information */
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+ u16 tmp;
+
+ /* Shut down interrupts */
+ eqep->prior_qeint = readw(eqep->mmio_base + QEINT);
+ tmp = eqep->prior_qeint & ~UTOF;
+ writew(tmp, eqep->mmio_base + QEINT);
+
+ /* Get the existing state of QEPCTL */
+ eqep->prior_qepctl = readw(eqep->mmio_base + QEPCTL);
+
+ /* Disable eQEP controller */
+ writew(eqep->prior_qepctl & ~PHEN, eqep->mmio_base + QEPCTL);
+
+ /* Decrement the device usage count and run pm_runtime_idle() if zero */
+ pm_runtime_put_sync(dev);
+
+ /* Return success */
+ return 0;
+}
+
+/* Power management wake device back up */
+static int eqep_resume(struct device *dev)
+{
+ /* Get the eqep driver information */
+ struct eqep_chip *eqep = dev_get_drvdata(dev);
+
+ /* Restore interrupt enabled register */
+ writew(eqep->prior_qeint, eqep->mmio_base + QEINT);
+
+ /* Restore prior qep control register */
+ writew(eqep->prior_qepctl, eqep->mmio_base + QEPCTL);
+
+ /* Increment the device usage count and run pm_runtime_resume() */
+ pm_runtime_get_sync(dev);
+
+ /* Success */
+ return 0;
+}
+
+/* create pm functions object */
+static SIMPLE_DEV_PM_OPS(eqep_pm_ops, eqep_suspend, eqep_resume);
+
+/* Platform driver information */
+static struct platform_driver eqep_driver = {
+ .driver = {
+ .name = "eqep",
+ .owner = THIS_MODULE,
+ .pm = &eqep_pm_ops,
+ .of_match_table = eqep_of_match,
+ },
+ .probe = eqep_probe,
+ .remove = eqep_remove,
+};
+
+/* Register this platform driver */
+module_platform_driver(eqep_driver);
+
+/* Module information */
+MODULE_DESCRIPTION("TI eQEP driver");
+MODULE_AUTHOR("Nathaniel R. Lewis");
+MODULE_LICENSE("GPL");
diff --git b/drivers/misc/udoo_ard.c b/drivers/misc/udoo_ard.c
new file mode 100755
index 0000000..2210738
--- /dev/null
+++ b/drivers/misc/udoo_ard.c
@@ -0,0 +1,417 @@
+/*
+ * udoo_ard.c
+ * UDOO quad/dual Arduino flash erase / CPU resetter
+ *
+ * Copyright (C) 2013-2015 Aidilab srl
+ * Author: UDOO Team <social@udoo.org>
+ * Author: Giuseppe Pagano <giuseppe.pagano@seco.com>
+ * Author: Francesco Montefoschi <francesco.monte@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published by
+ * the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/errno.h>
+#include <linux/platform_device.h>
+#include <linux/slab.h>
+#include <linux/io.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/sched.h>
+#include <linux/sched/clock.h>
+#include <linux/kernel.h>
+#include <linux/workqueue.h>
+#include <linux/fs.h>
+#include <linux/of.h>
+#include <linux/of_address.h>
+#include <linux/of_gpio.h>
+#include <linux/of_irq.h>
+#include <linux/of_platform.h>
+#include <linux/uaccess.h>
+
+#define DRIVER_NAME "udoo_ard"
+#define PINCTRL_DEFAULT "default"
+#define AUTH_TOKEN 0x5A5A
+#define MAX_MSEC_SINCE_LAST_IRQ 400
+#define GRAY_TIME_BETWEEN_RESET 10000 // In this time we can't accept new erase/reset code
+
+static struct workqueue_struct *erase_reset_wq;
+typedef struct {
+ struct work_struct erase_reset_work;
+ struct pinctrl *pinctrl;
+ struct pinctrl_state *pins_default;
+ int step;
+ int cmdcode;
+ int erase_reset_lock;
+ int gpio_bossac_clk;
+ int gpio_bossac_dat;
+ int gpio_ard_erase;
+ int gpio_ard_reset;
+ unsigned long last_int_time_in_ns;
+ unsigned long last_int_time_in_sec;
+} erase_reset_work_t;
+
+erase_reset_work_t *work;
+static u32 origTX, origRX; // original UART4 TX/RX pad control registers
+static int major; // for /dev/udoo_ard
+static struct class *udoo_class;
+
+static struct platform_device_id udoo_ard_devtype[] = {
+ {
+ /* keep it for coldfire */
+ .name = DRIVER_NAME,
+ .driver_data = 0,
+ }, {
+ /* sentinel */
+ }
+};
+MODULE_DEVICE_TABLE(platform, udoo_ard_devtype);
+
+static const struct of_device_id udoo_ard_dt_ids[] = {
+ { .compatible = "udoo,imx6q-udoo-ard", .data = &udoo_ard_devtype[0], },
+ { /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, udoo_ard_dt_ids);
+
+static void disable_serial(void)
+{
+ u32 addrTX;
+ void __iomem *_addrTX;
+
+ printk("[bossac] Disable UART4 serial port.\n");
+
+ addrTX = 0x20E01F8;
+ _addrTX = ioremap(addrTX, 8);
+
+ origTX = __raw_readl(_addrTX);
+ origRX = __raw_readl(_addrTX + 0x4);
+
+ __raw_writel(0x15, _addrTX);
+ __raw_writel(0x15, _addrTX + 0x4);
+
+ iounmap(_addrTX);
+}
+
+static void enable_serial(void)
+{
+ u32 addrTX;
+ void __iomem *_addrTX;
+
+ printk("[bossac] Enable UART4 serial port.\n");
+
+ addrTX = 0x20E01F8;
+ _addrTX = ioremap(addrTX, 8);
+
+ __raw_writel(origTX, _addrTX);
+ __raw_writel(origRX, _addrTX + 0x4);
+
+ iounmap(_addrTX);
+}
+
+static void erase_reset(void)
+{
+ printk("[bossac] UDOO ERASE and RESET on Sam3x started.\n");
+
+ gpio_direction_input(work->gpio_ard_erase);
+ gpio_set_value(work->gpio_ard_reset, 1);
+ msleep(1);
+
+ gpio_direction_output(work->gpio_ard_erase, 1);
+ msleep(300);
+ gpio_direction_input(work->gpio_ard_erase);
+
+ msleep(10);
+ gpio_set_value(work->gpio_ard_reset, 0);
+
+ msleep(80);
+ gpio_set_value(work->gpio_ard_reset, 1);
+
+ printk("[bossac] UDOO ERASE and RESET on Sam3x EXECUTED.\n");
+}
+
+static void shutdown_sam3x(void)
+{
+ printk("[bossac] RESET on Sam3x.\n");
+
+ gpio_set_value(work->gpio_ard_reset, 0);
+}
+
+static void erase_reset_wq_function( struct work_struct *work2)
+{
+ disable_serial();
+ erase_reset();
+ msleep(GRAY_TIME_BETWEEN_RESET);
+
+ work->erase_reset_lock = 0;
+}
+
+/*
+ * Called everytime the gpio_bossac_clk signal toggles.
+ * If the auth token (16 bit) is found, we look for the command code (4 bit).
+ * The code 0x0F is sent by Bossac to trigger an erase/reset (to achieve this,
+ * erase_reset_wq is scheduled). Before starting to program the flash, we disable
+ * the UART4 serial port, otherwise there is too noise on the serial lines (the
+ * programming port and UART4 port are connected together, see hw schematics).
+ * When Bossac finishes to flash/verify, the code 0x00 is sent which re-enables
+ * the UART4 port.
+ */
+static irqreturn_t udoo_bossac_req(int irq, void *dev_id)
+{
+ int retval, auth_bit, expected_bit, msec_since_last_irq;
+ u64 nowsec;
+ unsigned long rem_nsec;
+ erase_reset_work_t *erase_reset_work;
+
+ auth_bit = 0;
+ if (gpio_get_value(work->gpio_bossac_dat) != 0x0) {
+ auth_bit = 1;
+ }
+
+ erase_reset_work = (erase_reset_work_t *)work;
+
+ nowsec = local_clock();
+ rem_nsec = do_div(nowsec, 1000000000) ;
+ msec_since_last_irq = (((unsigned long)nowsec * 1000) + rem_nsec/1000000 ) - (((unsigned long)erase_reset_work->last_int_time_in_sec * 1000) + erase_reset_work->last_int_time_in_ns/1000000);
+
+ if (msec_since_last_irq > MAX_MSEC_SINCE_LAST_IRQ) {
+ erase_reset_work->step = 0;
+#ifdef DEBUG
+ printk("[bossac] Reset authentication timeout!\n");
+#endif
+ }
+
+#ifdef DEBUG
+ printk("[bossac] STEP %d -> 0x%d \n", erase_reset_work->step, auth_bit);
+#endif
+ erase_reset_work->last_int_time_in_ns = rem_nsec;
+ erase_reset_work->last_int_time_in_sec = nowsec;
+
+ if ( erase_reset_work->step < 16 ) { // Authenticating received token bit.
+ expected_bit = (( AUTH_TOKEN >> erase_reset_work->step ) & 0x01 );
+ if ( auth_bit == expected_bit ) {
+ erase_reset_work->step = erase_reset_work->step + 1;
+ } else {
+ erase_reset_work->step = 0;
+ }
+ } else { // Passed all authentication step. Receiving command code.
+ erase_reset_work->cmdcode = erase_reset_work->cmdcode | (auth_bit << (erase_reset_work->step - 16));
+ erase_reset_work->step = erase_reset_work->step + 1;
+ }
+
+#ifdef DEBUG
+ printk("erase_reset_work->erase_reset_lock = %d \n", erase_reset_work->erase_reset_lock);
+#endif
+ if ( erase_reset_work->step == 20 ) { // Passed authentication and code acquiring step.
+#ifdef DEBUG
+ printk("[bossac] Received code = 0x%04x \n", erase_reset_work->cmdcode);
+#endif
+ if (erase_reset_work->cmdcode == 0xF) {
+ if (erase_reset_work->erase_reset_lock == 0) {
+ erase_reset_work->erase_reset_lock = 1;
+ retval = queue_work( erase_reset_wq, (struct work_struct *)work );
+ } else {
+#ifdef DEBUG
+ printk("Erase and reset operation already in progress. Do nothing.\n");
+#endif
+ }
+ } else {
+ enable_serial();
+ }
+ erase_reset_work->step = 0;
+ erase_reset_work->cmdcode = 0;
+ }
+
+ return IRQ_HANDLED;
+}
+
+/*
+ * Takes control of clock, data, erase, reset GPIOs.
+ */
+static int gpio_setup(void)
+{
+ int ret;
+
+ ret = gpio_request(work->gpio_bossac_clk, "BOSSA_CLK");
+ if (ret) {
+ printk(KERN_ERR "request BOSSA_CLK IRQ\n");
+ return -1;
+ } else {
+ gpio_direction_input(work->gpio_bossac_clk);
+ }
+
+ ret = gpio_request(work->gpio_bossac_dat, "BOSSA_DAT");
+ if (ret) {
+ printk(KERN_ERR "request BOSSA_DAT IRQ\n");
+ return -1;
+ } else {
+ gpio_direction_input(work->gpio_bossac_dat);
+ }
+
+ ret = gpio_request(work->gpio_ard_erase, "BOSSAC");
+ if (ret) {
+ printk(KERN_ERR "request GPIO FOR ARDUINO ERASE\n");
+ return -1;
+ } else {
+ gpio_direction_input(work->gpio_ard_erase);
+ }
+
+ ret = gpio_request(work->gpio_ard_reset, "BOSSAC");
+ if (ret) {
+ printk(KERN_ERR "request GPIO FOR ARDUINO RESET\n");
+ return -1;
+ } else {
+ gpio_direction_output(work->gpio_ard_reset, 1);
+ }
+
+ return 0;
+}
+
+static ssize_t device_write(struct file *filp, const char *buff, size_t len, loff_t *off)
+{
+ char msg[10];
+ long res;
+
+ if (len > 10)
+ return -EINVAL;
+
+
+ res = copy_from_user(msg, buff, len);
+ if (res) {
+ return -EFAULT;
+ }
+ msg[len] = '\0';
+
+ if (strcmp(msg, "erase")==0) {
+ erase_reset();
+ } else if (strcmp(msg, "shutdown")==0) {
+ shutdown_sam3x();
+ } else if (strcmp(msg, "uartoff")==0) {
+ disable_serial();
+ } else if (strcmp(msg, "uarton")==0) {
+ enable_serial();
+ } else {
+ printk("[bossac] udoo_ard invalid operation! %s", msg);
+ }
+
+ return len;
+}
+
+static struct file_operations fops = {
+ .write = device_write,
+};
+
+/*
+ * If a fdt udoo_ard entry is found, we register an IRQ on bossac clock line
+ * and we create /dev/udoo_ard
+ */
+static int udoo_ard_probe(struct platform_device *pdev)
+{
+ int retval;
+ struct device *temp_class;
+ struct platform_device *bdev;
+ struct device_node *np;
+
+ bdev = kzalloc(sizeof(*bdev), GFP_KERNEL);
+ np = pdev->dev.of_node;
+
+ if (!np)
+ return -ENODEV;
+
+ work = (erase_reset_work_t *)kmalloc(sizeof(erase_reset_work_t), GFP_KERNEL);
+ if (work) {
+ work->gpio_ard_reset = of_get_named_gpio(np, "bossac-reset-gpio", 0);
+ work->gpio_ard_erase = of_get_named_gpio(np, "bossac-erase-gpio", 0);
+ work->gpio_bossac_clk = of_get_named_gpio(np, "bossac-clk-gpio", 0);
+ work->gpio_bossac_dat = of_get_named_gpio(np, "bossac-dat-gpio", 0);
+ work->pinctrl = devm_pinctrl_get(&pdev->dev);
+ work->pins_default = pinctrl_lookup_state(work->pinctrl, PINCTRL_DEFAULT);
+ } else {
+ printk("[bossac] Failed to allocate data structure.");
+ return -ENOMEM;
+ }
+
+ pinctrl_select_state(work->pinctrl, work->pins_default);
+ gpio_setup();
+
+ printk("[bossac] Registering IRQ %d for BOSSAC Arduino erase/reset operation\n", gpio_to_irq(work->gpio_bossac_clk));
+ retval = request_irq(gpio_to_irq(work->gpio_bossac_clk), udoo_bossac_req, IRQF_TRIGGER_FALLING, "UDOO", bdev);
+
+ major = register_chrdev(major, "udoo_ard", &fops);
+ if (major < 0) {
+ printk(KERN_ERR "[bossac] Cannot get major for UDOO Ard\n");
+ return -EBUSY;
+ }
+
+ udoo_class = class_create(THIS_MODULE, "udoo_ard");
+ if (IS_ERR(udoo_class)) {
+ return PTR_ERR(udoo_class);
+ }
+
+ temp_class = device_create(udoo_class, NULL, MKDEV(major, 0), NULL, "udoo_ard");
+ if (IS_ERR(temp_class)) {
+ return PTR_ERR(temp_class);
+ }
+
+ printk("[bossac] Created device file /dev/udoo_ard\n");
+
+ erase_reset_wq = create_workqueue("erase_reset_queue");
+ if (erase_reset_wq) {
+
+ /* Queue some work (item 1) */
+ if (work) {
+ INIT_WORK( (struct work_struct *)work, erase_reset_wq_function );
+ work->step = 1;
+ work->cmdcode = 0;
+ work->last_int_time_in_ns = 0;
+ work->last_int_time_in_sec = 0;
+ work->erase_reset_lock = 0;
+ // retval = queue_work( erase_reset_wq, (struct work_struct *)work );
+ }
+ }
+ return 0;
+}
+
+static int udoo_ard_remove(struct platform_device *pdev)
+{
+ printk("[bossac] Unloading UDOO ard driver.\n");
+ free_irq(gpio_to_irq(work->gpio_bossac_clk), NULL);
+
+ gpio_free(work->gpio_ard_reset);
+ gpio_free(work->gpio_ard_erase);
+ gpio_free(work->gpio_bossac_clk);
+ gpio_free(work->gpio_bossac_dat);
+
+ device_destroy(udoo_class, MKDEV(major, 0));
+ class_destroy(udoo_class);
+ unregister_chrdev(major, "udoo_ard");
+
+ return 0;
+}
+
+static struct platform_driver udoo_ard_driver = {
+ .driver = {
+ .name = DRIVER_NAME,
+ .owner = THIS_MODULE,
+ .of_match_table = udoo_ard_dt_ids,
+ },
+ .id_table = udoo_ard_devtype,
+ .probe = udoo_ard_probe,
+ .remove = udoo_ard_remove,
+};
+
+module_platform_driver(udoo_ard_driver);
+
+MODULE_ALIAS("platform:"DRIVER_NAME);
+MODULE_LICENSE("GPL");
diff --git a/drivers/net/ethernet/ti/davinci_mdio.c b/drivers/net/ethernet/ti/davinci_mdio.c
index 38b7f6d..4e6b814 100644
--- a/drivers/net/ethernet/ti/davinci_mdio.c
+++ b/drivers/net/ethernet/ti/davinci_mdio.c
@@ -92,6 +92,10 @@ struct davinci_mdio_data {
u32 clk_div;
};
+#if IS_ENABLED(CONFIG_OF)
+static void davinci_mdio_update_dt_from_phymask(u32 phy_mask);
+#endif
+
static void davinci_mdio_init_clk(struct davinci_mdio_data *data)
{
u32 mdio_in, div, mdio_out_khz, access_time;
@@ -159,6 +163,12 @@ static int davinci_mdio_reset(struct mii_bus *bus)
/* restrict mdio bus to live phys only */
dev_info(data->dev, "detected phy mask %x\n", ~phy_mask);
phy_mask = ~phy_mask;
+
+ #if IS_ENABLED(CONFIG_OF)
+ if (of_machine_is_compatible("ti,am335x-bone"))
+ davinci_mdio_update_dt_from_phymask(phy_mask);
+ #endif
+
} else {
/* desperately scan all phys */
dev_warn(data->dev, "no live phy, scanning all\n");
@@ -472,6 +482,93 @@ static int davinci_mdio_runtime_resume(struct device *dev)
davinci_mdio_enable(data);
return 0;
}
+static void davinci_mdio_update_dt_from_phymask(u32 phy_mask)
+{
+ int i, len, skip;
+ u32 addr;
+ __be32 *old_phy_p, *phy_id_p;
+ struct property *phy_id_property = NULL;
+ struct device_node *node_p, *slave_p;
+
+ addr = 0;
+
+ for (i = 0; i < PHY_MAX_ADDR; i++) {
+ if ((phy_mask & (1 << i)) == 0) {
+ addr = (u32) i;
+ break;
+ }
+ }
+
+ for_each_compatible_node(node_p, NULL, "ti,cpsw") {
+ for_each_node_by_name(slave_p, "slave") {
+
+#if IS_ENABLED(CONFIG_OF_OVERLAY)
+ skip = 1;
+ // Hack, the overlay fixup "slave" doesn't have phy-mode...
+ old_phy_p = (__be32 *) of_get_property(slave_p, "phy-mode", &len);
+
+ if (len != (sizeof(__be32 *) * 1))
+ {
+ skip = 0;
+ }
+
+ if (skip) {
+#endif
+
+ old_phy_p = (__be32 *) of_get_property(slave_p, "phy_id", &len);
+
+ if (len != (sizeof(__be32 *) * 2))
+ goto err_out;
+
+ if (old_phy_p) {
+
+ phy_id_property = kzalloc(sizeof(*phy_id_property), GFP_KERNEL);
+
+ if (! phy_id_property)
+ goto err_out;
+
+ phy_id_property->length = len;
+ phy_id_property->name = kstrdup("phy_id", GFP_KERNEL);
+ phy_id_property->value = kzalloc(len, GFP_KERNEL);
+
+ if (! phy_id_property->name)
+ goto err_out;
+
+ if (! phy_id_property->value)
+ goto err_out;
+
+ memcpy(phy_id_property->value, old_phy_p, len);
+
+ phy_id_p = (__be32 *) phy_id_property->value + 1;
+
+ *phy_id_p = cpu_to_be32(addr);
+
+ of_update_property(slave_p, phy_id_property);
+ pr_info("davinci_mdio: dt: updated phy_id[%d] from phy_mask[%x]\n", addr, phy_mask);
+
+ ++addr;
+ }
+#if IS_ENABLED(CONFIG_OF_OVERLAY)
+ }
+#endif
+ }
+ }
+
+ return;
+
+err_out:
+
+ if (phy_id_property) {
+ if (phy_id_property->name)
+ kfree(phy_id_property->name);
+
+ if (phy_id_property->value)
+ kfree(phy_id_property->value);
+
+ if (phy_id_property)
+ kfree(phy_id_property);
+ }
+}
#endif
#ifdef CONFIG_PM_SLEEP
diff --git a/drivers/net/ethernet/wiznet/w5100-spi.c b/drivers/net/ethernet/wiznet/w5100-spi.c
index 918b3e5..638eab5 100644
--- a/drivers/net/ethernet/wiznet/w5100-spi.c
+++ b/drivers/net/ethernet/wiznet/w5100-spi.c
@@ -441,6 +441,21 @@ static int w5100_spi_remove(struct spi_device *spi)
return w5100_remove(&spi->dev);
}
+#ifdef CONFIG_OF
+static const struct of_device_id w5100_spi_of_match[] = {
+ { .compatible = "wiznet,w5500" },
+ { }
+};
+MODULE_DEVICE_TABLE(of, w5100_spi_of_match);
+#endif
+
+#ifdef CONFIG_OF
+static const struct spi_device_id w5100_spi_ids[] = {
+ { "w5500", W5500 },
+ {}
+};
+MODULE_DEVICE_TABLE(spi, w5100_spi_ids);
+#else
static const struct spi_device_id w5100_spi_ids[] = {
{ "w5100", W5100 },
{ "w5200", W5200 },
@@ -448,11 +463,13 @@ static const struct spi_device_id w5100_spi_ids[] = {
{}
};
MODULE_DEVICE_TABLE(spi, w5100_spi_ids);
+#endif
static struct spi_driver w5100_spi_driver = {
.driver = {
.name = "w5100",
.pm = &w5100_pm_ops,
+ .of_match_table = of_match_ptr(w5100_spi_of_match),
},
.probe = w5100_spi_probe,
.remove = w5100_spi_remove,
diff --git a/drivers/power/Kconfig b/drivers/power/Kconfig
index ff0350c..78b6fa2 100644
--- a/drivers/power/Kconfig
+++ b/drivers/power/Kconfig
@@ -2,3 +2,4 @@
source "drivers/power/avs/Kconfig"
source "drivers/power/reset/Kconfig"
source "drivers/power/supply/Kconfig"
+source "drivers/power/pwrseq/Kconfig"
diff --git a/drivers/power/Makefile b/drivers/power/Makefile
index b7c2e37..13046c7 100644
--- a/drivers/power/Makefile
+++ b/drivers/power/Makefile
@@ -2,3 +2,4 @@
obj-$(CONFIG_POWER_AVS) += avs/
obj-$(CONFIG_POWER_RESET) += reset/
obj-$(CONFIG_POWER_SUPPLY) += supply/
+obj-$(CONFIG_POWER_SEQUENCE) += pwrseq/
diff --git b/drivers/power/pwrseq/Kconfig b/drivers/power/pwrseq/Kconfig
new file mode 100644
index 0000000..c6b3569
--- /dev/null
+++ b/drivers/power/pwrseq/Kconfig
@@ -0,0 +1,20 @@
+#
+# Power Sequence library
+#
+
+menuconfig POWER_SEQUENCE
+ bool "Power sequence control"
+ help
+ It is used for drivers which needs to do power sequence
+ (eg, turn on clock, toggle reset gpio) before the related
+ devices can be found by hardware, eg, USB bus.
+
+if POWER_SEQUENCE
+
+config PWRSEQ_GENERIC
+ bool "Generic power sequence control"
+ depends on OF
+ help
+ This is the generic power sequence control library, and is
+ supposed to support common power sequence usage.
+endif
diff --git b/drivers/power/pwrseq/Makefile b/drivers/power/pwrseq/Makefile
new file mode 100644
index 0000000..ad82389
--- /dev/null
+++ b/drivers/power/pwrseq/Makefile
@@ -0,0 +1,2 @@
+obj-$(CONFIG_POWER_SEQUENCE) += core.o
+obj-$(CONFIG_PWRSEQ_GENERIC) += pwrseq_generic.o
diff --git b/drivers/power/pwrseq/core.c b/drivers/power/pwrseq/core.c
new file mode 100644
index 0000000..3d19e62
--- /dev/null
+++ b/drivers/power/pwrseq/core.c
@@ -0,0 +1,335 @@
+/*
+ * core.c power sequence core file
+ *
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Author: Peter Chen <peter.chen@nxp.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.
+ */
+
+#include <linux/list.h>
+#include <linux/mutex.h>
+#include <linux/of.h>
+#include <linux/slab.h>
+#include <linux/power/pwrseq.h>
+
+static DEFINE_MUTEX(pwrseq_list_mutex);
+static LIST_HEAD(pwrseq_list);
+
+static int pwrseq_get(struct device_node *np, struct pwrseq *p)
+{
+ if (p && p->get)
+ return p->get(np, p);
+
+ return -ENOTSUPP;
+}
+
+static int pwrseq_on(struct pwrseq *p)
+{
+ if (p && p->on)
+ return p->on(p);
+
+ return -ENOTSUPP;
+}
+
+static void pwrseq_off(struct pwrseq *p)
+{
+ if (p && p->off)
+ p->off(p);
+}
+
+static void pwrseq_put(struct pwrseq *p)
+{
+ if (p && p->put)
+ p->put(p);
+}
+
+/**
+ * pwrseq_register - Add pwrseq instance to global pwrseq list
+ *
+ * @pwrseq: the pwrseq instance
+ */
+void pwrseq_register(struct pwrseq *pwrseq)
+{
+ mutex_lock(&pwrseq_list_mutex);
+ list_add(&pwrseq->node, &pwrseq_list);
+ mutex_unlock(&pwrseq_list_mutex);
+}
+EXPORT_SYMBOL_GPL(pwrseq_register);
+
+/**
+ * pwrseq_unregister - Remove pwrseq instance from global pwrseq list
+ *
+ * @pwrseq: the pwrseq instance
+ */
+void pwrseq_unregister(struct pwrseq *pwrseq)
+{
+ mutex_lock(&pwrseq_list_mutex);
+ list_del(&pwrseq->node);
+ mutex_unlock(&pwrseq_list_mutex);
+}
+EXPORT_SYMBOL_GPL(pwrseq_unregister);
+
+static struct pwrseq *pwrseq_find_available_instance(struct device_node *np)
+{
+ struct pwrseq *pwrseq;
+
+ mutex_lock(&pwrseq_list_mutex);
+ list_for_each_entry(pwrseq, &pwrseq_list, node) {
+ if (pwrseq->used)
+ continue;
+
+ /* compare compatible string for pwrseq node */
+ if (of_match_node(pwrseq->pwrseq_of_match_table, np)) {
+ pwrseq->used = true;
+ mutex_unlock(&pwrseq_list_mutex);
+ return pwrseq;
+ }
+
+ /* return generic pwrseq instance */
+ if (!strcmp(pwrseq->pwrseq_of_match_table->compatible,
+ "generic")) {
+ pr_debug("using generic pwrseq instance for %s\n",
+ np->full_name);
+ pwrseq->used = true;
+ mutex_unlock(&pwrseq_list_mutex);
+ return pwrseq;
+ }
+ }
+ mutex_unlock(&pwrseq_list_mutex);
+ pr_debug("Can't find any pwrseq instances for %s\n", np->full_name);
+
+ return NULL;
+}
+
+/**
+ * of_pwrseq_on - Carry out power sequence on for device node
+ *
+ * @np: the device node would like to power on
+ *
+ * Carry out a single device power on. If multiple devices
+ * need to be handled, use of_pwrseq_on_list() instead.
+ *
+ * Return a pointer to the power sequence instance on success,
+ * or an error code otherwise.
+ */
+struct pwrseq *of_pwrseq_on(struct device_node *np)
+{
+ struct pwrseq *pwrseq;
+ int ret;
+
+ pwrseq = pwrseq_find_available_instance(np);
+ if (!pwrseq)
+ return ERR_PTR(-ENOENT);
+
+ ret = pwrseq_get(np, pwrseq);
+ if (ret) {
+ /* Mark current pwrseq as unused */
+ pwrseq->used = false;
+ return ERR_PTR(ret);
+ }
+
+ ret = pwrseq_on(pwrseq);
+ if (ret)
+ goto pwr_put;
+
+ return pwrseq;
+
+pwr_put:
+ pwrseq_put(pwrseq);
+ return ERR_PTR(ret);
+}
+EXPORT_SYMBOL_GPL(of_pwrseq_on);
+
+/**
+ * of_pwrseq_off - Carry out power sequence off for this pwrseq instance
+ *
+ * @pwrseq: the pwrseq instance which related device would like to be off
+ *
+ * This API is used to power off single device, it is the opposite
+ * operation for of_pwrseq_on.
+ */
+void of_pwrseq_off(struct pwrseq *pwrseq)
+{
+ pwrseq_off(pwrseq);
+ pwrseq_put(pwrseq);
+}
+EXPORT_SYMBOL_GPL(of_pwrseq_off);
+
+/**
+ * of_pwrseq_on_list - Carry out power sequence on for list
+ *
+ * @np: the device node would like to power on
+ * @head: the list head for pwrseq list on this bus
+ *
+ * This API is used to power on multiple devices at single bus.
+ * If there are several devices on bus (eg, USB bus), uses this
+ * this API. Otherwise, use of_pwrseq_on instead. After the device
+ * is powered on successfully, it will be added to pwrseq list for
+ * this bus. The caller needs to use mutex_lock for concurrent.
+ *
+ * Return 0 on success, or an error value otherwise.
+ */
+int of_pwrseq_on_list(struct device_node *np, struct list_head *head)
+{
+ struct pwrseq *pwrseq;
+ struct pwrseq_list_per_dev *pwrseq_list_node;
+
+ pwrseq_list_node = kzalloc(sizeof(*pwrseq_list_node), GFP_KERNEL);
+ if (!pwrseq_list_node)
+ return -ENOMEM;
+
+ pwrseq = of_pwrseq_on(np);
+ if (IS_ERR(pwrseq)) {
+ kfree(pwrseq_list_node);
+ return PTR_ERR(pwrseq);
+ }
+
+ pwrseq_list_node->pwrseq = pwrseq;
+ list_add(&pwrseq_list_node->list, head);
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(of_pwrseq_on_list);
+
+/**
+ * of_pwrseq_off_list - Carry out power sequence off for the list
+ *
+ * @head: the list head for pwrseq instance list on this bus
+ *
+ * This API is used to power off all devices on this bus, it is
+ * the opposite operation for of_pwrseq_on_list.
+ * The caller needs to use mutex_lock for concurrent.
+ */
+void of_pwrseq_off_list(struct list_head *head)
+{
+ struct pwrseq *pwrseq;
+ struct pwrseq_list_per_dev *pwrseq_list_node, *tmp_node;
+
+ list_for_each_entry_safe(pwrseq_list_node, tmp_node, head, list) {
+ pwrseq = pwrseq_list_node->pwrseq;
+ of_pwrseq_off(pwrseq);
+ list_del(&pwrseq_list_node->list);
+ kfree(pwrseq_list_node);
+ }
+}
+EXPORT_SYMBOL_GPL(of_pwrseq_off_list);
+
+/**
+ * pwrseq_suspend - Carry out power sequence suspend for this pwrseq instance
+ *
+ * @pwrseq: the pwrseq instance
+ *
+ * This API is used to do suspend operation on pwrseq instance.
+ *
+ * Return 0 on success, or an error value otherwise.
+ */
+int pwrseq_suspend(struct pwrseq *p)
+{
+ int ret = 0;
+
+ if (p && p->suspend)
+ ret = p->suspend(p);
+ else
+ return ret;
+
+ if (!ret)
+ p->suspended = true;
+ else
+ pr_err("%s failed\n", __func__);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pwrseq_suspend);
+
+/**
+ * pwrseq_resume - Carry out power sequence resume for this pwrseq instance
+ *
+ * @pwrseq: the pwrseq instance
+ *
+ * This API is used to do resume operation on pwrseq instance.
+ *
+ * Return 0 on success, or an error value otherwise.
+ */
+int pwrseq_resume(struct pwrseq *p)
+{
+ int ret = 0;
+
+ if (p && p->resume)
+ ret = p->resume(p);
+ else
+ return ret;
+
+ if (!ret)
+ p->suspended = false;
+ else
+ pr_err("%s failed\n", __func__);
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pwrseq_resume);
+
+/**
+ * pwrseq_suspend_list - Carry out power sequence suspend for list
+ *
+ * @head: the list head for pwrseq instance list on this bus
+ *
+ * This API is used to do suspend on all power sequence instances on this bus.
+ * The caller needs to use mutex_lock for concurrent.
+ */
+int pwrseq_suspend_list(struct list_head *head)
+{
+ struct pwrseq *pwrseq;
+ struct pwrseq_list_per_dev *pwrseq_list_node;
+ int ret = 0;
+
+ list_for_each_entry(pwrseq_list_node, head, list) {
+ ret = pwrseq_suspend(pwrseq_list_node->pwrseq);
+ if (ret)
+ break;
+ }
+
+ if (ret) {
+ list_for_each_entry(pwrseq_list_node, head, list) {
+ pwrseq = pwrseq_list_node->pwrseq;
+ if (pwrseq->suspended)
+ pwrseq_resume(pwrseq);
+ }
+ }
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pwrseq_suspend_list);
+
+/**
+ * pwrseq_resume_list - Carry out power sequence resume for the list
+ *
+ * @head: the list head for pwrseq instance list on this bus
+ *
+ * This API is used to do resume on all power sequence instances on this bus.
+ * The caller needs to use mutex_lock for concurrent.
+ */
+int pwrseq_resume_list(struct list_head *head)
+{
+ struct pwrseq_list_per_dev *pwrseq_list_node;
+ int ret = 0;
+
+ list_for_each_entry(pwrseq_list_node, head, list) {
+ ret = pwrseq_resume(pwrseq_list_node->pwrseq);
+ if (ret)
+ break;
+ }
+
+ return ret;
+}
+EXPORT_SYMBOL_GPL(pwrseq_resume_list);
diff --git b/drivers/power/pwrseq/pwrseq_generic.c b/drivers/power/pwrseq/pwrseq_generic.c
new file mode 100644
index 0000000..4e7c090
--- /dev/null
+++ b/drivers/power/pwrseq/pwrseq_generic.c
@@ -0,0 +1,234 @@
+/*
+ * pwrseq_generic.c Generic power sequence handling
+ *
+ * Copyright (C) 2016 Freescale Semiconductor, Inc.
+ * Author: Peter Chen <peter.chen@nxp.com>
+ *
+ * This program is free software: you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 of
+ * the License as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program.
+ */
+
+#include <linux/clk.h>
+#include <linux/delay.h>
+#include <linux/gpio.h>
+#include <linux/gpio/consumer.h>
+#include <linux/of.h>
+#include <linux/of_gpio.h>
+#include <linux/slab.h>
+
+#include <linux/power/pwrseq.h>
+
+struct pwrseq_generic {
+ struct pwrseq pwrseq;
+ struct gpio_desc *gpiod_reset;
+ struct clk *clks[PWRSEQ_MAX_CLKS];
+ u32 duration_us;
+ bool suspended;
+};
+
+#define to_generic_pwrseq(p) container_of(p, struct pwrseq_generic, pwrseq)
+
+static int pwrseq_generic_alloc_instance(void);
+static const struct of_device_id generic_id_table[] = {
+ { .compatible = "generic",},
+ { /* sentinel */ }
+};
+
+static int pwrseq_generic_suspend(struct pwrseq *pwrseq)
+{
+ struct pwrseq_generic *pwrseq_gen = to_generic_pwrseq(pwrseq);
+ int clk;
+
+ for (clk = PWRSEQ_MAX_CLKS - 1; clk >= 0; clk--)
+ clk_disable_unprepare(pwrseq_gen->clks[clk]);
+
+ pwrseq_gen->suspended = true;
+ return 0;
+}
+
+static int pwrseq_generic_resume(struct pwrseq *pwrseq)
+{
+ struct pwrseq_generic *pwrseq_gen = to_generic_pwrseq(pwrseq);
+ int clk, ret = 0;
+
+ for (clk = 0; clk < PWRSEQ_MAX_CLKS && pwrseq_gen->clks[clk]; clk++) {
+ ret = clk_prepare_enable(pwrseq_gen->clks[clk]);
+ if (ret) {
+ pr_err("Can't enable clock, ret=%d\n", ret);
+ goto err_disable_clks;
+ }
+ }
+
+ pwrseq_gen->suspended = false;
+ return ret;
+
+err_disable_clks:
+ while (--clk >= 0)
+ clk_disable_unprepare(pwrseq_gen->clks[clk]);
+
+ return ret;
+}
+
+static void pwrseq_generic_put(struct pwrseq *pwrseq)
+{
+ struct pwrseq_generic *pwrseq_gen = to_generic_pwrseq(pwrseq);
+ int clk;
+
+ if (pwrseq_gen->gpiod_reset)
+ gpiod_put(pwrseq_gen->gpiod_reset);
+
+ for (clk = 0; clk < PWRSEQ_MAX_CLKS; clk++)
+ clk_put(pwrseq_gen->clks[clk]);
+
+ pwrseq_unregister(&pwrseq_gen->pwrseq);
+ kfree(pwrseq_gen);
+}
+
+static void pwrseq_generic_off(struct pwrseq *pwrseq)
+{
+ struct pwrseq_generic *pwrseq_gen = to_generic_pwrseq(pwrseq);
+ int clk;
+
+ if (pwrseq_gen->suspended)
+ return;
+
+ for (clk = PWRSEQ_MAX_CLKS - 1; clk >= 0; clk--)
+ clk_disable_unprepare(pwrseq_gen->clks[clk]);
+}
+
+static int pwrseq_generic_on(struct pwrseq *pwrseq)
+{
+ struct pwrseq_generic *pwrseq_gen = to_generic_pwrseq(pwrseq);
+ int clk, ret = 0;
+ struct gpio_desc *gpiod_reset = pwrseq_gen->gpiod_reset;
+
+ for (clk = 0; clk < PWRSEQ_MAX_CLKS && pwrseq_gen->clks[clk]; clk++) {
+ ret = clk_prepare_enable(pwrseq_gen->clks[clk]);
+ if (ret) {
+ pr_err("Can't enable clock, ret=%d\n", ret);
+ goto err_disable_clks;
+ }
+ }
+
+ if (gpiod_reset) {
+ u32 duration_us = pwrseq_gen->duration_us;
+
+ if (duration_us <= 10)
+ udelay(10);
+ else
+ usleep_range(duration_us, duration_us + 100);
+ gpiod_set_value(gpiod_reset, 0);
+ }
+
+ return ret;
+
+err_disable_clks:
+ while (--clk >= 0)
+ clk_disable_unprepare(pwrseq_gen->clks[clk]);
+
+ return ret;
+}
+
+static int pwrseq_generic_get(struct device_node *np, struct pwrseq *pwrseq)
+{
+ struct pwrseq_generic *pwrseq_gen = to_generic_pwrseq(pwrseq);
+ enum of_gpio_flags flags;
+ int reset_gpio, clk, ret = 0;
+
+ for (clk = 0; clk < PWRSEQ_MAX_CLKS; clk++) {
+ pwrseq_gen->clks[clk] = of_clk_get(np, clk);
+ if (IS_ERR(pwrseq_gen->clks[clk])) {
+ ret = PTR_ERR(pwrseq_gen->clks[clk]);
+ if (ret != -ENOENT)
+ goto err_put_clks;
+ pwrseq_gen->clks[clk] = NULL;
+ break;
+ }
+ }
+
+ reset_gpio = of_get_named_gpio_flags(np, "reset-gpios", 0, &flags);
+ if (gpio_is_valid(reset_gpio)) {
+ unsigned long gpio_flags;
+
+ if (flags & OF_GPIO_ACTIVE_LOW)
+ gpio_flags = GPIOF_ACTIVE_LOW | GPIOF_OUT_INIT_LOW;
+ else
+ gpio_flags = GPIOF_OUT_INIT_HIGH;
+
+ ret = gpio_request_one(reset_gpio, gpio_flags,
+ "pwrseq-reset-gpios");
+ if (ret)
+ goto err_put_clks;
+
+ pwrseq_gen->gpiod_reset = gpio_to_desc(reset_gpio);
+ of_property_read_u32(np, "reset-duration-us",
+ &pwrseq_gen->duration_us);
+ } else if (reset_gpio == -ENOENT) {
+ ; /* no such gpio */
+ } else {
+ ret = reset_gpio;
+ pr_err("Failed to get reset gpio on %s, err = %d\n",
+ np->full_name, reset_gpio);
+ goto err_put_clks;
+ }
+
+ /* allocate new one for later pwrseq instance request */
+ ret = pwrseq_generic_alloc_instance();
+ if (ret)
+ goto err_put_gpio;
+
+ return 0;
+
+err_put_gpio:
+ if (pwrseq_gen->gpiod_reset)
+ gpiod_put(pwrseq_gen->gpiod_reset);
+err_put_clks:
+ while (--clk >= 0)
+ clk_put(pwrseq_gen->clks[clk]);
+ return ret;
+}
+
+/**
+ * pwrseq_generic_alloc_instance - power sequence instance allocation
+ *
+ * This function is used to allocate one generic power sequence instance,
+ * it is called when the system boots up and after one power sequence
+ * instance is got successfully.
+ *
+ * Return zero on success or an error code otherwise.
+ */
+static int pwrseq_generic_alloc_instance(void)
+{
+ struct pwrseq_generic *pwrseq_gen;
+
+ pwrseq_gen = kzalloc(sizeof(*pwrseq_gen), GFP_KERNEL);
+ if (!pwrseq_gen)
+ return -ENOMEM;
+
+ pwrseq_gen->pwrseq.pwrseq_of_match_table = generic_id_table;
+ pwrseq_gen->pwrseq.get = pwrseq_generic_get;
+ pwrseq_gen->pwrseq.on = pwrseq_generic_on;
+ pwrseq_gen->pwrseq.off = pwrseq_generic_off;
+ pwrseq_gen->pwrseq.put = pwrseq_generic_put;
+ pwrseq_gen->pwrseq.suspend = pwrseq_generic_suspend;
+ pwrseq_gen->pwrseq.resume = pwrseq_generic_resume;
+
+ pwrseq_register(&pwrseq_gen->pwrseq);
+ return 0;
+}
+
+/* Allocate one pwrseq instance during boots up */
+static int __init pwrseq_generic_register(void)
+{
+ return pwrseq_generic_alloc_instance();
+}
+postcore_initcall(pwrseq_generic_register)
diff --git a/drivers/pwm/sysfs.c b/drivers/pwm/sysfs.c
index bf6823f..8725b65 100644
--- a/drivers/pwm/sysfs.c
+++ b/drivers/pwm/sysfs.c
@@ -14,6 +14,8 @@
#include <linux/kdev_t.h>
#include <linux/pwm.h>
+static struct class pwm_class;
+
struct pwm_export {
struct device child;
struct pwm_device *pwm;
@@ -230,6 +232,10 @@ static struct attribute *pwm_attrs[] = {
};
ATTRIBUTE_GROUPS(pwm);
+static const struct device_type pwm_channel_type = {
+ .name = "pwm_channel",
+};
+
static void pwm_export_release(struct device *child)
{
struct pwm_export *export = child_to_pwm_export(child);
@@ -239,6 +245,7 @@ static void pwm_export_release(struct device *child)
static int pwm_export_child(struct device *parent, struct pwm_device *pwm)
{
+ struct pwm_chip *chip = dev_get_drvdata(parent);
struct pwm_export *export;
char *pwm_prop[2];
int ret;
@@ -257,9 +264,11 @@ static int pwm_export_child(struct device *parent, struct pwm_device *pwm)
export->child.release = pwm_export_release;
export->child.parent = parent;
+ export->child.type = &pwm_channel_type;
export->child.devt = MKDEV(0, 0);
+ export->child.class = &pwm_class;
export->child.groups = pwm_groups;
- dev_set_name(&export->child, "pwm%u", pwm->hwpwm);
+ dev_set_name(&export->child, "pwm-%d:%u", chip->base, pwm->hwpwm);
ret = device_register(&export->child);
if (ret) {
@@ -375,7 +384,6 @@ ATTRIBUTE_GROUPS(pwm_chip);
static struct class pwm_class = {
.name = "pwm",
.owner = THIS_MODULE,
- .dev_groups = pwm_chip_groups,
};
static int pwmchip_sysfs_match(struct device *parent, const void *data)
@@ -391,7 +399,8 @@ void pwmchip_sysfs_export(struct pwm_chip *chip)
* If device_create() fails the pwm_chip is still usable by
* the kernel it's just not exported.
*/
- parent = device_create(&pwm_class, chip->dev, MKDEV(0, 0), chip,
+ parent = device_create_with_groups(&pwm_class, chip->dev, MKDEV(0, 0),
+ chip, pwm_chip_groups,
"pwmchip%d", chip->base);
if (IS_ERR(parent)) {
dev_warn(chip->dev,
diff --git a/drivers/regulator/twl6030-regulator.c b/drivers/regulator/twl6030-regulator.c
index 5fe208b..472ce34 100644
--- a/drivers/regulator/twl6030-regulator.c
+++ b/drivers/regulator/twl6030-regulator.c
@@ -289,6 +289,13 @@ static const struct regulator_ops twl6030fixed_ops = {
.get_status = twl6030reg_get_status,
};
+static struct regulator_ops twl6030_fixed_resource = {
+ .enable = twl6030reg_enable,
+ .disable = twl6030reg_disable,
+ .is_enabled = twl6030reg_is_enabled,
+ .get_status = twl6030reg_get_status,
+};
+
/*
* SMPS status and control
*/
@@ -562,6 +569,19 @@ static const struct twlreg_info TWLSMPS_INFO_##label = { \
}, \
}
+#define TWL6030_FIXED_RESOURCE(label, offset, turnon_delay) \
+static struct twlreg_info TWLRES_INFO_##label = { \
+ .base = offset, \
+ .desc = { \
+ .name = #label, \
+ .id = TWL6030_REG_##label, \
+ .ops = &twl6030_fixed_resource, \
+ .type = REGULATOR_VOLTAGE, \
+ .owner = THIS_MODULE, \
+ .enable_time = turnon_delay, \
+ }, \
+ }
+
/* VUSBCP is managed *only* by the USB subchip */
/* 6030 REG with base as PMC Slave Misc : 0x0030 */
/* Turnon-delay and remap configuration values for 6030 are not
@@ -591,6 +611,7 @@ TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 0);
TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 0);
TWL6030_FIXED_LDO(V1V8, 0x16, 1800, 0);
TWL6030_FIXED_LDO(V2V1, 0x1c, 2100, 0);
+TWL6030_FIXED_RESOURCE(CLK32KG, 0x8C, 0);
TWL6032_ADJUSTABLE_SMPS(SMPS3, 0x34);
TWL6032_ADJUSTABLE_SMPS(SMPS4, 0x10);
TWL6032_ADJUSTABLE_SMPS(VIO, 0x16);
@@ -622,6 +643,7 @@ static u8 twl_get_smps_mult(void)
#define TWL6030_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6030, label)
#define TWL6032_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWL6032, label)
#define TWLFIXED_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLFIXED, label)
+#define TWLRES_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLRES, label)
#define TWLSMPS_OF_MATCH(comp, label) TWL_OF_MATCH(comp, TWLSMPS, label)
static const struct of_device_id twl_of_match[] = {
@@ -649,6 +671,7 @@ static const struct of_device_id twl_of_match[] = {
TWLFIXED_OF_MATCH("ti,twl6030-vusb", VUSB),
TWLFIXED_OF_MATCH("ti,twl6030-v1v8", V1V8),
TWLFIXED_OF_MATCH("ti,twl6030-v2v1", V2V1),
+ TWLRES_OF_MATCH("ti,twl6030-clk32kg", CLK32KG),
TWLSMPS_OF_MATCH("ti,twl6032-smps3", SMPS3),
TWLSMPS_OF_MATCH("ti,twl6032-smps4", SMPS4),
TWLSMPS_OF_MATCH("ti,twl6032-vio", VIO),
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c
index 422bac8..5bab1f3 100644
--- a/drivers/spi/spidev.c
+++ b/drivers/spi/spidev.c
@@ -718,9 +718,9 @@ static int spidev_probe(struct spi_device *spi)
* compatible string, it is a Linux implementation thing
* rather than a description of the hardware.
*/
- WARN(spi->dev.of_node &&
- of_device_is_compatible(spi->dev.of_node, "spidev"),
- "%pOF: buggy DT: spidev listed directly in DT\n", spi->dev.of_node);
+// WARN(spi->dev.of_node &&
+// of_device_is_compatible(spi->dev.of_node, "spidev"),
+// "%pOF: buggy DT: spidev listed directly in DT\n", spi->dev.of_node);
spidev_probe_acpi(spi);
diff --git a/drivers/staging/fbtft/fb_ssd1306.c b/drivers/staging/fbtft/fb_ssd1306.c
index 6cf9df5..c97f146 100644
--- a/drivers/staging/fbtft/fb_ssd1306.c
+++ b/drivers/staging/fbtft/fb_ssd1306.c
@@ -55,6 +55,8 @@ static int init_display(struct fbtft_par *par)
write_reg(par, 0x3F);
else if (par->info->var.yres == 48)
write_reg(par, 0x2F);
+ else if (par->info->var.yres == 39)
+ write_reg(par, 0x27); /* https://libstock.mikroe.com/projects/download/1111/2577/1411057038_oled_b_click___e_mikroc_arm.zip */
else
write_reg(par, 0x1F);
@@ -72,16 +74,24 @@ static int init_display(struct fbtft_par *par)
/* Set Memory Addressing Mode */
write_reg(par, 0x20);
- /* Vertical addressing mode */
+ /* Vertical Addressing mode */
write_reg(par, 0x01);
/* Set Segment Re-map */
- /* column address 127 is mapped to SEG0 */
- write_reg(par, 0xA0 | 0x1);
+ if (par->info->var.yres == 39)
+ /* no segment re-map */
+ write_reg(par, 0xA0 | 0x0);
+ else
+ /* column address 127 is mapped to SEG0 */
+ write_reg(par, 0xA0 | 0x1);
/* Set COM Output Scan Direction */
- /* remapped mode. Scan from COM[N-1] to COM0 */
- write_reg(par, 0xC8);
+ if (par->info->var.yres == 39)
+ /* no columnt re-map mode. Scan from COM0 to COM[N-1] */
+ write_reg(par, 0xC0 | 0x0);
+ else
+ /* remapped mode. Scan from COM[N-1] to COM0 */
+ write_reg(par, 0xC0 | 0x8);
/* Set COM Pins Hardware Configuration */
write_reg(par, 0xDA);
@@ -91,18 +101,27 @@ static int init_display(struct fbtft_par *par)
else if (par->info->var.yres == 48)
/* A[4]=1b, Alternative COM pin configuration */
write_reg(par, 0x12);
+ else if (par->info->var.yres == 39)
+ /* A[4]=1b, Alternative COM pin configuration */
+ write_reg(par, 0x12);
else
/* A[4]=0b, Sequential COM pin configuration */
write_reg(par, 0x02);
/* Set Pre-charge Period */
write_reg(par, 0xD9);
- write_reg(par, 0xF1);
+ if (par->info->var.yres == 39)
+ write_reg(par, 0x25);
+ else
+ write_reg(par, 0xF1);
/* Set VCOMH Deselect Level */
write_reg(par, 0xDB);
- /* according to the datasheet, this value is out of bounds */
- write_reg(par, 0x40);
+ if (par->info->var.yres == 39)
+ write_reg(par, 0x20);
+ else
+ /* according to the datasheet, this value is out of bounds */
+ write_reg(par, 0x40);
/* Entire Display ON */
/* Resume to RAM content display. Output follows RAM content */
@@ -133,17 +152,35 @@ static void set_addr_win_64x48(struct fbtft_par *par)
write_reg(par, 0x5);
}
+static void set_addr_win_96x39(struct fbtft_par *par)
+{
+ /* Set Page Address */
+ write_reg(par, 0xB0);
+
+ /* Set Column Address */
+ write_reg(par, 0x21);
+ write_reg(par, 0x00);
+ write_reg(par, 0x5F);
+
+ /* Set Page Address Range */
+ write_reg(par, 0x22);
+ write_reg(par, 0x0);
+ write_reg(par, 0x4);
+}
+
static void set_addr_win(struct fbtft_par *par, int xs, int ys, int xe, int ye)
{
- /* Set Lower Column Start Address for Page Addressing Mode */
+ /* Set Lower Column Start Address for Vertical Addressing Mode */
write_reg(par, 0x00 | 0x0);
- /* Set Higher Column Start Address for Page Addressing Mode */
+ /* Set Higher Column Start Address for Vertical Addressing Mode */
write_reg(par, 0x10 | 0x0);
/* Set Display Start Line */
write_reg(par, 0x40 | 0x0);
if (par->info->var.xres == 64 && par->info->var.yres == 48)
set_addr_win_64x48(par);
+ else if (par->info->var.xres == 96 && par->info->var.yres == 39)
+ set_addr_win_96x39(par);
}
static int blank(struct fbtft_par *par, bool on)
@@ -188,11 +225,20 @@ static int write_vmem(struct fbtft_par *par, size_t offset, size_t len)
*buf |= BIT(i);
buf++;
}
+ if (yres % 8) {
+ *buf = 0x00;
+ for (i = 0; i < (yres - (y * 8)); i++)
+ if (vmem16[(y * 8 + i) * xres + x])
+ *buf |= BIT(i);
+ buf++;
+ y++;
+ }
}
/* Write data */
gpiod_set_value(par->gpio.dc, 1);
- ret = par->fbtftops.write(par, par->txbuf.buf, xres * yres / 8);
+ ret = par->fbtftops.write(par, par->txbuf.buf, xres * (yres / 8 + (yres % 8 != 0)));
+ //ret = par->fbtftops.write(par, par->txbuf.buf, xres * yres / 8);
if (ret < 0)
dev_err(par->info->device, "write failed and returned: %d\n",
ret);
diff --git a/drivers/staging/fbtft/fbtft_device.c b/drivers/staging/fbtft/fbtft_device.c
index 44e1410..e8b4c49 100644
--- a/drivers/staging/fbtft/fbtft_device.c
+++ b/drivers/staging/fbtft/fbtft_device.c
@@ -348,6 +348,25 @@ static struct fbtft_device_display displays[] = {
},
}
}
+ }, {
+ .name = "mikroe_oledb",
+ .spi = &(struct spi_board_info) {
+ .modalias = "fb_ssd1306",
+ .max_speed_hz = 16000000,
+ .mode = SPI_MODE_0,
+ .platform_data = &(struct fbtft_platform_data) {
+ .display = {
+ .width = 96,
+ .height = 39,
+ .buswidth = 8,
+ },
+ .gpios = (const struct fbtft_gpio []) {
+ { "reset", 45 },
+ { "dc", 110 },
+ {},
+ },
+ }
+ }
}, {
.name = "admatec_c-berry28",
.spi = &(struct spi_board_info) {
diff --git a/drivers/tty/serial/8250/8250_omap.c b/drivers/tty/serial/8250/8250_omap.c
index 0a83166..8ecebd1 100644
--- a/drivers/tty/serial/8250/8250_omap.c
+++ b/drivers/tty/serial/8250/8250_omap.c
@@ -1503,10 +1503,10 @@ static int __init omap8250_console_fixup(void)
}
add_preferred_console("ttyS", idx, options);
- pr_err("WARNING: Your 'console=ttyO%d' has been replaced by 'ttyS%d'\n",
+ pr_info("WARNING: Your 'console=ttyO%d' has been replaced by 'ttyS%d'\n",
idx, idx);
- pr_err("This ensures that you still see kernel messages. Please\n");
- pr_err("update your kernel commandline.\n");
+ pr_info("This ensures that you still see kernel messages. Please\n");
+ pr_info("update your kernel commandline.\n");
return 0;
}
console_initcall(omap8250_console_fixup);
diff --git a/drivers/usb/Kconfig b/drivers/usb/Kconfig
index e4b2741..0907550 100644
--- a/drivers/usb/Kconfig
+++ b/drivers/usb/Kconfig
@@ -46,6 +46,7 @@ config USB
tristate "Support for Host-side USB"
depends on USB_ARCH_HAS_HCD
select USB_COMMON
+ select POWER_SEQUENCE
select NLS # for UTF-8 strings
---help---
Universal Serial Bus (USB) is a specification for a serial bus
diff --git a/drivers/usb/core/hub.c b/drivers/usb/core/hub.c
index 2f94568..2277ffa 100644
--- a/drivers/usb/core/hub.c
+++ b/drivers/usb/core/hub.c
@@ -29,6 +29,7 @@
#include <linux/random.h>
#include <linux/pm_qos.h>
#include <linux/kobject.h>
+#include <linux/power/pwrseq.h>
#include <linux/uaccess.h>
#include <asm/byteorder.h>
@@ -1705,6 +1706,7 @@ static void hub_disconnect(struct usb_interface *intf)
hub->error = 0;
hub_quiesce(hub, HUB_DISCONNECT);
+ of_pwrseq_off_list(&hub->pwrseq_on_list);
mutex_lock(&usb_port_peer_mutex);
/* Avoid races with recursively_mark_NOTATTACHED() */
@@ -1751,11 +1753,41 @@ static bool hub_descriptor_is_sane(struct usb_host_interface *desc)
return true;
}
+#ifdef CONFIG_OF
+static int hub_of_pwrseq_on(struct usb_hub *hub)
+{
+ struct device *parent;
+ struct usb_device *hdev = hub->hdev;
+ struct device_node *np;
+ int ret;
+
+ if (hdev->parent)
+ parent = &hdev->dev;
+ else
+ parent = bus_to_hcd(hdev->bus)->self.sysdev;
+
+ for_each_child_of_node(parent->of_node, np) {
+ ret = of_pwrseq_on_list(np, &hub->pwrseq_on_list);
+ /* Maybe no power sequence library is chosen */
+ if (ret && ret != -ENOENT)
+ return ret;
+ }
+
+ return 0;
+}
+#else
+static int hub_of_pwrseq_on(struct usb_hub *hub)
+{
+ return 0;
+}
+#endif
+
static int hub_probe(struct usb_interface *intf, const struct usb_device_id *id)
{
struct usb_host_interface *desc;
struct usb_device *hdev;
struct usb_hub *hub;
+ int ret = -ENODEV;
desc = intf->cur_altsetting;
hdev = interface_to_usbdev(intf);
@@ -1846,6 +1878,7 @@ static int hub_probe(struct usb_interface *intf, const struct usb_device_id *id)
INIT_DELAYED_WORK(&hub->leds, led_work);
INIT_DELAYED_WORK(&hub->init_work, NULL);
INIT_WORK(&hub->events, hub_event);
+ INIT_LIST_HEAD(&hub->pwrseq_on_list);
spin_lock_init(&hub->irq_urb_lock);
timer_setup(&hub->irq_urb_retry, hub_retry_irq_urb, 0);
usb_get_intf(intf);
@@ -1861,11 +1894,14 @@ static int hub_probe(struct usb_interface *intf, const struct usb_device_id *id)
if (id->driver_info & HUB_QUIRK_CHECK_PORT_AUTOSUSPEND)
hub->quirk_check_port_auto_suspend = 1;
- if (hub_configure(hub, &desc->endpoint[0].desc) >= 0)
- return 0;
+ if (hub_configure(hub, &desc->endpoint[0].desc) >= 0) {
+ ret = hub_of_pwrseq_on(hub);
+ if (!ret)
+ return 0;
+ }
hub_disconnect(intf);
- return -ENODEV;
+ return ret;
}
static int
@@ -3715,7 +3751,7 @@ static int hub_suspend(struct usb_interface *intf, pm_message_t msg)
/* stop hub_wq and related activity */
hub_quiesce(hub, HUB_SUSPEND);
- return 0;
+ return pwrseq_suspend_list(&hub->pwrseq_on_list);
}
/* Report wakeup requests from the ports of a resuming root hub */
@@ -3755,8 +3791,13 @@ static void report_wakeup_requests(struct usb_hub *hub)
static int hub_resume(struct usb_interface *intf)
{
struct usb_hub *hub = usb_get_intfdata(intf);
+ int ret;
dev_dbg(&intf->dev, "%s\n", __func__);
+ ret = pwrseq_resume_list(&hub->pwrseq_on_list);
+ if (ret)
+ return ret;
+
hub_activate(hub, HUB_RESUME);
/*
diff --git a/drivers/usb/core/hub.h b/drivers/usb/core/hub.h
index a9e24e4..feab956 100644
--- a/drivers/usb/core/hub.h
+++ b/drivers/usb/core/hub.h
@@ -72,6 +72,7 @@ struct usb_hub {
spinlock_t irq_urb_lock;
struct timer_list irq_urb_retry;
struct usb_port **ports;
+ struct list_head pwrseq_on_list; /* powered pwrseq node list */
};
/**
diff --git b/include/dt-bindings/board/am335x-bbw-bbb-base.h b/include/dt-bindings/board/am335x-bbw-bbb-base.h
new file mode 100644
index 0000000..35f6d57
--- /dev/null
+++ b/include/dt-bindings/board/am335x-bbw-bbb-base.h
@@ -0,0 +1,103 @@
+/*
+ * This header provides constants for bbw/bbb pinctrl bindings.
+ *
+ * Copyright (C) 2014 Robert Nelson <robertcnelson@gmail.com>
+ *
+ * Numbers Based on: https://github.com/derekmolloy/boneDeviceTree/tree/master/docs
+ */
+
+#ifndef _DT_BINDINGS_BOARD_AM335X_BBW_BBB_BASE_H
+#define _DT_BINDINGS_BOARD_AM335X_BBW_BBB_BASE_H
+
+#define BONE_P8_03 0x018
+#define BONE_P8_04 0x01C
+
+#define BONE_P8_05 0x008
+#define BONE_P8_06 0x00C
+#define BONE_P8_07 0x090
+#define BONE_P8_08 0x094
+
+#define BONE_P8_09 0x09C
+#define BONE_P8_10 0x098
+#define BONE_P8_11 0x034
+#define BONE_P8_12 0x030
+
+#define BONE_P8_13 0x024
+#define BONE_P8_14 0x028
+#define BONE_P8_15 0x03C
+#define BONE_P8_16 0x038
+
+#define BONE_P8_17 0x02C
+#define BONE_P8_18 0x08C
+#define BONE_P8_19 0x020
+#define BONE_P8_20 0x084
+
+#define BONE_P8_21 0x080
+#define BONE_P8_22 0x014
+#define BONE_P8_23 0x010
+#define BONE_P8_24 0x004
+
+#define BONE_P8_25 0x000
+#define BONE_P8_26 0x07C
+#define BONE_P8_27 0x0E0
+#define BONE_P8_28 0x0E8
+
+#define BONE_P8_29 0x0E4
+#define BONE_P8_30 0x0EC
+#define BONE_P8_31 0x0D8
+#define BONE_P8_32 0x0DC
+
+#define BONE_P8_33 0x0D4
+#define BONE_P8_34 0x0CC
+#define BONE_P8_35 0x0D0
+#define BONE_P8_36 0x0C8
+
+#define BONE_P8_37 0x0C0
+#define BONE_P8_38 0x0C4
+#define BONE_P8_39 0x0B8
+#define BONE_P8_40 0x0BC
+
+#define BONE_P8_41 0x0B0
+#define BONE_P8_42 0x0B4
+#define BONE_P8_43 0x0A8
+#define BONE_P8_44 0x0AC
+
+#define BONE_P8_45 0x0A0
+#define BONE_P8_46 0x0A4
+
+#define BONE_P9_11 0x070
+#define BONE_P9_12 0x078
+
+#define BONE_P9_13 0x074
+#define BONE_P9_14 0x048
+#define BONE_P9_15 0x040
+#define BONE_P9_16 0x04C
+
+#define BONE_P9_17 0x15C
+#define BONE_P9_18 0x158
+#define BONE_P9_19 0x17C
+#define BONE_P9_20 0x178
+
+#define BONE_P9_21 0x154
+#define BONE_P9_22 0x150
+#define BONE_P9_23 0x044
+#define BONE_P9_24 0x184
+
+#define BONE_P9_25 0x1AC
+#define BONE_P9_26 0x180
+#define BONE_P9_27 0x1A4
+#define BONE_P9_28 0x19C
+
+#define BONE_P9_29 0x194
+#define BONE_P9_30 0x198
+#define BONE_P9_31 0x190
+
+/* Shared P21 of P11 */
+#define BONE_P9_41A 0x1B4
+#define BONE_P9_41B 0x1A8
+
+/* Shared P22 of P11 */
+#define BONE_P9_42A 0x164
+#define BONE_P9_42B 0x1A0
+
+#endif
diff --git b/include/linux/power/pwrseq.h b/include/linux/power/pwrseq.h
new file mode 100644
index 0000000..cbc344c
--- /dev/null
+++ b/include/linux/power/pwrseq.h
@@ -0,0 +1,81 @@
+#ifndef __LINUX_PWRSEQ_H
+#define __LINUX_PWRSEQ_H
+
+#include <linux/of.h>
+
+#define PWRSEQ_MAX_CLKS 3
+
+/**
+ * struct pwrseq - the power sequence structure
+ * @pwrseq_of_match_table: the OF device id table this pwrseq library supports
+ * @node: the list pointer to be added to pwrseq list
+ * @get: the API is used to get pwrseq instance from the device node
+ * @on: do power on for this pwrseq instance
+ * @off: do power off for this pwrseq instance
+ * @put: release the resources on this pwrseq instance
+ * @suspend: do suspend operation on this pwrseq instance
+ * @resume: do resume operation on this pwrseq instance
+ * @used: this pwrseq instance is used by device
+ */
+struct pwrseq {
+ const struct of_device_id *pwrseq_of_match_table;
+ struct list_head node;
+ int (*get)(struct device_node *np, struct pwrseq *p);
+ int (*on)(struct pwrseq *p);
+ void (*off)(struct pwrseq *p);
+ void (*put)(struct pwrseq *p);
+ int (*suspend)(struct pwrseq *p);
+ int (*resume)(struct pwrseq *p);
+ bool used;
+ bool suspended;
+};
+
+/* used for power sequence instance list in one driver */
+struct pwrseq_list_per_dev {
+ struct pwrseq *pwrseq;
+ struct list_head list;
+};
+
+#if IS_ENABLED(CONFIG_POWER_SEQUENCE)
+void pwrseq_register(struct pwrseq *pwrseq);
+void pwrseq_unregister(struct pwrseq *pwrseq);
+struct pwrseq *of_pwrseq_on(struct device_node *np);
+void of_pwrseq_off(struct pwrseq *pwrseq);
+int of_pwrseq_on_list(struct device_node *np, struct list_head *head);
+void of_pwrseq_off_list(struct list_head *head);
+int pwrseq_suspend(struct pwrseq *p);
+int pwrseq_resume(struct pwrseq *p);
+int pwrseq_suspend_list(struct list_head *head);
+int pwrseq_resume_list(struct list_head *head);
+#else
+static inline void pwrseq_register(struct pwrseq *pwrseq) {}
+static inline void pwrseq_unregister(struct pwrseq *pwrseq) {}
+static inline struct pwrseq *of_pwrseq_on(struct device_node *np)
+{
+ return NULL;
+}
+static void of_pwrseq_off(struct pwrseq *pwrseq) {}
+static int of_pwrseq_on_list(struct device_node *np, struct list_head *head)
+{
+ return 0;
+}
+static void of_pwrseq_off_list(struct list_head *head) {}
+static int pwrseq_suspend(struct pwrseq *p)
+{
+ return 0;
+}
+static int pwrseq_resume(struct pwrseq *p)
+{
+ return 0;
+}
+static int pwrseq_suspend_list(struct list_head *head)
+{
+ return 0;
+}
+static int pwrseq_resume_list(struct list_head *head)
+{
+ return 0;
+}
+#endif /* CONFIG_POWER_SEQUENCE */
+
+#endif /* __LINUX_PWRSEQ_H */
diff --git a/samples/seccomp/Makefile b/samples/seccomp/Makefile
index 009775b..7de6f0c 100644
--- a/samples/seccomp/Makefile
+++ b/samples/seccomp/Makefile
@@ -22,6 +22,7 @@ user-trap-objs := user-trap.o
# Try to match the kernel target.
ifndef CONFIG_64BIT
+ifndef CONFIG_ARM
# s390 has -m31 flag to build 31 bit binaries
ifndef CONFIG_S390
@@ -42,3 +43,4 @@ HOSTLDLIBS_user-trap += $(MFLAG)
endif
always := $(hostprogs-y)
endif
+endif