|8<(@Sony Xperia Z!sony,xperia-yugaqcom,apq8064,=handsetreserved-memoryJsmem@80000000Q U\ wcnss@8f000000QpU\Rcpuscpu@0 !qcom,kraitdqcom,kpss-acc-v1rcpuQ~\gcpu@1 !qcom,kraitdqcom,kpss-acc-v1rcpuQ~\icpu@2 !qcom,kraitdqcom,kpss-acc-v1rcpuQ~ \kcpu@3 !qcom,kraitdqcom,kpss-acc-v1rcpuQ~  \ml2-cache!cache\idle-statesspc#!qcom,idle-state-spcarm,idle-state \memory@0rmemoryQthermal-zonescpu0-thermal! 1tripstrip0>$JEpassivetrip1>J Ecriticalcpu1-thermal! 1ltripstrip0>$JEpassivetrip1>J Ecriticalcpu2-thermal! 1tripstrip0>$JEpassivetrip1>J Ecriticalcpu3-thermal! 1ltripstrip0>$JEpassivetrip1>J Ecriticalcpu-pmu!qcom,krait-pmu U clockscxo_board !fixed-clock`m$\-pxo_board !fixed-clock`m\sleep_clk !fixed-clock`m\smem !qcom,smem} smsm !qcom,smsm    @apps@0Q\\modem@1Q U&q6@2Q UYwcnss@3Q U\Qdsps@4Q Ufirmwarescm!qcom,scm-apq8064qcom,scm coreiio-hwmon !iio-hwmonT   socJ !simple-buspinctrl@800000!qcom,apq8064-pinctrlQ@+Z7 UCdefaultQ\sdc4-gpios\Epios*[gpio63gpio64gpio65gpio66gpio67gpio68`sdc4sdcc1-pin-active\Fclk [sdc1_clkiwcmd [sdc1_cmdi data [sdc1_datai sdcc3-pin-active\Bclk [sdc3_clkiwcmd [sdc3_cmdidata [sdc3_dataips_hold\mux[gpio78`ps_holdi2c1\mux[gpio20gpio21`gsbi1pinconf[gpio20gpio21wi2c1_pins_sleep\mux[gpio20gpio21`gpiopinconf[gpio20gpio21wgsbi1_uart_2pinsmux[gpio18gpio19`gsbi1gsbi1_uart_4pinsmux[gpio18gpio19gpio20gpio21`gsbi1i2c2\mux[gpio24gpio25`gsbi2pinconf[gpio24gpio25wi2c2_pins_sleep\mux[gpio24gpio25`gpiopinconf[gpio24gpio25wi2c3\mux [gpio8gpio9`gsbi3pinconf [gpio8gpio9wi2c3_pins_sleep\mux [gpio8gpio9`gpiopinconf [gpio8gpio9wi2c4\ mux[gpio12gpio13`gsbi4pinconf[gpio12gpio13wi2c4_pins_sleep\!mux[gpio12gpio13`gpiopinconf[gpio12gpio13wspi5_default\#pinmux[gpio51gpio52gpio54`gsbi5pinmux_cs`gpio[gpio53pinconf[gpio51gpio52gpio54wpinconf_cs[gpio53wspi5_sleep\$pinmux`gpio[gpio51gpio52gpio53gpio54pinconf[gpio51gpio52gpio53gpio54i2c6\%mux[gpio16gpio17`gsbi6pinconf[gpio16gpio17wi2c6_pins_sleep\&mux[gpio16gpio17`gpiopinconf[gpio16gpio17wgsbi4-uart-pin-active-state\rx-pins[gpio11`gsbi4wtx-pins[gpio10`gsbi4wgsbi6_uart_2pinsmux[gpio14gpio15`gsbi6gsbi6_uart_4pinsmux[gpio14gpio15gpio16gpio17`gsbi6gsbi7_uart_2pinsmux[gpio82gpio83`gsbi7gsbi7_uart_4pinsmux[gpio82gpio83gpio84gpio85`gsbi7i2c7\'mux[gpio84gpio85`gsbi7pinconf[gpio84gpio85wi2c7_pins_sleep\(mux[gpio84gpio85`gpiopinconf[gpio84gpio85wriva-fm-active[gpio14gpio15`riva_fm\Wriva-bt-active[gpio16gpio17`riva_bt\Vriva-wlan-active#[gpio64gpio65gpio66gpio67gpio68 `riva_wlan\Uhdmi-pinctrl\Nmux[gpio70gpio71gpio72`hdmipinconf_ddc[gpio70gpio71pinconf_hpd[gpio72gsbi5-uart-pin-active\"rx[gpio52`gsbi5tx[gpio51`gsbi5wsdcc3-cd-pin-active[gpio26`gpiow\Chwmutex@1200600!qcom,sfpb-mutexQ \interrupt-controller@2000000!qcom,msm-qgic2Q \timer@200a0005!qcom,kpss-wdt-apq8064qcom,kpss-timerqcom,msm-timer$UQmsleepclock-controller@2088000!qcom,kpss-acc-v1Q pll8_votepxo acpu0_aux`\clock-controller@2098000!qcom,kpss-acc-v1Q  pll8_votepxo acpu1_aux`\clock-controller@20a8000!qcom,kpss-acc-v1Q  pll8_votepxo acpu2_aux`\clock-controller@20b8000!qcom,kpss-acc-v1Q  pll8_votepxo acpu3_aux`\ power-controller@2089000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2Q\power-controller@2099000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2Q \power-controller@20a9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2Q \ power-controller@20b9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2Q \ sps-sic-non-secure@12100000!sysconQ\gsbi@12440000 disabled!qcom,gsbi-v1.0.0QDifaceJserial@12450000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmQE@ U coreiface disabledi2c@12460000!qcom,i2c-qup-v1.1.1QCdefaultsleepQF U coreiface disabledgsbi@12480000 disabled!qcom,gsbi-v1.0.0QHifaceJi2c@124a0000!qcom,i2c-qup-v1.1.1QJQCdefaultsleep U coreiface disabledgsbi@16200000 disabled!qcom,gsbi-v1.0.0Q ifaceJi2c@16280000!qcom,i2c-qup-v1.1.1QCdefaultsleepQ( U coreiface disabledgsbi@16300000 disabled!qcom,gsbi-v1.0.0Q0ifaceJserial@16340000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmQ40 UQCdefault coreiface disabledi2c@16380000!qcom,i2c-qup-v1.1.1Q !CdefaultsleepQ8 U coreiface disabledgsbi@1a200000okay!qcom,gsbi-v1.0.0Q ifaceJserial@1a240000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmQ$  U coreifaceokayCdefaultQ"spi@1a280000!qcom,spi-qup-v1.1.1Q( UQ#$Cdefaultsleep coreiface disabledgsbi@16500000 disabled!qcom,gsbi-v1.0.0QPifaceJserial@16540000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmQTP U coreiface disabledi2c@16580000!qcom,i2c-qup-v1.1.1Q%&CdefaultsleepQX U coreiface disabledgsbi@16600000 disabled!qcom,gsbi-v1.0.0Q`ifaceJserial@16640000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmQd` U coreiface disabledi2c@16680000!qcom,i2c-qup-v1.1.1Q'(CdefaultsleepQh U coreiface disabledrng@1a500000 !qcom,prngQPcoressbi@c00000 !qcom,ssbiQ #pmic-arbiterpmic !qcom,pm8821,ULmpps@50!qcom,pm8821-mppqcom,ssbi-mppQP7+)\)ssbi@500000 !qcom,ssbiQP #pmic-arbiterpmic !qcom,pm8921,UJ\,gpio@150 !qcom,pm8921-gpioqcom,ssbi-gpioQP+*,7\*gpio-keys-active-state[gpio3gpio4gpio29gpio35`normal8HUbv\ompps@50!qcom,pm8921-mppqcom,ssbi-mppQP7++ \+rtc@11d!qcom,pm8921-rtc,,U'Qpwrkey@1c!qcom,pm8921-pwrkeyQ,,U23= xoadc@197!qcom,pm8921-adcQ ,N\adc-channel@0Qadc-channel@1Qadc-channel@2Qadc-channel@4Qadc-channel@8Qadc-channel@9Q adc-channel@aQ adc-channel@bQ adc-channel@cQ adc-channel@dQ adc-channel@eQadc-channel@fQqfprom@700000 !qcom,apq8064-qfpromqcom,qfpromQpJcalib@404Q\/backup_calib@414Q\0clock-controller@900000!qcom,gcc-apq8064sysconQ@`-. cxopxopll4\thermal-sensor!qcom,msm8960-tsens/0calibcalib_backup Uuplow &\ clock-controller@28000000!qcom,lcc-apq8064Q(`$pxopll4_votemi2s_codec_clkcodec_i2s_mic_codec_clkspare_i2s_mic_codec_clkcodec_i2s_spkr_codec_clkspare_i2s_spkr_codec_clkpcm_codec_clk\.clock-controller@4000000!qcom,mmcc-apq8064Q`811223Cpxopll3pll8_votedsi1plldsi1pllbytedsi2plldsi2pllbytehdmipll\Iclock-controller@2011000+!qcom,kpss-gcc-apq8064qcom,kpss-gccsysconQ pll8_votepxo`\rpm@108000!qcom,rpm-apq8064Q <$Uackerrwakeupclock-controller!qcom,rpmcc-apq8064qcom,rpmcc`-pxocxo\regulators!qcom,rpm-pm8921-regulatorsE4^4s4546677s1(('0\6s2  'j\Xs3 0'I>\Ss4w@w@'jB\4s7  '0\7s8!!'jl1l2OOl3..\:l4w@w@\;l5-p-p\Hl6-p-p\5l7:-pl8**l9--l10,@ ,@ \Yl11--l12OOl14w@w@l15w@-pl16**l17l18OOl21l22'@'@l23w@w@l24 q0\Tl25l26l27l28l29lvs1lvs2\Zlvs3lvs4lvs5lvs6lvs7usb-switchhdmi-switchncpw@w@'jusb@12500000 !qcom,ci-hdrcQPP Ud~ coreifaceRbw@~coreulpi8usb-phyokayotg\9ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy- sleeprefw9~por:;\8usb@12520000 !qcom,ci-hdrcQRR U)' coreifaceR)bwd~coreulpi<usb-phy disabled\=ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy- sleeprefw=~por\<usb@12530000 !qcom,ci-hdrcQSS U,* coreifaceR,bwe~coreulpi>usb-phy disabled\?ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy- sleeprefw?~por\>phy@1b400000!qcom,apq8064-sata-phy disabledQ@phy_mem-cfg\@sata@29000000!qcom,apq8064-ahcigeneric-ahci disabledQ) U(;.)slave_ifaceifacebusrxoobcore_pmaliveRb@ sata-phymmc@12180000!arm,pl18xarm,primecellokayQ  Ufzpmclkapb_pclk,> qLUAAZtxrxd5 pCdefaultQBCdma-controller@12182000!qcom,bam-v1.3.0Q  U`pbam_clky\Ammc@121c0000!arm,pl18xarm,primecell disabledQ  Ue{qmclkapb_pclk,>lUDDZtxrxCdefaultQEdma-controller@121c2000!qcom,bam-v1.3.0Q  U_qbam_clky\Dmmc@12400000okay!arm,pl18xarm,primecellCdefaultQFQ@  Uhxnmclkapb_pclk>,UGGZtxrxdH4dma-controller@12402000!qcom,bam-v1.3.0Q@  Ubnbam_clky\Gsyscon@1a400000!qcom,tcsr-apq8064sysconQ@\adreno-3xx@4300000!qcom,adreno-320.2qcom,adrenoQ0kgsl_3d0_reg_memory UP kgsl_3d0_irqcoreifacememmem_iface IGII!IJJJJJJJJJJ J J J J JJJJJJJJJJJJJJJJJJKKKKKKKKKK K K K K KKKKKKKKKKKKKKKKKKLopp-table!operating-points-v2\Lopp-450000000topp-27000000syscon@5700000!sysconQpp\Mdsi@4700000)!qcom,apq8064-dsi-ctrlqcom,mdss-dsi-ctrlMDSS DSI CTRL->0 URQp dsi_ctrl8IIII9ITIjIX(ifacebuscore_mmsssrcbytepixelcore RISIWI8Ii 1111M1 disabledportsport@0Qendpointport@1Qendpointphy@4700200!qcom,dsi-phy-28nm-8960`Qppp\"dsi_plldsi_phydsi_phy_regulator ifaceref I disabled\1dsi@5800000!qcom,mdss-dsi-ctrl UQ dsi_ctrl8I IIIRIVIPIZ(ifacebuscore_mmsssrcbytepixelcore RIUIYIQIO 2222M2 disabledportsport@0Qendpointport@1Qendpointdsi-phy@5800200!qcom,dsi-phy-28nm-8960Q\"dsi_plldsi_phydsi_phy_regulator ifaceref I ` disabled\2iommu@7500000!qcom,apq8064-iommusmmu_pclkiommu_clkI IQPU?@\Oiommu@7600000!qcom,apq8064-iommusmmu_pclkiommu_clkI IQ`U=>\Piommu@7c00000!qcom,apq8064-iommusmmu_pclkiommu_clkI I!QUEF\Jiommu@7d00000!qcom,apq8064-iommusmmu_pclkiommu_clkI I!QU\Kpci@1b500000!qcom,pcie-apq8064 QPP `dbielbiparfconfigrpci#0J Umsi-@$%&'+.-coreifacephy(wlkjih~axiahbporpciphy disabledhdmi-tx@4a00000!qcom,hdmi-tx-8960CdefaultQNQcore_physical UOI>I Icoremaster_ifaceslave_iface3 disabledportsport@0Qendpointport@1Qendpointphy@4a00400!qcom,hdmi-phy-8960Q`hdmi_phyhdmi_pllI slave_iface` disabled\3display-controller@5100000 !qcom,mdp4Q UK0IMIIINI_I`3core_clkiface_clkbus_clklut_clkhdmi_clktv_clk OOPPportsport@0Qendpointport@1Qendpointport@2Qendpointport@3Qendpointriva-pil@3200800!qcom,riva-pilQ   @ ccudxepmuQ wdogfatal}RNS[Th4okayCdefault QUVW\[iris !qcom,wcn3660-xou;XYZsmd-edge U <rivawcnss !qcom,wcnss WCNSS_CTRL[bluetooth!qcom,wcnss-btwifi!qcom,wcnss-wlanUtxrx\ \ tx-enabletx-rings-emptyetb@1a01000"!arm,coresight-etb10arm,primecellQ apb_pclkin-portsportendpoint]\_tpiu@1a03000!!arm,coresight-tpiuarm,primecellQ0 apb_pclkin-portsportendpoint^\`replicator !arm,coresight-static-replicator apb_pclkout-portsport@0Qendpoint_\]port@1Qendpoint`\^in-portsportendpointa\ffunnel@1a04000+!arm,coresight-dynamic-funnelarm,primecellQ@ apb_pclkin-portsport@0Qendpointb\hport@1Qendpointc\jport@4Qendpointd\lport@5Qendpointe\nout-portsportendpointf\aetm@1a1c000"!arm,coresight-etm3xarm,primecellQ apb_pclk gout-portsportendpointh\betm@1a1d000"!arm,coresight-etm3xarm,primecellQ apb_pclk iout-portsportendpointj\cetm@1a1e000"!arm,coresight-etm3xarm,primecellQ apb_pclk kout-portsportendpointl\detm@1a1f000"!arm,coresight-etm3xarm,primecellQ apb_pclk mout-portsportendpointn\ealiases#/soc/gsbi@1a200000/serial@1a240000chosenserial0:115200n8gpio-keys !gpio-keysCdefaultQokey-camera-focus camera_focus s*$5key-camera-snapshotcamera_snapshot s*$5key-volume-down volume_down s*$5rkey-volume-up volume_up s*#$5s #address-cells#size-cellsmodelcompatibleinterrupt-parentchassis-typerangesregno-mapphandleenable-methoddevice_typenext-level-cacheqcom,accqcom,sawcpu-idle-statescache-levelcache-unifiedentry-latency-usexit-latency-usmin-residency-uspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresisinterrupts#clock-cellsclock-frequencymemory-regionhwlocksqcom,ipc-1qcom,ipc-2qcom,ipc-3qcom,ipc-4#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsclocksclock-namesio-channelsgpio-controllergpio-ranges#gpio-cellspinctrl-namespinctrl-0pinsfunctiondrive-strenghbias-disablebias-pull-updrive-strengthoutput-highbias-pull-down#hwlock-cellscpu-offsetclock-output-namesregulatorstatuscell-indexsyscon-tcsrpinctrl-1qcom,modeqcom,controller-typedrive-push-pullinput-enablepower-sourceqcom,drive-strengthqcom,pull-up-strengthallow-set-timedebounceinterrupts-extended#io-channel-cells#power-domain-cells#reset-cellsnvmem-cellsnvmem-cell-namesinterrupt-names#qcom,sensors#thermal-sensor-cellsqcom,ipcvin_l1_l2_l12_l18-supplyvin_lvs_1_3_6-supplyvin_lvs_4_5_7-supplyvin_ncp-supplyvin_lvs2-supplyvin_l24-supplyvin_l25-supplyvin_l27-supplyvin_l28-supplyregulator-always-onregulator-min-microvoltregulator-max-microvoltqcom,switch-mode-frequencyqcom,force-modeassigned-clocksassigned-clock-ratesresetsreset-namesphy_typeahb-burst-configphysphy-namesdr_mode#phy-cellsv3p3-supplyv1p8-supplyreg-namesports-implementedarm,primecell-periphidbus-widthcap-sd-highspeedcap-mmc-highspeedmax-frequencyno-1-8-vdmasdma-namesvmmc-supplycd-gpios#dma-cellsqcom,eenon-removablevqmmc-supplyiommusoperating-points-v2opp-hzlabelassigned-clock-parentssyscon-sfpb#iommu-cellsqcom,ncblinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapvddcx-supplyvddmx-supplyvddpx-supplyvddxo-supplyvddrfa-supplyvddpa-supplyvdddig-supplyqcom,smd-edgeqcom,smd-channelsqcom,mmioqcom,smem-statesqcom,smem-state-namesremote-endpointcpuserial0stdout-pathlinux,input-typelinux,code