f8( tazw,beelink-a1rockchip,rk3328 + 7Beelink A1aliases=/pinctrl/gpio@ff210000C/pinctrl/gpio@ff220000I/pinctrl/gpio@ff230000O/pinctrl/gpio@ff240000U/serial@ff110000]/serial@ff120000e/serial@ff130000m/i2c@ff150000r/i2c@ff160000w/i2c@ff170000|/i2c@ff180000/ethernet@ff540000/mmc@ff500000/mmc@ff520000cpus+cpu@0cpuarm,cortex-a53xpsci@&3@@R_p{ cpu@1cpuarm,cortex-a53xpsci@&3@@R_p{ cpu@2cpuarm,cortex-a53xpsci@&3@@R_p{ cpu@3cpuarm,cortex-a53xpsci@&3@@R_p{ idle-statespscicpu-sleeparm,idle-statex{l2-cachecache @({opp-table-0operating-points-v2{opp-408000000Q~$@5opp-600000000#F~$@opp-8160000000,B@$@opp-1008000000<$@opp-1200000000G($@opp-1296000000M?d $@analog-soundsimple-audio-cardAi2sZ tAnalog A/Vokaysimple-audio-card,cpusimple-audio-card,codecarm-pmuarm,cortex-a53-pmu0defg display-subsystemrockchip,display-subsystem hdmi-soundsimple-audio-cardAi2sZtHDMIokaysimple-audio-card,cpusimple-audio-card,codecpsciarm,psci-1.0arm,psci-0.2smctimerarm,armv8-timer0   xin24m fixed-clockn6xin24m{Fi2s@ff000000(rockchip,rk3328-i2srockchip,rk3066-i2s )7i2s_clki2s_hclk  txrx okay{i2s@ff010000(rockchip,rk3328-i2srockchip,rk3066-i2s *8i2s_clki2s_hclktxrx okay{i2s@ff020000(rockchip,rk3328-i2srockchip,rk3066-i2s +9i2s_clki2s_hclktxrx  disabledspdif@ff030000rockchip,rk3328-spdif .: mclkhclk txdefault*  disabledpdm@ff040000 rockchip,pdm=Rpdm_clkpdm_hclkrxdefaultsleep*4 disabledsyscon@ff100000&rockchip,rk3328-grfsysconsimple-mfd{9io-domains"rockchip,rk3328-io-voltage-domainokay>LZhvgpiorockchip,rk3328-grf-gpio{Epower-controller!rockchip,rk3328-power-controller+{<power-domain@6power-domain@5 BABpower-domain@8Freboot-modesyscon-reboot-modeRBRBRB RBserial@ff110000&rockchip,rk3328-uartsnps,dw-apb-uart 7&baudclkapb_pclktxrxdefault * !  disabledserial@ff120000&rockchip,rk3328-uartsnps,dw-apb-uart 8'baudclkapb_pclktxrxdefault *"#$  disabledserial@ff130000&rockchip,rk3328-uartsnps,dw-apb-uart 9(baudclkapb_pclktxrxdefault*% okayi2c@ff150000(rockchip,rk3328-i2crockchip,rk3399-i2c $+7 i2cpclkdefault*& disabledi2c@ff160000(rockchip,rk3328-i2crockchip,rk3399-i2c %+8 i2cpclkdefault*'okayB@#;Spmic@18rockchip,rk805 (default*)Rs****regulatorsDCDC_REG1 vdd_logic `p{:regulator-state-mem.FB@DCDC_REG2vdd_arm `p{regulator-state-mem.F~DCDC_REG3vcc_ddrregulator-state-mem.DCDC_REG4vcc_io2Z2Z{regulator-state-mem.F2ZLDO_REG1vdd_18w@w@{regulator-state-mem.Fw@LDO_REG2 vcc_18emmcw@w@{regulator-state-mem.Fw@LDO_REG3vdd_11regulator-state-mem.Fi2c@ff170000(rockchip,rk3328-i2crockchip,rk3399-i2c &+9 i2cpclkdefault*+ disabledi2c@ff180000(rockchip,rk3328-i2crockchip,rk3399-i2c '+: i2cpclkdefault*, disabledspi@ff190000(rockchip,rk3328-spirockchip,rk3066-spi 1+ spiclkapb_pclk txrxdefault*-./0 disabledwatchdog@ff1a0000 rockchip,rk3328-wdtsnps,dw-wdt (pwm@ff1b0000rockchip,rk3328-pwm< pwmpclkdefault*1b disabledpwm@ff1b0010rockchip,rk3328-pwm< pwmpclkdefault*2b disabledpwm@ff1b0020rockchip,rk3328-pwm < pwmpclkdefault*3b disabledpwm@ff1b0030rockchip,rk3328-pwm0< pwmpclkdefault*4b disableddma-controller@ff1f0000arm,pl330arm,primecell@m apb_pclk{thermal-zonessoc-thermal5tripstrip-point0ppassivetrip-point1Lpassive{6soc-crits criticalcooling-mapsmap060 tsadc@ff250000rockchip,rk3328-tsadc% : $P$tsadcapb_pclkinitdefaultsleep*74827<B Ctsadc-apbO9\sokay{5efuse@ff260000rockchip,rk3328-efuse&P+> pclk_efuse id@7cpu-leakage@17logic-leakage@19cpu-version@1a{Gadc@ff280000.rockchip,rk3328-saradcrockchip,rk3399-saradc( P%saradcapb_pclk<V Csaradc-apb disabledgpu@ff300000"rockchip,rk3328-maliarm,mali-4500TZW]XY[\"gpgpmmupppp0ppmmu0pp1ppmmu1 buscore<f:iommu@ff330200rockchip,iommu3 ` aclkiface disablediommu@ff340800rockchip,iommu4@ bF aclkiface disabledvideo-codec@ff350000rockchip,rk3328-vpu5  vdpuF aclkhclk;<iommu@ff350800rockchip,iommu5@  F aclkiface<{;video-codec@ff360000*rockchip,rk3328-vdecrockchip,rk3399-vdec6  BABaxiahbcabaccore AB ׄׄ=<iommu@ff360480rockchip,iommu 6@6@ JB aclkiface<{=vop@ff370000rockchip,rk3328-vop7>  x;aclk_vopdclk_vophclk_vop< Caxiahbdclk>okayport+{ endpoint@0$?{Diommu@ff373f00rockchip,iommu7?  ; aclkifaceokay{>hdmi@ff3c0000rockchip,rk3328-dw-hdmi<  #Fiahbisfrcec4@9hdmidefault *ABCO9 okay{ports+port@0endpoint$D{?port@1codec@ff410000rockchip,rk3328-codecA* pclkmclkO9 okay CE{phy@ff430000rockchip,rk3328-hdmi-phyC SFysysclkrefoclkrefpclk hdmi_phyNG Zcpu-versionkokay{@clock-controller@ff440000(rockchip,rk3328-crurockchip,crusysconDO9v x=&'(ABDC"\5H4$zFFF|n6n6n6ׄn6#FLGрxhxhрxhxh{syscon@ff450000.rockchip,rk3328-usb2phy-grfsysconsimple-mfdE+usb2phy@100rockchip,rk3328-usb2phyFphyclk usb480m_phy {Hokay{Hotg-portk$;<=otg-bvalidotg-idlinestateokay{Vhost-portk > linestateokay{Wmmc@ff5000000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcP@   =!JNbiuciuciu-driveciu-sampleр<mCresetokaydefault*IJKLmmc@ff5100000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcQ@   >"KObiuciuciu-driveciu-sampleр<nCreset disabledmmc@ff5200000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshcR@  ?#LPbiuciuciu-driveciu-sampleр<oCresetokay &.default *MNOethernet@ff540000rockchip,rk3328-gmacT macirq8dWXZYMstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac<c CstmmacethO9<JXokay dfPPcinputpQ{rgmiidefault*R&mdiosnps,dwmac-mdio+ethernet-phy@0'u0 ({Qethernet@ff550000rockchip,rk3328-gmacUO9 macirq8TSSUVIstmmacethmac_clk_rxmac_clk_txclk_mac_refaclk_macpclk_macclk_macphy<b Cstmmaceth{rmiipS<JXcoutput disabledmdiosnps,dwmac-mdio+ethernet-phy@04ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22V<ddefault*TU{Susb@ff5800002rockchip,rk3328-usbrockchip,rk3066-usbsnps,dwc2X Motghost  @ 4V 9usb2-phyokayusb@ff5c0000 generic-ehci\  NH4W9usbokaydefault*XYZ[\]usb@ff5d0000 generic-ohci]  NH4W9usb disabledmmc@ff5f00000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshc_@  @MQbiuciuciu-driveciu-sampleр<hCreset disabledusb@ff600000rockchip,rk3328-dwc3snps,dwc3` C`aref_clksuspend_clkbus_clkotg +utmi_wide 4 U m    disabledinterrupt-controller@ff811000 arm,gic-400  @ @ `   {crypto@ff060000rockchip,rk3328-crypto@ PQ;hclk_masterhclk_slavesclk<D Ccrypto-rstpinctrlrockchip,rk3328-pinctrlO9+ gpio@ff210000rockchip,gpio-bank! 3  {kgpio@ff220000rockchip,gpio-bank" 4  gpio@ff230000rockchip,gpio-bank# 5  {(gpio@ff240000rockchip,gpio-bank$ 6  pcfg-pull-up {`pcfg-pull-down {hpcfg-pull-none +{^pcfg-pull-none-2ma + 8{gpcfg-pull-up-2ma  8pcfg-pull-up-4ma  8{apcfg-pull-none-4ma + 8{dpcfg-pull-down-4ma  8pcfg-pull-none-8ma + 8{bpcfg-pull-up-8ma  8{cpcfg-pull-none-12ma + 8 {epcfg-pull-up-12ma  8 {fpcfg-output-high G{jpcfg-output-low S{ipcfg-input-high  ^{_pcfg-input ^i2c0i2c0-xfer k^^{&i2c1i2c1-xfer k^^{'i2c2i2c2-xfer k ^^{+i2c3i2c3-xfer k^^{,i2c3-pins k^^hdmi_i2chdmii2c-xfer k^^{Bpdm-0pdmm0-clk k^{pdmm0-fsync k^pdmm0-sdi0 k^{pdmm0-sdi1 k^{pdmm0-sdi2 k^{pdmm0-sdi3 k^{pdmm0-clk-sleep k_{pdmm0-sdi0-sleep k_{pdmm0-sdi1-sleep k_{pdmm0-sdi2-sleep k_{pdmm0-sdi3-sleep k_{pdmm0-fsync-sleep k_tsadcotp-pin k ^{7otp-out k ^{8uart0uart0-xfer k ^`{uart0-cts k ^{ uart0-rts k ^{!uart0-rts-pin k ^uart1uart1-xfer k^`{"uart1-cts k^{#uart1-rts k^{$uart1-rts-pin k^uart2-0uart2m0-xfer k^`uart2-1uart2m1-xfer k^`{%spi0-0spi0m0-clk k`spi0m0-cs0 k `spi0m0-tx k `spi0m0-rx k `spi0m0-cs1 k `spi0-1spi0m1-clk k`spi0m1-cs0 k`spi0m1-tx k`spi0m1-rx k`spi0m1-cs1 k`spi0-2spi0m2-clk k`{-spi0m2-cs0 k`{0spi0m2-tx k`{.spi0m2-rx k`{/i2s1i2s1-mclk k^i2s1-sclk k^i2s1-lrckrx k^i2s1-lrcktx k^i2s1-sdi k^i2s1-sdo k^i2s1-sdio1 k^i2s1-sdio2 k^i2s1-sdio3 k^i2s1-sleep k_________i2s2-0i2s2m0-mclk k^i2s2m0-sclk k^i2s2m0-lrckrx k^i2s2m0-lrcktx k^i2s2m0-sdi k^i2s2m0-sdo k^i2s2m0-sleep` k______i2s2-1i2s2m1-mclk k^i2s2m1-sclk k^i2sm1-lrckrx k^i2s2m1-lrcktx k^i2s2m1-sdi k^i2s2m1-sdo k^i2s2m1-sleepP k_____spdif-0spdifm0-tx k^spdif-1spdifm1-tx k^spdif-2spdifm2-tx k^{sdmmc0-0sdmmc0m0-pwren kasdmmc0m0-pin kasdmmc0-1sdmmc0m1-pwren kasdmmc0m1-pin kasdmmc0sdmmc0-clk kb{Isdmmc0-cmd kc{Jsdmmc0-dectn ka{Ksdmmc0-wrprt kasdmmc0-bus1 kcsdmmc0-bus4@ kcccc{Lsdmmc0-pins kaaaaaaaasdmmc0extsdmmc0ext-clk kdsdmmc0ext-cmd kasdmmc0ext-wrprt kasdmmc0ext-dectn kasdmmc0ext-bus1 kasdmmc0ext-bus4@ kaaaasdmmc0ext-pins kaaaaaaaasdmmc1sdmmc1-clk k bsdmmc1-cmd k csdmmc1-pwren kcsdmmc1-wrprt kcsdmmc1-dectn kcsdmmc1-bus1 kcsdmmc1-bus4@ kccccsdmmc1-pins k a aaaaaaaaemmcemmc-clk ke{Memmc-cmd kf{Nemmc-pwren k^emmc-rstnout k^emmc-bus1 kfemmc-bus4@ kffffemmc-bus8 kffffffff{Opwm0pwm0-pin k^{1pwm1pwm1-pin k^{2pwm2pwm2-pin k^{3pwmirpwmir-pin k^{4gmac-1rgmiim1-pins` k b ddbddd d db bddbbb bdbbbb{Rrmiim1-pins kgegggg g ge e ^ ^^^^^gmac2phyfephyled-speed10 k^fephyled-duplex k^fephyled-rxm1 k^{Tfephyled-txm1 k^fephyled-linkm1 k^{Utsadc_pintsadc-int k ^tsadc-pin k ^hdmi_pinhdmi-cec k^{Ahdmi-hpd kh{Ccif-0dvp-d2d9-m0 k^^^^^ ^ ^ ^^^^^cif-1dvp-d2d9-m1 k^^^^^^^^^^^^pmicpmic-int-l k`{)usb3usb30-host-drv k^{lwifibt-dis ki{Xbt-wake-host k`{Ychip-en ki{Zhost-wake-bt kj{[wl-dis ki{\wl-wake-host k`{]chosen yserial2:1500000n8external-gmac-clock fixed-clocksY@ gmac_clkin{Pusb3-current-switchregulator-fixed  kdefault*l vcc_host_5v *vcc-sysregulator-fixedvcc_sysLK@LK@{*ir-receivergpio-ir-receiver H( rc-beelink-gs1 compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3serial0serial1serial2i2c0i2c1i2c2i2c3ethernet0mmc0mmc1device_typeregclocks#cooling-cellscpu-idle-statesdynamic-power-coefficientenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendsimple-audio-card,formatsimple-audio-card,mclk-fssimple-audio-card,namestatussound-daiinterruptsinterrupt-affinityports#clock-cellsclock-frequencyclock-output-namesclock-namesdmasdma-names#sound-dai-cellspinctrl-namespinctrl-0pinctrl-1vccio1-supplyvccio2-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplypmuio-supplygpio-controller#gpio-cells#power-domain-cellsoffsetmode-normalmode-recoverymode-bootloadermode-loaderreg-io-widthreg-shifti2c-scl-falling-time-nsi2c-scl-rising-time-nsrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-on-in-suspendregulator-suspend-microvolt#pwm-cellsarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaysustainable-powerthermal-sensorstemperaturehysteresistripcooling-devicecontributionassigned-clocksassigned-clock-ratespinctrl-2resetsreset-namesrockchip,grfrockchip,hw-tshut-temp#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarityrockchip,efuse-sizebits#io-channel-cellsinterrupt-namesmali-supply#iommu-cellsiommuspower-domainsremote-endpointphysphy-namesmute-gpiosnvmem-cellsnvmem-cell-names#phy-cells#reset-cellsassigned-clock-parentsfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpvmmc-supplyvqmmc-supplymmc-ddr-1_8vmmc-hs200-1_8vno-sdno-sdionon-removabletx-fifo-depthrx-fifo-depthsnps,txpblclock_in_outphy-handlephy-modephy-supplysnps,aalsnps,pbltx_delayrx_delayreset-assert-usreset-deassert-usreset-gpiosphy-is-integrateddr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephy_typesnps,dis-del-phy-power-chg-quirksnps,dis_enblslpm_quirksnps,dis-tx-ipgap-linecheck-quirksnps,dis-u2-freeclk-exists-quirksnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirk#interrupt-cellsinterrupt-controllerrangesbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowinput-enablerockchip,pinsstdout-pathenable-active-highgpiovin-supplylinux,rc-map-name