Ð þí8 x(‰ @Annapurna Labs Alpine v2 EVPal,alpine-v2-evpal,alpine-v2"1cpus"1cpu@0arm,cortex-a57=cpuIMpscicpu@1arm,cortex-a57=cpuIMpscicpu@2arm,cortex-a57=cpuIMpscicpu@3arm,cortex-a57=cpuIMpscipsciarm,psci-0.2arm,psciTsmc[„g„o„sbclk fixed-clockvƒB@“timerarm,armv8-timer0›   pmuarm,cortex-a57-pmu0›hijksoc simple-bus"1¦interrupt-controller@f0200000 arm,gic-v3PIð ð( ð ð ð  › ­Â“pci@fbc00000pci-host-ecam-generic=pci1"ÂIûÀÓø@æ@5H6¦þþôþmsix@fbe00000al,alpine-msixIûà  ( “io-fabric@fc000000 simple-bus"1¦üserial@1883000 ns16550aIˆ0 ›ƒÍe8BOokayserial@1884000 ns16550aIˆ@ ›ƒÍe8B Odisabledserial@1885000 ns16550aIˆP ›ƒÍe8B Odisabledserial@1886000 ns16550aIˆ` ›ƒÍe8B Odisabledtimer@1890000arm,sp804arm,primecellI‰ › Vtimer@1891000arm,sp804arm,primecellI‰ › V Odisabledtimer@1892000arm,sp804arm,primecellI‰  › V Odisabledtimer@1893000arm,sp804arm,primecellI‰0 › V Odisabledaliases']/soc/io-fabric@fc000000/serial@1883000'e/soc/io-fabric@fc000000/serial@1884000'm/soc/io-fabric@fc000000/serial@1885000'u/soc/io-fabric@fc000000/serial@1886000chosen}serial0:115200n8 modelcompatibleinterrupt-parent#address-cells#size-cellsdevice_typeregenable-methodcpu_suspendcpu_offcpu_on#clock-cellsclock-frequencyphandleinterruptsrangesinterrupt-controller#interrupt-cellsinterrupt-map-maskinterrupt-mapbus-rangemsi-parentmsi-controlleral,msi-base-spial,msi-num-spisreg-shiftreg-io-widthstatusclocksserial0serial1serial2serial3stdout-path