ax8R(R:friendlyarm,cm3588-nasfriendlyarm,cm3588rockchip,rk3588 +7FriendlyElec CM3588 NASaliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/mmc@fe2e0000/mmc@fe2c0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0cpuarm,cortex-a55 psci0 7 G0,\ ly@@  cpu@100cpuarm,cortex-a55 psci0 \ ly@@ cpu@200cpuarm,cortex-a55 psci0 \ ly@@ cpu@300cpuarm,cortex-a55 psci0 \ ly@@ cpu@400cpuarm,cortex-a76 psci0 7 G0,\ ly@@cpu@500cpuarm,cortex-a76 psci0 \ ly@@cpu@600cpuarm,cortex-a76 psci0 7 G0,\ ly@@cpu@700cpuarm,cortex-a76 psci0 \ ly@@ idle-states%pscicpu-sleeparm,idle-state2CZdkx{ l2-cache-l0cachen{@ l2-cache-l1cachen{@l2-cache-l2cachen{@l2-cache-l3cachen{@l2-cache-b0cachen{@l2-cache-b1cachen{@l2-cache-b2cachen{@l2-cache-b3cachen{@l3-cachecachen0{@display-subsystemrockchip,display-subsystemfirmwareopteelinaro,optee-tzsmcscmi arm,scmi-smc+protocol@14  protocol@16 pmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0smcclock-0 fixed-clock)׫splltimerarm,armv8-timerP    %sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6xin24mclock-2 fixed-clockxin32ksram@10f000 mmio-sram +sram@0arm,scmi-shmem gpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf 7 G 0corecoregroupstacks 0\]^ jobmmugpu( 6okay!="I"usb@fc000000rockchip,rk3588-dwc3snps,dwc3 @0ref_clksuspend_clkbus_clkUotg ]#$busb2-phyusb3-phy lutmi_wide( uR|6okay(portendpoint8%usb@fc800000"rockchip,rk3588-ehcigeneric-ehci 0&]'busb( 6okayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci 0&]'busb( 6okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci 0(])busb( 6okayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci 0(])busb( 6okayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3 @(0jihkr&ref_clksuspend_clkbus_clkutmipipeUhost]* busb3-phy lutmi_wideu4|H6okayiommu@fc900000 arm,smmu-v3 @qsvoeventqgerrorpriqcmdq-syncb 6disablediommu@fcb00000 arm,smmu-v3 @}{eventqgerrorpriqcmdq-syncb 6disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfd Xqsyscon@fd58c000rockchip,rk3588-sys-grfsyscon Xlsyscon@fd5a4000rockchip,rk3588-vop-grfsyscon Z@ msyscon@fd5a6000rockchip,rk3588-vo0-grfsyscon Z` 0syscon@fd5a8000rockchip,rk3588-vo1-grfsyscon Z@0nsyscon@fd5ac000rockchip,rk3588-usb-grfsyscon Z@syscon@fd5b0000rockchip,rk3588-php-grfsyscon [.syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon [syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon \@syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon \@syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ]@+usb2phy@0rockchip,rk3588-usb2phy 0phyclk usb480m_phy0umophyapb6okayotg-port{6okay+#syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ]@+usb2phy@8000rockchip,rk3588-usb2phy 0phyclk usb480m_phy2uoophyapb6okay&host-port{6okay,'syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ]@+usb2phy@c000rockchip,rk3588-usb2phy 0phyclk usb480m_phy3up ophyapb6okay(host-port{6okay-)syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon ^syscon@fd5f0000rockchip,rk3588-iocsyscon _sram@fd600000 mmio-sram ``+clock-controller@fd7c0000rockchip,rk3588-cru |7]q@GA.2Fq)׫ׄe/ׄ eZ р .i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c =0ts i2cpclk/default+6okayregulator@42rockchip,rk8602 Bvdd_cpu_big0_s0dp 8M0regulator-state-memXregulator@43 rockchip,rk8603rockchip,rk8602 Cvdd_cpu_big1_s0dp 8M0regulator-state-memXserial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uart K0baudclkapb_pclkq11vtxrx2default 6disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0 pwmpclk3default 6disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0 pwmpclk4default6okaypwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0 pwmpclk5default 6disabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00 pwmpclk6default6okaypower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd opower-controller!rockchip,rk3588-power-controller+6okay power-domain@8 +power-domain@9  0!#" 789+power-domain@10 0!#":power-domain@11 0!#";power-domain@12 0<=>?power-domain@13 +power-domain@14 (0@power-domain@15  0Apower-domain@16 0 BCD+power-domain@17  0 EFGpower-domain@21 0 HIJKLMNO+power-domain@23 0CAPpower-domain@14  0@power-domain@15 0Apower-domain@22 0Qpower-domain@24 0[Z]RS+power-domain@25 80ZTpower-domain@26 80QUVpower-domain@27 00WXYZ+power-domain@28  0[\power-domain@29 (0]^power-domain@30 0z{_power-domain@31 @0W`abcpower-domain@33 !0WZ[power-domain@34 "0WZ[power-domain@37 %02dpower-domain@38 &045power-domain@40 (evideo-codec@fdb50000+rockchip,rk3588-vpu121rockchip,rk3568-vpu wvdpu0 aclkhclkf( iommu@fdb50800,rockchip,rk3588-iommurockchip,rk3568-iommu @v aclkiface0( bfrga@fdb80000(rockchip,rk3588-rgarockchip,rk3288-rga t0aclkhclksclkurqp ocoreaxiahb( video-codec@fdba0000rockchip,rk3588-vepu121 z0 aclkhclkg( iommu@fdba0800,rockchip,rk3588-iommurockchip,rk3568-iommu @y0 aclkiface( bgvideo-codec@fdba4000rockchip,rk3588-vepu121 @|0 aclkhclkh( iommu@fdba4800,rockchip,rk3588-iommurockchip,rk3568-iommu H@{0 aclkiface( bhvideo-codec@fdba8000rockchip,rk3588-vepu121 ~0 aclkhclki( iommu@fdba8800,rockchip,rk3588-iommurockchip,rk3568-iommu @}0 aclkiface( bivideo-codec@fdbac000rockchip,rk3588-vepu121 0 aclkhclkj( iommu@fdbac800,rockchip,rk3588-iommurockchip,rk3568-iommu @0 aclkiface( bjvideo-codec@fdc70000rockchip,rk3588-av1-vpu lvdpu7ACGׄׄ0AC aclkhclk(  uvop@fdd90000rockchip,rk3588-vop  BPvopgamma-lut80]\abcd[7aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_vopk( lmno 6disabledports+port@0+ port@1+ port@2+ port@3+ iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu  ~0]\ aclkifaceb(  6disabledki2s@fddc0000rockchip,rk3588-i2s-tdm 0mclk_txmclk_rxhclk7qpvtx( uotx-m 6disabledi2s@fddf0000rockchip,rk3588-i2s-tdm 0445mclk_txmclk_rxhclk71qpvtx( uotx-m6okayi2s@fddfc000rockchip,rk3588-i2s-tdm 000,mclk_txmclk_rxhclk7-qpvrx( uorx-m 6disabledqos@fdf35000rockchip,rk3588-qossyscon P <qos@fdf35200rockchip,rk3588-qossyscon R =qos@fdf35400rockchip,rk3588-qossyscon T >qos@fdf35600rockchip,rk3588-qossyscon V ?qos@fdf36000rockchip,rk3588-qossyscon ` _qos@fdf39000rockchip,rk3588-qossyscon dqos@fdf3d800rockchip,rk3588-qossyscon eqos@fdf3e000rockchip,rk3588-qossyscon aqos@fdf3e200rockchip,rk3588-qossyscon `qos@fdf3e400rockchip,rk3588-qossyscon bqos@fdf3e600rockchip,rk3588-qossyscon cqos@fdf40000rockchip,rk3588-qossyscon ]qos@fdf40200rockchip,rk3588-qossyscon  ^qos@fdf40400rockchip,rk3588-qossyscon  Wqos@fdf40500rockchip,rk3588-qossyscon  Xqos@fdf40600rockchip,rk3588-qossyscon  Yqos@fdf40800rockchip,rk3588-qossyscon  Zqos@fdf41000rockchip,rk3588-qossyscon  [qos@fdf41100rockchip,rk3588-qossyscon  \qos@fdf60000rockchip,rk3588-qossyscon Bqos@fdf60200rockchip,rk3588-qossyscon  Cqos@fdf60400rockchip,rk3588-qossyscon  Dqos@fdf61000rockchip,rk3588-qossyscon  Eqos@fdf61200rockchip,rk3588-qossyscon  Fqos@fdf61400rockchip,rk3588-qossyscon  Gqos@fdf62000rockchip,rk3588-qossyscon @qos@fdf63000rockchip,rk3588-qossyscon 0 Aqos@fdf64000rockchip,rk3588-qossyscon @ Pqos@fdf66000rockchip,rk3588-qossyscon ` Hqos@fdf66200rockchip,rk3588-qossyscon b Iqos@fdf66400rockchip,rk3588-qossyscon d Jqos@fdf66600rockchip,rk3588-qossyscon f Kqos@fdf66800rockchip,rk3588-qossyscon h Lqos@fdf66a00rockchip,rk3588-qossyscon j Mqos@fdf66c00rockchip,rk3588-qossyscon l Nqos@fdf66e00rockchip,rk3588-qossyscon n Oqos@fdf67000rockchip,rk3588-qossyscon p Qqos@fdf67200rockchip,rk3588-qossyscon r qos@fdf70000rockchip,rk3588-qossyscon :qos@fdf71000rockchip,rk3588-qossyscon  ;qos@fdf72000rockchip,rk3588-qossyscon 7qos@fdf72200rockchip,rk3588-qossyscon " 8qos@fdf72400rockchip,rk3588-qossyscon $ 9qos@fdf80000rockchip,rk3588-qossyscon Tqos@fdf81000rockchip,rk3588-qossyscon  Uqos@fdf81200rockchip,rk3588-qossyscon  Vqos@fdf82000rockchip,rk3588-qossyscon Rqos@fdf82200rockchip,rk3588-qossyscon " Sdfi@fe060000 rockchip,rk3588-dfi@&0:qpcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie%0?00CH>MR)aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr/@`Srrrrar0s0]t bpcie-phy( "T @ @0 @@dbiapbconfigu). opwrpipe+6okaydefaultu vwlegacy-interrupt-controller/ rpcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie%@O00DI?NSs)aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr/@`Sxxxxar@s@]y bpcie-phy( "T @ @0 A@dbiapbconfigu*/ opwrpipe+6okaydefaultz v{legacy-interrupt-controller/ xethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a  macirqeth_wake_irq(067Y^50stmmacethclk_mac_refpclk_macaclk_macptp_ref( !u$ ostmmacethl.|} ~ 6disabledmdiosnps,dwmac-mdio+stmmac-axi-config%/?|rx-queues-configO}queue0queue1tx-queues-confige~queue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci !(0b_eTosatapmaliverxoobrefasic{+ 6disabledsata-port@0 @]y bsata-phy  sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci #(0dagVqsatapmaliverxoobrefasic{+ 6disabledsata-port@0 @]* bsata-phy  spi@fe2b0000 rockchip,sfc +@0/0clk_sfchclk_sfc+ 6disabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc ,@ 0  biuciuciu-driveciu-sampleрdefault( (6okay mmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc -@ 0biuciuciu-driveciu-sample default( % 6disabledmmc@fe2e0000rockchip,rk3588-dwcmshc .7-., G n6 (0,*+-.corebusaxiblocktimer default(uocorebusaxiblocktimer6okay-<V\ i2s@fe470000rockchip,rk3588-i2s-tdm G0+/(mclk_txmclk_rxhclk7)-q11vtxrx( &u*+ otx-mrx-mjdefault6okayi2s@fe480000rockchip,rk3588-i2s-tdm H0y}umclk_txmclk_rxhclkq11vtxrxu^_ otx-mrx-mjdefault( 6disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2s I0i2s_clki2s_hclk7qvtxrx( &default 6disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2s J0%i2s_clki2s_hclk7"qvtxrx( &default 6disabledinterrupt-controller@fe600000 arm,gic-v3  `h a8/+msi-controller@fe640000arm,gic-v3-its dsmsi-controller@fe660000arm,gic-v3-its fppi-partitionsinterrupt-partition-0interrupt-partition-1 dma-controller@fea10000arm,pl330arm,primecell @ VW0n apb_pclk1dma-controller@fea30000arm,pl330arm,primecell @ XY0o apb_pclki2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c 0{ i2cpclk>default+ 6disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0| i2cpclk?default+6okayregulator@42rockchip,rk8602 B vdd_npu_s0dp ~8M0regulator-state-memXi2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0} i2cpclk@default+ 6disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0~ i2cpclkAdefault+ 6disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0 i2cpclkBdefault+ 6disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !0TW pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt 0dc tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spi F0spiclkapb_pclkq11vtxrxdefault+ 6disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spi G0spiclkapb_pclkq11vtxrx default+ 6disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spi H0spiclkapb_pclkqvtxrxdefault+6okay7G pmic@0rockchip,rk806  defaultB@ 0 0 (0 40 @0 L0 X0 d0 p0 |0  0   0  dvs1-null-pins gpio_pwrctrl1 pin_fun0dvs2-null-pins gpio_pwrctrl2 pin_fun0dvs3-null-pins gpio_pwrctrl3 pin_fun0regulatorsdcdc-reg1dp ~80 vdd_gpu_s0 "regulator-state-memXdcdc-reg2dp ~80vdd_cpu_lit_s0regulator-state-memXdcdc-reg3 L q80 vdd_log_s0regulator-state-memX  qdcdc-reg4dp ~80 vdd_vdenc_s0regulator-state-memXdcdc-reg5 L 80 vdd_ddr_s0regulator-state-memX  Pdcdc-reg6 vdd2_ddr_s3regulator-state-mem +dcdc-reg7 80vdd_2v0_pldo_s3regulator-state-mem + dcdc-reg82Z 2Z vcc_3v3_s3regulator-state-mem + 2Zdcdc-reg9 vddq_ddr_s0regulator-state-memXdcdc-reg10w@ w@ vcc_1v8_s3regulator-state-mem + w@pldo-reg1w@ w@ avcc_1v8_s0regulator-state-memXpldo-reg2w@ w@ vcc_1v8_s0regulator-state-memX w@pldo-reg3O O avdd_1v2_s0regulator-state-memXpldo-reg42Z 2Z80 vcc_3v3_s0regulator-state-memXpldo-reg5w@ 2Z80 vccio_sd_s0regulator-state-memXpldo-reg6w@ w@ pldo6_s3regulator-state-mem + w@nldo-reg1 q q vdd_0v75_s3regulator-state-mem +  qnldo-reg2 P Pvdd_ddr_pll_s0regulator-state-memX  Pnldo-reg3 q q avdd_0v75_s0regulator-state-memXnldo-reg4 P P vdd_0v85_s0regulator-state-memXnldo-reg5 q q vdd_0v75_s0regulator-state-memXspi@feb30000(rockchip,rk3588-spirockchip,rk3066-spi I0spiclkapb_pclkqvtxrx default+ 6disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uart L0baudclkapb_pclkq11 vtxrxdefault 6disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uart M0baudclkapb_pclkq1 1 vtxrxdefault6okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uart N0baudclkapb_pclkq1 1 vtxrxdefault 6disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uart O0baudclkapb_pclkq vtxrxdefault 6disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uart P0baudclkapb_pclkq vtxrxdefault 6disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uart Q0baudclkapb_pclkq vtxrxdefault6okayserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uart R0baudclkapb_pclkqppvtxrxdefault 6disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uart S0baudclkapb_pclkqp p vtxrxdefault 6disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uart T0baudclkapb_pclkqp p vtxrxdefault 6disabledpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0LK pwmpclkdefault 6disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0LK pwmpclkdefault6okaypwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0LK pwmpclkdefault 6disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00LK pwmpclkdefault 6disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0ON pwmpclkdefault6okaypwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0ON pwmpclkdefault6okaypwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0ON pwmpclkdefault 6disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00ON pwmpclkdefault 6disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm 0RQ pwmpclkdefault 6disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm 0RQ pwmpclkdefault 6disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 0RQ pwmpclkdefault6okaypwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm 00RQ pwmpclkdefault 6disabledthermal-zonespackage-thermal C Y gtripspackage-crit w8  criticalbigcore0-thermal Cd Y gtripsbigcore0-alert wL passivebigcore0-crit w8  criticalcooling-mapsmap0  bigcore2-thermal Cd Y gtripsbigcore2-alert wL passivebigcore2-crit w8  criticalcooling-mapsmap0   littlecore-thermal Cd Y gtripslittlecore-alert wL passivelittlecore-crit w8  criticalcooling-mapsmap0 0 center-thermal C Y gtripscenter-crit w8  criticalgpu-thermal Cd Y gtripsgpu-alert wL passivegpu-crit w8  criticalcooling-mapsmap0  npu-thermal C Y gtripsnpu-crit w8  criticaltsadc@fec00000rockchip,rk3588-tsadc 0tsadcapb_pclk7GuVWotsadc-apbtsadc     gpiootpout 6okayadc@fec10000rockchip,rk3588-saradc  0saradcapb_pclkuU osaradc-apb6okay i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c 0 i2cpclkCdefault+6okay @rtc@51haoyu,hym8563 Qhym8563 default )typec-portc@22 fcs,fusb302 " default 7+connectorusb-c-connector Cdual MUSB-C Ssource ^ jsource 7+ports+port@0 endpoint8port@1 endpoint8%port@2 endpoint8i2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c 0 i2cpclkDdefault+6okay @audio-codec@1brealtek,rt5616 i2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c 0 i2cpclkEdefault+6okayspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spi J0spiclkapb_pclkqp pvtxrxdefault+ 6disabledefuse@fecc0000rockchip,rk3588-otp  0otpapb_pclkphyarbu ootpapbarb+cpu-code@2 id@7 cpu-leakage@17 cpu-leakage@18 cpu-leakage@19 log-leakage@1a gpu-leakage@1b cpu-version@1c  ynpu-leakage@28 (codec-leakage@29 )dma-controller@fed10000arm,pl330arm,primecell @ Z[0p apb_pclkpphy@fed60000rockchip,rk3588-hdptx-phy 0Trefapb{8u#cde!""ophyapbinitcmnlaneroplllcpll 6disabledphy@fed80000rockchip,rk3588-usbdp-phy {0lVrefclkimmortalpclkutmi(u   oinitcmnlanepcs_apbpma_apb ~   6okay   v v$port+endpoint@0 8endpoint@1 8phy@fee00000rockchip,rk3588-naneng-combphy 0vW refapbpipe7G{u<Cophyapb . 6okayyphy@fee20000rockchip,rk3588-naneng-combphy 0xW refapbpipe7G{u>Eophyapb . 6okay*sram@ff001000 mmio-sram +pinctrlrockchip,rk3588-pinctrl+gpio@fd8a0000rockchip,gpio-bank 0qr  +  / 7MicroSD detect [SDMMC_DET_L]Pin 10 [UART0_RX_M0]Pin 08 [UART0_TX_M0/PWM4_M0]Pin 32 [PWM5_M1]USB3 Type-C [CC_INT_L]IR receiver [PWM3_IR_M0]User Buttongpio@fec20000rockchip,gpio-bank 0st  +  / 7Pin 27 [UART6_RX_M1]Pin 28 [UART6_TX_M1]USB2 Type-A [USB2_PWREN]Pin 15Pin 26Pin 21 [SPI0_MISO_M2]Pin 19 [SPI0_MOSI_M2/UART4_RX_M2]Pin 23 [SPI0_CLK_M2/UART4_TX_M2]Pin 24 [SPI0_CS0_M2/UART7_RX_M2]Pin 22 [SPI0_CS1_M0/UART7_TX_M2]CSI-Pin 14 [MIPI_CAM2_CLKOUT]Headphone detect [HP_DET_L]USB3 Type-C [TYPEC5V_PWREN_H]5V Fan [PWM1_M1]HDMI-in detect [HDMIIRX_DET_L]Pin 05 [I2C8_SCL_M2]Pin 03 [I2C8_SDA_M2]gpio@fec30000rockchip,gpio-bank 0uv  +@  / 7SPI NOR Flash [FSPI_D0_M1]SPI NOR Flash [FSPI_D1_M1]SPI NOR Flash [FSPI_D2_M1]SPI NOR Flash [FSPI_D3_M1]SPI NOR Flash [FSPI_CLK_M1]SPI NOR Flash [FSPI_CSN0_M1]CSI-Pin 11 [MIPI_CAM2_RESET_L]CSI-Pin 12 [MIPI_CAM2_PDN_L] gpio@fec40000rockchip,gpio-bank 0wx  +`  / 7Pin 35 [SPI4_MISO_M1/PWM10_M0]Pin 38 [SPI4_MOSI_M1]Pin 40 [SPI4_CLK_M1/UART8_TX_M1]Pin 36 [SPI4_CS0_M1/UART8_RX_M1]Pin 37 [SPI4_CS1_M1]USB3-A #2 [USB3_2_PWREN]DSI-Pin 12 [LCD_RST]Buzzer [PWM8_M0]Pin 33 [PWM9_M0]DSI-Pin 10 [PWM2_M1/LCD_BL]Pin 07Pin 16Pin 18Pin 29 [UART3_TX_M1/PWM12_M0]Pin 31 [UART3_RX_M1/PWM13_M0]Pin 12DSI-Pin 08 [TP_INT_L]DSI-Pin 14 [TP_RST_L]Pin 11 [PWM14_M0]Pin 13 [PWM15_IR_M0]DSI-Pin 06 [I2C5_SCL_M0_TP]DSI-Pin 05 [I2C5_SDA_M0_TP]gpio@fec50000rockchip,gpio-bank 0yz  +  / 7M.2 M-Key Slot4 [M2_D_PERST_L]USB3-A #1 [USB3_TYPEC1_PWREN]M.2 M-Key Slot3 [M2_C_PERST_L]M.2 M-Key Slot2 [M2_B_PERST_L]M.2 M-Key Slot1 [M2_A_CLKREQ_L]M.2 M-Key Slot1 [M2_A_PERST_L]vpcfg-pull-up Gpcfg-pull-down Tpcfg-pull-none cpcfg-pull-none-drv-level-2 c ppcfg-pull-up-drv-level-1 G ppcfg-pull-up-drv-level-2 G ppcfg-pull-none-smt c auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout emmc-bus8 emmc-clk emmc-cmd emmc-data-strobe eth1fspigmac1gpuhdmii2c0i2c0m2-xfer /i2c1i2c1m0-xfer  i2c2i2c2m0-xfer   i2c3i2c3m0-xfer   i2c4i2c4m0-xfer   i2c5i2c5m0-xfer   i2c6i2c6m0-xfer   i2c7i2c7m0-xfer   i2c8i2c8m2-xfer   i2s0i2s0-lrck i2s0-mclk i2s0-sclk i2s0-sdi0 i2s0-sdo0 i2s1i2s1m0-lrck i2s1m0-sclk i2s1m0-sdi0 i2s1m0-sdi1 i2s1m0-sdi2 i2s1m0-sdi3 i2s1m0-sdo0  i2s1m0-sdo1  i2s1m0-sdo2  i2s1m0-sdo3  i2s2i2s2m1-lrck i2s2m1-sclk  i2s2m1-sdi  i2s2m1-sdo  i2s3i2s3-lrck i2s3-sclk i2s3-sdi i2s3-sdo jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp pmupwm0pwm0m0-pins 3pwm1pwm1m1-pins  4pwm2pwm2m1-pins  5pwm3pwm3m0-pins 6pwm4pwm4m1-pins  pwm5pwm5m1-pins  pwm6pwm6m0-pins  pwm7pwm7m0-pins  pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins  pwm12pwm12m0-pins  pwm13pwm13m0-pins  pwm14pwm14m0-pins  pwm15pwm15m0-pins  refclksatasata0sata1sata2sdiosdiom1-pins` sdmmcsdmmc-bus4@ sdmmc-clk sdmmc-cmd sdmmc-det sd-s0-pwr spdif0spdif1spi0spi0m2-pins0    spi0m2-cs0  spi1spi1m1-pins0 spi1m1-cs0 spi1m1-cs1 spi2spi2m2-pins0  spi2m2-cs0 spi3spi3m1-pins0  spi3m1-cs0 spi3m1-cs1 spi4spi4m1-pins0 spi4m1-cs0 tsadctsadc-shut uart0uart0m0-xfer 2uart1uart1m1-xfer   uart2uart2m0-xfer  uart3uart3m1-xfer   uart4uart4m2-xfer   uart5uart5m1-xfer   uart6uart6m1-xfer   uart7uart7m2-xfer   uart8uart8m1-xfer   uart9uart9m1-xfer   vopbt656gpio-functsadc-gpio-func eth0gmac0gpio-ledsled-sys-pin  led-usr-pin hym8563rtc-int pciepcie2-2-rst zpcie2-0-rst  pcie2-1-rst upcie3x2-rst  pcie3x4-rst audioheadphone-detect gpio-keykey1-pin usbvcc-5v0-host20-en vcc-5v0-host30p1-en vcc-5v0-host30p2-en usb-typecusbc0-int typec-5v-pwr-en usb@fc400000rockchip,rk3588-dwc3snps,dwc3 @@0ref_clksuspend_clkbus_clkUhost ]busb2-phyusb3-phy lutmi_wide( uS|6okaysyscon@fd5b8000%rockchip,rk3588-pcie3-phy-grfsyscon [ syscon@fd5c0000$rockchip,rk3588-pipe-phy-grfsyscon \ syscon@fd5cc000$rockchip,rk3588-usbdpphy-grfsyscon \@ syscon@fd5d4000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd ]@@+usb2phy@4000rockchip,rk3588-usb2phy @0phyclk usb480m_phy1unophyapb6okayotg-port{6okayi2s@fddc8000rockchip,rk3588-i2s-tdm ܀0mclk_txmclk_rxhclk7qpvtx( uotx-m 6disabledi2s@fddf4000rockchip,rk3588-i2s-tdm @099?mclk_txmclk_rxhclk76qpvtx( uotx-m6okayi2s@fddf8000rockchip,rk3588-i2s-tdm ߀0++'mclk_txmclk_rxhclk7(qpvrx( uorx-m6okayi2s@fde00000rockchip,rk3588-i2s-tdm 0&&"mclk_txmclk_rxhclk7#qpvrx( uorx-m 6disabledpcie@fe150000*rockchip,rk3588-pcierockchip,rk3568-pcie+%00@E;JOt)aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr/@`Sar]t bpcie-phy( "T @ @0 @@dbiapbconfigu&+ opwrpipe6okaydefault vlegacy-interrupt-controller/ pcie-ep@fe150000rockchip,rk3588-pcie-epP @ @ @ @0dbidbi2apbaddr_spaceatu00@E;JOt)aclk_mstaclk_slvaclk_dbipclkauxpipe +syspmcmsglegacyerrdma0dma1dma2dma3r]t bpcie-phy( "u&+ opwrpipe 6disabledpcie@fe160000*rockchip,rk3588-pcierockchip,rk3568-pcie+%00AF<KPu)aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr/@`Sar]t bpcie-phy( "T @ @@0 @@@dbiapbconfigu', opwrpipe6okaydefault v legacy-interrupt-controller/ pcie@fe170000*rockchip,rk3588-pcierockchip,rk3568-pcie% /00BG=LQ)aclk_mstaclk_slvaclk_dbipclkauxpipepciPsyspmcmsglegacyerr/@`Sar s ]t bpcie-phy( "T @ @0 @@dbiapbconfigu(- opwrpipe+6okaydefault v legacy-interrupt-controller/ ethernet@fe1b0000&rockchip,rk3588-gmacsnps,dwmac-4.20a  macirqeth_wake_irq(067X]40stmmacethclk_mac_refpclk_macaclk_macptp_ref( !u# ostmmacethl.  6disabledmdiosnps,dwmac-mdio+stmmac-axi-config%/?rx-queues-configOqueue0queue1tx-queues-configequeue0queue1sata@fe220000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci "(0c`fUpsatapmaliverxoobrefasic{+ 6disabledsata-port@0 @] bsata-phy  phy@fed90000rockchip,rk3588-usbdp-phy {0mWrefclkimmortalpclkutmi(uoinitcmnlanepcs_apbpma_apb ~    6okayphy@fee10000rockchip,rk3588-naneng-combphy 0wW refapbpipe7G{u=Dophyapb .  6okayphy@fee80000rockchip,rk3588-pcie3-phy {0ypclkuHophy .  6okay topp-table-cluster0operating-points-v2  opp-1008000000 < L L~ @opp-1200000000 G 4 4~ @opp-1416000000 Tfr ~ @ opp-1608000000 _" P P~ @opp-1800000000 kI ~~~ @opp-table-cluster1operating-points-v2 opp-1200000000 G L LB@ @opp-1416000000 Tfr  B@ @opp-1608000000 _" B@ @opp-1800000000 kI P PB@ @opp-2016000000 x) HHB@ @opp-2208000000 h llB@ @opp-2400000000  B@B@B@ @opp-table-cluster2operating-points-v2 opp-1200000000 G L LB@ @opp-1416000000 Tfr  B@ @opp-1608000000 _" B@ @opp-1800000000 kI P PB@ @opp-2016000000 x) HHB@ @opp-2208000000 h llB@ @opp-2400000000  B@B@B@ @opp-tableoperating-points-v2!opp-300000000  L L Popp-400000000 ׄ L L Popp-500000000 e L L Popp-600000000 #F L L Popp-700000000 )' ` ` Popp-800000000 / q q Popp-900000000 5 5 5 Popp-1000000000 ; P P Pchosen serial2:1500000n8leds gpio-ledsled-0  heartbeat   heartbeatdefault led-1  indicator defaultregulator-vcc-4v0-sysregulator-fixed vcc_4v0_sys=  = M0regulator-vcc-3v3-pcie20regulator-fixedvcc_3v3_pcie202Z 2ZM{regulator-vcc-3v3-sd-s0regulator-fixed vdefault 2Z2Zvcc_3v3_sd_s0Mregulator-vcc-1v1-nldo-s3regulator-fixedvcc-1v1-nldo-s3 M0adc-key-recovery adc-keys # /buttons @w@ Zdbutton-recovery MRecovery hh sBhanalog-soundsimple-audio-carddefault i2s   realtek,rt5616-codecN HeadphonesHPOLHeadphonesHPORMIC1Microphone JackMicrophone Jackmicbias10HeadphoneHeadphonesMicrophoneMicrophone Jacksimple-audio-card,cpu)simple-audio-card,codec)pwm-beeper pwm-beeper3>H pwm-fanpwm-fanM2Px\HPgpio-keys gpio-keysdefaultbutton-userg2  MUser Button h )ir-receivergpio-ir-receiver regulator-vcc-12v-dcinregulator-fixed vcc_12v_dcin regulator-vcc-3v3-m2-aregulator-fixed vcc_3v3_m2_a2Z 2ZMregulator-vcc-3v3-m2-bregulator-fixed vcc_3v3_m2_b2Z 2ZMregulator-vcc-3v3-m2-cregulator-fixed vcc_3v3_m2_c2Z 2ZMregulator-vcc-3v3-m2-dregulator-fixed vcc_3v3_m2_d2Z 2ZMwregulator-vcc-5v0-sysregulator-fixed vcc_5v0_sysLK@ LK@Mregulator-vcc-5v0-host-20regulator-fixedy defaultvcc_5v0_host_20LK@ LK@M,regulator-vcc-5v0-host-30-p1regulator-fixedy vdefaultvcc_5v0_host_30_p1LK@ LK@Mregulator-vcc-5v0-host-30-p2regulator-fixedy defaultvcc_5v0_host_30_p2LK@ LK@M-regulator-vbus-5v0-typecregulator-fixedy defaultvbus_5v0_typecLK@ LK@M+ compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0mmc1cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namespower-domainsstatusmali-supplysram-supplydr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkusb-role-switchremote-endpointsnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesfcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesreset-gpiosvpcie3v3-supplyinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-sd-highspeeddisable-wpno-mmcno-sdiosd-uhs-sdr104vmmc-supplyvqmmc-supplymmc-hs400-1_8vmmc-hs400-enhanced-strobeno-sdnon-removablerockchip,trcm-sync-tx-onlymbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-csspi-max-frequencysystem-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplygpio-controller#gpio-cellspinsfunctionregulator-enable-ramp-delayregulator-suspend-microvoltregulator-on-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplywakeup-sourcevbus-supplydata-rolelabelpower-rolesource-pdostry-power-rolebitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grfmode-switchorientation-switchsbu1-dc-gpiossbu2-dc-gpiosrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesgpio-line-namesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfdata-lanesopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendstdout-pathcolorlinux,default-triggerio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallinux,codepress-threshold-microvoltsimple-audio-card,formatsimple-audio-card,hp-det-gpiosimple-audio-card,mclk-fssimple-audio-card,namesimple-audio-card,routingsimple-audio-card,widgetssound-daiamp-supplybeeper-hzpwmscooling-levelsfan-supplydebounce-intervalenable-active-high