8ָ( ր %,lunzn,fastrhino-r66srockchip,rk35687Lunzn FastRhino R66Saliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe2b0000cpus cpu@0cpu,arm,cortex-a55psci*7@IVc@u cpu@100cpu,arm,cortex-a55psci*7@IVc@u cpu@200cpu,arm,cortex-a55psci*7@IVc@u cpu@300cpu,arm,cortex-a55psci*7@IVc@u l3-cache,cache,9@Kopp-table-0,operating-points-v2opp-408000000Q  0@opp-600000000#F  0opp-8160000000,  0opp-1104000000Aʹ  0opp-1416000000Tfr  0opp-1608000000_" 0opp-1800000000kI 0opp-1992000000v 000display-subsystem,rockchip,display-subsystem disabledfirmwarescmi ,arm,scmi-smc  protocol@14opp-table-1,operating-points-v2Eopp-200000000   P PB@opp-300000000  P PB@opp-400000000ׄ  P PB@opp-600000000#F  B@opp-700000000)' ~~B@opp-800000000/ B@B@B@hdmi-sound,simple-audio-card(HDMI?i2sX disabledsimple-audio-card,codecrsimple-audio-card,cpur pmu,arm,cortex-a55-pmu0| psci ,arm,psci-1.0smctimer,arm,armv8-timer0|   xin24m ,fixed-clockn6xin24mxin32k ,fixed-clockxin32kdefaultsram@10f000 ,mmio-sram sram@0,arm,scmi-shmemsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob |_ sata-phy  disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob |` sata-phy  disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ |ref_clksuspend_clkbus_clk.host 6utmi_wide ?Fokay usb2-phyusb3-phy_usb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ |ref_clksuspend_clkbus_clk.host usb2-phyusb3-phy 6utmi_wide ?Fokayinterrupt-controller@fd400000 ,arm,gic-v3 @F | f{A(usb@fd800000 ,generic-ehci |usb disabledusb@fd840000 ,generic-ohci |usb disabledusb@fd880000 ,generic-ehci |usb disabledusb@fd8c0000 ,generic-ohci |usb disabledsyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdRio-domains&,rockchip,rk3568-pmu-io-voltage-domainokay syscon@fdc50000 ,rockchip,rk3568-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru.clock-controller@fdd20000,rockchip,rk3568-cruxin24m.; KG `wi2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c |.- i2cpclk default okayregulator@1c ,tcs,tcs4525vdd_cpu 50!regulator-state-mem&pmic@20,rockchip,rk809 "|default#?`$l$x$$$$$$$regulatorsDCDC_REG1 vdd_logic pqregulator-state-mem&DCDC_REG2vdd_gpu pqFregulator-state-mem&DCDC_REG3vcc_ddrregulator-state-memDCDC_REG4vdd_npu pqregulator-state-mem&DCDC_REG5vcc_1v8w@w@regulator-state-mem&LDO_REG1vdda0v9_image~~regulator-state-mem&LDO_REG2 vdda_0v9  regulator-state-mem&LDO_REG3 vdda0v9_pmu  regulator-state-mem LDO_REG4 vccio_acodec2Z2Zregulator-state-mem&LDO_REG5 vccio_sdw@2Zregulator-state-mem&LDO_REG6 vcc3v3_pmu2Z2Zregulator-state-mem 2ZLDO_REG7 vcca_1v8w@w@regulator-state-mem&LDO_REG8 vcca1v8_pmuw@w@regulator-state-mem w@LDO_REG9vcca1v8_image~w@regulator-state-mem& ~SWITCH_REG1vcc_3v3regulator-state-mem&SWITCH_REG2 vcc3v3_sdXregulator-state-mem&serial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart |t ,baudclkapb_pclk%%%&default*7 disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk'defaultA disabledpwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk(defaultA disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk)defaultA disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk*defaultA disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controllerL power-domain@7`+Lpower-domain@8 `,-.Lpower-domain@9  `/01Lpower-domain@10 `234567Lpower-domain@11 `8Lpower-domain@13 `9Lpower-domain@14 `:;<Lpower-domain@15 `=>?@ABCDLgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$|()' gjobmmugpugpubusE okaywFvideo-codec@fdea0400,rockchip,rk3568-vpu |gvdpu aclkhclkG  iommu@fdea0800,rockchip,rk3568-iommu@ | aclkiface  Grga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga |Zaclkhclksclk?&$% coreaxiahb  video-codec@fdee0000,rockchip,rk3568-vepu |@ aclkhclkH  iommu@fdee0800,rockchip,rk3568-iommu@ |? aclkiface  Hmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ |d biuciuciu-driveciu-sampleр?reset disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a| gmacirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref? stmmacethwIJK disabledmdio,snps,dwmac-mdio stmmac-axi-config &Irx-queues-config6Jqueue0tx-queues-configLKqueue0vop@fe040000 0@bvopgamma-lut |(%aclkhclkdclk_vp0dclk_vp1dclk_vp2L  wokay,rockchip,rk3568-vop;`ports port@0 port@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >? | aclkiface  okayLdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi |DpclkdphyM  apb?w disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi |EpclkdphyN  apb?w disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  |-((iahbisfrcecrefdefault OPQ  *wl disabledports port@0port@1qos@fe128000,rockchip,rk3568-qossyscon +qos@fe138080,rockchip,rk3568-qossyscon :qos@fe138100,rockchip,rk3568-qossyscon ;qos@fe138180,rockchip,rk3568-qossyscon <qos@fe148000,rockchip,rk3568-qossyscon ,qos@fe148080,rockchip,rk3568-qossyscon -qos@fe148100,rockchip,rk3568-qossyscon .qos@fe150000,rockchip,rk3568-qossyscon 8qos@fe158000,rockchip,rk3568-qossyscon 2qos@fe158100,rockchip,rk3568-qossyscon 3qos@fe158180,rockchip,rk3568-qossyscon 4qos@fe158200,rockchip,rk3568-qossyscon 5qos@fe158280,rockchip,rk3568-qossyscon 6qos@fe158300,rockchip,rk3568-qossyscon 7qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon =qos@fe190280,rockchip,rk3568-qossyscon Aqos@fe190300,rockchip,rk3568-qossyscon Bqos@fe190380,rockchip,rk3568-qossyscon Cqos@fe190400,rockchip,rk3568-qossyscon Dqos@fe198000,rockchip,rk3568-qossyscon 9qos@fe1a8000,rockchip,rk3568-qossyscon /qos@fe1a8080,rockchip,rk3568-qossyscon 0qos@fe1a8100,rockchip,rk3568-qossyscon 1dfi@fe230000,rockchip,rk3568-dfi# | }Rpcie@fe260000,rockchip,rk3568-pcie0@&bdbiapbconfig<|KJIHGgsyspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpci{`SSSS pcie-phy T @@?pipe  disabledlegacy-interrupt-controller{f |HSmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ |b biuciuciu-driveciu-sampleр?resetokay!2=ELdefaultTUVWYXemmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ |c biuciuciu-driveciu-sampleр?reset disabledspi@fe300000 ,rockchip,sfc0@ |exvclk_sfchclk_sfcYdefault disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 |;{}K n6(|zy{}corebusaxiblocktimer disabledrng@fe388000,rockchip,rk3568-rng8@po coreahb?mokayi2s@fe400000,rockchip,rk3568-i2s-tdm@ |4;=AKFqFq?C9mclk_txmclk_rxhclk%Zrtx?PQ tx-mrx-mwl disabled i2s@fe410000,rockchip,rk3568-i2s-tdmA |5;EIKFqFqGK:mclk_txmclk_rxhclk%ZZrrxtx?RS tx-mrx-mwdefault0[\]^_`abcdefl disabledi2s@fe420000,rockchip,rk3568-i2s-tdmB |6;MKFqOO;mclk_txmclk_rxhclk%ZZrtxrx?Ttx-mwdefaultghijl disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC |7SW<mclk_txmclk_rxhclk%ZZrtxrx?UV tx-mrx-mwl disabledpdm@fe440000,rockchip,rk3568-pdmD |LZYpdm_clkpdm_hclk%Z rrxklmnopdefault?Xpdm-ml disabledspdif@fe460000,rockchip,rk3568-spdifF |f mclkhclk_\%Zrtxdefaultql disableddma-controller@fe530000,arm,pl330arm,primecellS@| |  apb_pclk%dma-controller@fe550000,arm,pl330arm,primecellU@||  apb_pclkZi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ |/HG i2cpclkrdefault  disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ |0JI i2cpclksdefault  disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ |1LK i2cpclktdefault  disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] |2NM i2cpclkudefault  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ |3PO i2cpclkvdefault  disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt` | tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia |gRQspiclkapb_pclk%%%rtxrxdefault wxy  disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib |hTSspiclkapb_pclk%%%rtxrxdefault z{|  disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic |iVUspiclkapb_pclk%%%rtxrxdefault }~  disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid |jXWspiclkapb_pclk%%%rtxrxdefault   disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte |ubaudclkapb_pclk%%%default*7 disabledserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf |v# baudclkapb_pclk%%%default*7okayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg |w'$baudclkapb_pclk%%%default*7 disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth |x+(baudclkapb_pclk%%% default*7 disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti |y/,baudclkapb_pclk%% % default*7 disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj |z30baudclkapb_pclk%% % default*7 disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk |{74baudclkapb_pclk%%%default*7 disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl ||;8baudclkapb_pclk%%%default*7 disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm |}?<baudclkapb_pclk%%%default*7 disabledthermal-zonescpu-thermaldtripscpu_alert0ppassivecpu_alert1$passivecpu_crits criticalcooling-mapsmap00 gpu-thermaltripsgpu-thresholdppassivegpu-target$passivegpu-crits criticalcooling-mapsmap0 tsadc@fe710000,rockchip,rk3568-tsadcq |s;Kf@ `tsadcapb_pclk?wsdefaultsleep  okay 4 Ksaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr |]saradcapb_pclk? saradc-apb fokay xpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefaultA disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefaultA disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefaultA disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefaultA disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefaultA disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefaultA disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefaultA disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefaultA disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefaultA disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefaultA disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefaultA disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefaultA disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipe;"K?   okayphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipe;%K?    disabledphy@fe870000,rockchip,rk3568-csi-dphyypclk ?apbw disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz   apb? disabledMmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{   apb? disabledNusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m | okayhost-port okay !otg-port okay usb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m |  disabledhost-port  disabledotg-port  disabledpinctrl,rockchip,rk3568-pinctrlw}R gpio@fdd60000,rockchip,gpio-bank |!.    f{"gpio@fe740000,rockchip,gpio-bankt |"cd   f{gpio@fe750000,rockchip,gpio-banku |#ef  @  f{gpio@fe760000,rockchip,gpio-bankv |$gh  `  f{gpio@fe770000,rockchip,gpio-bankw |%ij   f{pcfg-pull-up pcfg-pull-none pcfg-pull-none-drv-level-1  pcfg-pull-none-drv-level-2  pcfg-pull-none-drv-level-3  pcfg-pull-up-drv-level-1  pcfg-pull-up-drv-level-2  pcfg-pull-none-smt  #acodecaudiopwmbt656bt1120camcan0can0m0-pins 8  can1can1m0-pins 8can2can2m0-pins 8  cifclk32kclk32k-out0 8cpuebcedpdpemmceth0eth1flashfspifspi-pins` 8Ygmac0gmac1gpuhdmitxhdmitxm0-cec 8Qhdmitx-scl 8Ohdmitx-sda 8Pi2c0i2c0-xfer 8   i2c1i2c1-xfer 8  ri2c2i2c2m0-xfer 8 si2c3i2c3m0-xfer 8ti2c4i2c4m0-xfer 8  ui2c5i2c5m0-xfer 8  vi2s1i2s1m0-lrckrx 8^i2s1m0-lrcktx 8]i2s1m0-sclkrx 8\i2s1m0-sclktx 8[i2s1m0-sdi0 8 _i2s1m0-sdi1 8 `i2s1m0-sdi2 8 ai2s1m0-sdi3 8bi2s1m0-sdo0 8ci2s1m0-sdo1 8di2s1m0-sdo2 8 ei2s1m0-sdo3 8 fi2s2i2s2m0-lrcktx 8hi2s2m0-sclktx 8gi2s2m0-sdi 8ii2s2m0-sdo 8ji2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk 8kpdmm0-clk1 8lpdmm0-sdi0 8 mpdmm0-sdi1 8 npdmm0-sdi2 8 opdmm0-sdi3 8ppmicpmic-int 8#pmupwm0pwm0m0-pins 8'pwm1pwm1m0-pins 8(pwm2pwm2m0-pins 8)pwm3pwm3-pins 8*pwm4pwm4-pins 8pwm5pwm5-pins 8pwm6pwm6-pins 8pwm7pwm7-pins 8pwm8pwm8m0-pins 8 pwm9pwm9m0-pins 8 pwm10pwm10m0-pins 8 pwm11pwm11m0-pins 8pwm12pwm12m0-pins 8pwm13pwm13m0-pins 8pwm14pwm14m0-pins 8pwm15pwm15m0-pins 8refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ 8Tsdmmc0-clk 8Usdmmc0-cmd 8Vsdmmc0-det 8Wsdmmc1sdmmc2spdifspdifm0-tx 8qspi0spi0m0-pins0 8 yspi0m0-cs0 8wspi0m0-cs1 8xspi1spi1m0-pins0 8 |spi1m0-cs0 8zspi1m0-cs1 8{spi2spi2m0-pins0 8spi2m0-cs0 8}spi2m0-cs1 8~spi3spi3m0-pins0 8  spi3m0-cs0 8spi3m0-cs1 8tsadctsadc-shutorg 8tsadc-pin 8uart0uart0-xfer 8&uart1uart1m0-xfer 8  uart2uart2m0-xfer 8uart3uart3m0-xfer 8uart4uart4m0-xfer 8uart5uart5m0-xfer 8uart6uart6m0-xfer 8uart7uart7m0-xfer 8uart8uart8m0-xfer 8uart9uart9m0-xfer 8vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2gpio-ledsstatus-led-pin 8rockchip-keyreset-button-pin 8usbvcc5v0-usb-otg-en 8sata@fc000000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob |^ sata-phy  disabledsyscon@fdc70000$,rockchip,rk3568-pipe-phy-grfsysconqos@fe190080,rockchip,rk3568-qossyscon >qos@fe190100,rockchip,rk3568-qossyscon ?qos@fe190200,rockchip,rk3568-qossyscon @syscon@fdcb8000%,rockchip,rk3568-pcie3-phy-grfsysconˀphy@fe8c0000,rockchip,rk3568-pcie3-phy &'wrefclk_mrefclk_npclk?phy Fokay Wpcie@fe270000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<|gsyspmcmsglegacyerr{` pcie-phy 0@@'T @@@bdbiapbconfig?pipeokay b" nlegacy-interrupt-controllerf{ |pcie@fe280000,rockchip,rk3568-pcie ($aclk_mstaclk_slvaclk_dbipclkauxpci<|gsyspmcmsglegacyerr{`  pcie-phy 0@(T @@bdbiapbconfig?pipeokay b" nlegacy-interrupt-controllerf{ |ethernet@fe2a0000&,rockchip,rk3568-gmacsnps,dwmac-4.20a*|gmacirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_ref? stmmacethw disabledmdio,snps,dwmac-mdio stmmac-axi-config &rx-queues-config6queue0tx-queues-configLqueue0can@fe570000,rockchip,rk3568v2-canfdW |A@ baudpclk?UT coreapbdefault disabledcan@fe580000,rockchip,rk3568v2-canfdX |CB baudpclk?WV coreapbdefault disabledcan@fe590000,rockchip,rk3568v2-canfdY |ED baudpclk?YX coreapbdefault disabledphy@fe820000,rockchip,rk3568-naneng-combphy| refapbpipe;K?   okaychosen ~serial2:1500000n8gpio-keys ,gpio-keysdefaultbutton-reset 2 h" reset gpio-leds ,gpio-ledsdefaultled-status  status h" heartbeatvcc12v-dcin-regulator,regulator-fixed vcc12v_dcinvcc3v3-pcie-regulator,regulator-fixed vcc3v3_pcie2Z2Z!vcc3v3-sys-regulator,regulator-fixed vcc3v3_sys2Z2Z$vcc5v0-sys-regulator,regulator-fixed vcc5v0_sysLK@LK@!vcc5v0-usb-otg-regulator,regulator-fixed  "defaultvcc5v0_usb_otgLK@LK@! interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc0device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsstatusarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fssound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio2-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supplyvccio3-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grffcs,suspend-voltage-selectorregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayvin-supplyregulator-off-in-suspendrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplywakeup-sourceregulator-initial-moderegulator-on-in-suspendregulator-suspend-microvoltdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-names#sound-dai-cellsrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpno-sdiono-mmcsd-uhs-sdr50vmmc-supplyvqmmc-supplydma-namesarm,pl330-periph-burst#dma-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsrockchip,phy-grfdata-lanesreset-gpiosvpcie3v3-supplystdout-pathdebounce-intervallabellinux,codecolorfunctionlinux,default-triggerenable-active-highgpio