08!(*!!indiedroid,novarockchip,rk3588s +7Indiedroid Novaaliases=/pinctrl/gpio@fd8a0000C/pinctrl/gpio@fec20000I/pinctrl/gpio@fec30000O/pinctrl/gpio@fec40000U/pinctrl/gpio@fec50000[/i2c@fd880000`/i2c@fea90000e/i2c@feaa0000j/i2c@feab0000o/i2c@feac0000t/i2c@fead0000y/i2c@fec80000~/i2c@fec90000/i2c@feca0000/serial@fd890000/serial@feb40000/serial@feb50000/serial@feb60000/serial@feb70000/serial@feb80000/serial@feb90000/serial@feba0000/serial@febb0000/serial@febc0000/spi@feb00000/spi@feb10000/spi@feb20000/spi@feb30000/spi@fecb0000/mmc@fe2e0000/mmc@fe2c0000/mmc@fe2d0000cpus+cpu-mapcluster0core0core1core2core3cluster1core0core1cluster2core0core1 cpu@0cpuarm,cortex-a55psci"5 < L0,a q~@@  "cpu@100cpuarm,cortex-a55psci"5 a q~@@ "cpu@200cpuarm,cortex-a55psci"5 a q~@@ "cpu@300cpuarm,cortex-a55psci"5 a q~@@ "cpu@400cpuarm,cortex-a76psci"5 < L0,a q~@@"cpu@500cpuarm,cortex-a76psci"5 a q~@@"cpu@600cpuarm,cortex-a76psci"5 < L0,a q~@@"cpu@700cpuarm,cortex-a76psci"5 a q~@@" idle-states*pscicpu-sleeparm,idle-state7H_dpx" l2-cache-l0caches@" l2-cache-l1caches@"l2-cache-l2caches@"l2-cache-l3caches@"l2-cache-b0caches@"l2-cache-b1caches@"l2-cache-b2caches@"l2-cache-b3caches@"l3-cachecaches0@"display-subsystemrockchip,display-subsystemfirmwareopteelinaro,optee-tzsmcscmi arm,scmi-smc+protocol@14" protocol@16pmu-a55arm,cortex-a55-pmupmu-a76arm,cortex-a76-pmupsci arm,psci-1.0smcclock-0 fixed-clock)׫splltimerarm,armv8-timerP    % sec-physphysvirthyp-physhyp-virtclock-1 fixed-clockn6xin24mclock-2 fixed-clockxin32ksram@10f000 mmio-sram+sram@0arm,scmi-shmem"gpu@fb000000*rockchip,rk3588-maliarm,mali-valhall-csf < L 5!corecoregroupstacks 0\]^  jobmmugpu-  ;disabled!"usb@fc000000rockchip,rk3588-dwc3snps,dwc3@5!ref_clksuspend_clkbus_clkBotg J"#Ousb2-phyusb3-phy Yutmi_wide- bRi;okayportendpoint%$"usb@fc800000"rockchip,rk3588-ehcigeneric-ehci5%J&Ousb- ;okayusb@fc840000"rockchip,rk3588-ohcigeneric-ohci5%J&Ousb- ;okayusb@fc880000"rockchip,rk3588-ehcigeneric-ehci5'J(Ousb- ;okayusb@fc8c0000"rockchip,rk3588-ohcigeneric-ohci5'J(Ousb- ;okayusb@fcd00000rockchip,rk3588-dwc3snps,dwc3@(5jihkr&!ref_clksuspend_clkbus_clkutmipipeBhostJ) Ousb3-phy Yutmi_wideb4i5;okayiommu@fc900000 arm,smmu-v3 @qsvo eventqgerrorpriqcmdq-syncO ;disablediommu@fcb00000 arm,smmu-v3 @}{ eventqgerrorpriqcmdq-syncO ;disabledsyscon@fd58a000)rockchip,rk3588-pmugrfsysconsimple-mfdX"nsyscon@fd58c000rockchip,rk3588-sys-grfsysconX"isyscon@fd5a4000rockchip,rk3588-vop-grfsysconZ@ "jsyscon@fd5a6000rockchip,rk3588-vo0-grfsysconZ` 5"syscon@fd5a8000rockchip,rk3588-vo1-grfsysconZ@5"ksyscon@fd5ac000rockchip,rk3588-usb-grfsysconZ@"syscon@fd5b0000rockchip,rk3588-php-grfsyscon["+syscon@fd5bc000$rockchip,rk3588-pipe-phy-grfsyscon["syscon@fd5c4000$rockchip,rk3588-pipe-phy-grfsyscon\@"syscon@fd5c8000$rockchip,rk3588-usbdpphy-grfsyscon\@"syscon@fd5d0000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+"usb2phy@0rockchip,rk3588-usb2phy5!phyclk usb480m_phy0bm\phyapb;okay"otg-porth;okay""syscon@fd5d8000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@8000rockchip,rk3588-usb2phy5!phyclk usb480m_phy2bo\phyapb;okay"%host-porth;okays*"&syscon@fd5dc000.rockchip,rk3588-usb2phy-grfsysconsimple-mfd]@+usb2phy@c000rockchip,rk3588-usb2phy5!phyclk usb480m_phy3bp \phyapb;okay"'host-porth;okays*"(syscon@fd5e0000$rockchip,rk3588-hdptxphy-grfsyscon^"syscon@fd5f0000rockchip,rk3588-iocsyscon_"sram@fd600000 mmio-sram``+clock-controller@fd7c0000rockchip,rk3588-cru|<]q@LA.2Fq)׫ׄe/ׄ eZ р ~+"i2c@fd880000(rockchip,rk3588-i2crockchip,rk3399-i2c=5ts !i2cpclk,default+;okayregulator@42rockchip,rk8602Bdpvdd_cpu_big0_s0:-"regulator-state-memEregulator@43 rockchip,rk8603rockchip,rk8602Cdpvdd_cpu_big1_s0:-"regulator-state-memEserial@fd890000&rockchip,rk3588-uartsnps,dw-apb-uartK5!baudclkapb_pclk^..ctxrx/defaultmw ;disabledpwm@fd8b0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5 !pwmpclk0default ;disabledpwm@fd8b0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5 !pwmpclk1default ;disabledpwm@fd8b0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5 !pwmpclk2default ;disabledpwm@fd8b0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05 !pwmpclk3default ;disabledpower-management@fd8d8000&rockchip,rk3588-pmusysconsimple-mfd"lpower-controller!rockchip,rk3588-power-controller+;okay" power-domain@8+power-domain@9  5!#" 456+power-domain@10 5!#"7power-domain@11 5!#"8power-domain@12 59:;<power-domain@13 +power-domain@14(5=power-domain@15 5>power-domain@165 ?@A+power-domain@17 5 BCDpower-domain@215 EFGHIJKL+power-domain@235CAMpower-domain@14 5=power-domain@155>power-domain@225Npower-domain@245[Z]OP+power-domain@2585ZQpower-domain@2685QRSpower-domain@2705TUVW+power-domain@28 5XYpower-domain@29(5Z[power-domain@305z{\power-domain@31@5W]^_`power-domain@33!5WZ[power-domain@34"5WZ[power-domain@37%52apower-domain@38&545power-domain@40(bvideo-codec@fdb50000+rockchip,rk3588-vpu121rockchip,rk3568-vpuw vdpu5 !aclkhclkc- iommu@fdb50800,rockchip,rk3588-iommurockchip,rk3568-iommu@v !aclkiface5- O"crga@fdb80000(rockchip,rk3588-rgarockchip,rk3288-rgat5!aclkhclksclkbrqp \coreaxiahb- video-codec@fdba0000rockchip,rk3588-vepu121z5 !aclkhclkd- iommu@fdba0800,rockchip,rk3588-iommurockchip,rk3568-iommu@y5 !aclkiface- O"dvideo-codec@fdba4000rockchip,rk3588-vepu121@|5 !aclkhclke- iommu@fdba4800,rockchip,rk3588-iommurockchip,rk3568-iommuH@{5 !aclkiface- O"evideo-codec@fdba8000rockchip,rk3588-vepu121~5 !aclkhclkf- iommu@fdba8800,rockchip,rk3588-iommurockchip,rk3568-iommu@}5 !aclkiface- O"fvideo-codec@fdbac000rockchip,rk3588-vepu1215 !aclkhclkg- iommu@fdbac800,rockchip,rk3588-iommurockchip,rk3568-iommu@5 !aclkiface- O"gvideo-codec@fdc70000rockchip,rk3588-av1-vpul vdpu<ACLׄׄ5AC !aclkhclk-  bvop@fdd90000rockchip,rk3588-vop BPvopgamma-lut85]\abcd[7!aclkhclkdclk_vp0dclk_vp1dclk_vp2dclk_vp3pclk_voph- ~ijkl ;disabledports+"port@0+port@1+port@2+port@3+iommu@fdd97e00,rockchip,rk3588-iommurockchip,rk3568-iommu ~5]\ !aclkifaceO-  ;disabled"hi2s@fddc0000rockchip,rk3588-i2s-tdm5!mclk_txmclk_rxhclk<^mctx- b\tx-m ;disabledi2s@fddf0000rockchip,rk3588-i2s-tdm5445!mclk_txmclk_rxhclk<1^mctx- b\tx-m ;disabledi2s@fddfc000rockchip,rk3588-i2s-tdm500,!mclk_txmclk_rxhclk<-^mcrx- b\rx-m ;disabledqos@fdf35000rockchip,rk3588-qossysconP "9qos@fdf35200rockchip,rk3588-qossysconR ":qos@fdf35400rockchip,rk3588-qossysconT ";qos@fdf35600rockchip,rk3588-qossysconV "<qos@fdf36000rockchip,rk3588-qossyscon` "\qos@fdf39000rockchip,rk3588-qossyscon "aqos@fdf3d800rockchip,rk3588-qossyscon "bqos@fdf3e000rockchip,rk3588-qossyscon "^qos@fdf3e200rockchip,rk3588-qossyscon "]qos@fdf3e400rockchip,rk3588-qossyscon "_qos@fdf3e600rockchip,rk3588-qossyscon "`qos@fdf40000rockchip,rk3588-qossyscon "Zqos@fdf40200rockchip,rk3588-qossyscon "[qos@fdf40400rockchip,rk3588-qossyscon "Tqos@fdf40500rockchip,rk3588-qossyscon "Uqos@fdf40600rockchip,rk3588-qossyscon "Vqos@fdf40800rockchip,rk3588-qossyscon "Wqos@fdf41000rockchip,rk3588-qossyscon "Xqos@fdf41100rockchip,rk3588-qossyscon "Yqos@fdf60000rockchip,rk3588-qossyscon "?qos@fdf60200rockchip,rk3588-qossyscon "@qos@fdf60400rockchip,rk3588-qossyscon "Aqos@fdf61000rockchip,rk3588-qossyscon "Bqos@fdf61200rockchip,rk3588-qossyscon "Cqos@fdf61400rockchip,rk3588-qossyscon "Dqos@fdf62000rockchip,rk3588-qossyscon "=qos@fdf63000rockchip,rk3588-qossyscon0 ">qos@fdf64000rockchip,rk3588-qossyscon@ "Mqos@fdf66000rockchip,rk3588-qossyscon` "Eqos@fdf66200rockchip,rk3588-qossysconb "Fqos@fdf66400rockchip,rk3588-qossyscond "Gqos@fdf66600rockchip,rk3588-qossysconf "Hqos@fdf66800rockchip,rk3588-qossysconh "Iqos@fdf66a00rockchip,rk3588-qossysconj "Jqos@fdf66c00rockchip,rk3588-qossysconl "Kqos@fdf66e00rockchip,rk3588-qossysconn "Lqos@fdf67000rockchip,rk3588-qossysconp "Nqos@fdf67200rockchip,rk3588-qossysconr qos@fdf70000rockchip,rk3588-qossyscon "7qos@fdf71000rockchip,rk3588-qossyscon "8qos@fdf72000rockchip,rk3588-qossyscon "4qos@fdf72200rockchip,rk3588-qossyscon" "5qos@fdf72400rockchip,rk3588-qossyscon$ "6qos@fdf80000rockchip,rk3588-qossyscon "Qqos@fdf81000rockchip,rk3588-qossyscon "Rqos@fdf81200rockchip,rk3588-qossyscon "Sqos@fdf82000rockchip,rk3588-qossyscon "Oqos@fdf82200rockchip,rk3588-qossyscon" "Pdfi@fe060000rockchip,rk3588-dfi@&0:npcie@fe180000*rockchip,rk3588-pcierockchip,rk3568-pcie0?05CH>MR)!aclk_mstaclk_slvaclk_dbipclkauxpipepciP syspmcmsglegacyerr-`@ooooN_n0p0vJ) Opcie-phy- "T @ @0 @@dbiapbconfigb). \pwrpipe+ ;disabledlegacy-interrupt-controller "opcie@fe190000*rockchip,rk3588-pcierockchip,rk3568-pcie@O05DI?NSs)!aclk_mstaclk_slvaclk_dbipclkauxpipepciP syspmcmsglegacyerr-`@qqqqN_n@p@vJr Opcie-phy- "T @ @0 A@dbiapbconfigb*/ \pwrpipe+;okaysdefaultlegacy-interrupt-controller "qethernet@fe1c0000&rockchip,rk3588-gmacsnps,dwmac-4.20a  macirqeth_wake_irq(567Y^50!stmmacethclk_mac_refpclk_macaclk_macptp_ref- !b$ \stmmaceth~i+tuv ;disabledmdiosnps,dwmac-mdio+stmmac-axi-config"trx-queues-config "uqueue0queue1tx-queues-config6"vqueue0queue1sata@fe210000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci!(5b_eTo!satapmaliverxoobrefasicL+ ;disabledsata-port@0^@Jr Osata-phyk z sata@fe230000'rockchip,rk3588-dwc-ahcisnps,dwc-ahci#(5dagVq!satapmaliverxoobrefasicL+ ;disabledsata-port@0^@J) Osata-phyk z spi@fe2b0000 rockchip,sfc+@5/0!clk_sfchclk_sfc+ ;disabledmmc@fe2c00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc,@ 5  !biuciuciu-driveciu-sample defaultwxyz- (;okay{|mmc@fe2d00000rockchip,rk3588-dw-mshcrockchip,rk3288-dw-mshc-@ 5!biuciuciu-driveciu-sampledefault}- %;okay3~>D{mmc@fe2e0000rockchip,rk3588-dwcmshc.<-., L n6 (5,*+-.!corebusaxiblocktimer default(b\corebusaxiblocktimer;okayR>Di2s@fe470000rockchip,rk3588-i2s-tdmG5+/(!mclk_txmclk_rxhclk<)-^..ctxrx- &b*+ \tx-mrx-m_default;okayport"endpointzi2s%"i2s@fe480000rockchip,rk3588-i2s-tdmH5y}u!mclk_txmclk_rxhclk^..ctxrxb^_ \tx-mrx-m_default( ;disabledi2s@fe490000(rockchip,rk3588-i2srockchip,rk3066-i2sI5!i2s_clki2s_hclk<^ctxrx- &default ;disabledi2s@fe4a0000(rockchip,rk3588-i2srockchip,rk3066-i2sJ5%!i2s_clki2s_hclk<"^ctxrx- &default ;disabledinterrupt-controller@fe600000 arm,gic-v3 `h a8+"msi-controller@fe640000arm,gic-v3-itsd"pmsi-controller@fe660000arm,gic-v3-itsfppi-partitionsinterrupt-partition-0"interrupt-partition-1 "dma-controller@fea10000arm,pl330arm,primecell@ VW5n !apb_pclk".dma-controller@fea30000arm,pl330arm,primecell@ XY5o !apb_pclk"i2c@fea90000(rockchip,rk3588-i2crockchip,rk3399-i2c5{ !i2cpclk>default+ ;disabledi2c@feaa0000(rockchip,rk3588-i2crockchip,rk3399-i2c5| !i2cpclk?default+;okayregulator@42rockchip,rk8602B~dp vdd_npu_s0:-regulator-state-memEi2c@feab0000(rockchip,rk3588-i2crockchip,rk3399-i2c5} !i2cpclk@default+ ;disabledi2c@feac0000(rockchip,rk3588-i2crockchip,rk3399-i2c5~ !i2cpclkAdefault+ ;disabledi2c@fead0000(rockchip,rk3588-i2crockchip,rk3399-i2c5 !i2cpclkBdefault+ ;disabledtimer@feae0000,rockchip,rk3588-timerrockchip,rk3288-timer !5TW !pclktimerwatchdog@feaf0000 rockchip,rk3588-wdtsnps,dw-wdt5dc !tclkpclk;spi@feb00000(rockchip,rk3588-spirockchip,rk3066-spiF5!spiclkapb_pclk^..ctxrx default+ ;disabledspi@feb10000(rockchip,rk3588-spirockchip,rk3066-spiG5!spiclkapb_pclk^..ctxrx default+ ;disabledspi@feb20000(rockchip,rk3588-spirockchip,rk3066-spiH5!spiclkapb_pclk^ctxrxdefault+;okay<L pmic@0rockchip,rk806 default B@ - (- 4- @- L- X- d- p- |- -  -   -dvs1-null-pins gpio_pwrctrl1 pin_fun0"dvs2-null-pins gpio_pwrctrl2 pin_fun0"dvs3-null-pins gpio_pwrctrl3 pin_fun0"regulatorsdcdc-reg1 ~dp vdd_gpu_s00regulator-state-memEdcdc-reg2~dp0vdd_cpu_lit_s0"regulator-state-memEdcdc-reg3 q L vdd_logic_s00regulator-state-mem   qdcdc-reg4~dp vdd_vdenc_s00regulator-state-memEdcdc-reg5 q P0 vdd_ddr_s0regulator-state-memE  Pdcdc-reg6 vdd2_ddr_s3regulator-state-mem dcdc-reg7vdd_2v0_pldo_s3"regulator-state-mem  dcdc-reg82Z2Z vcc_3v3_s3"{regulator-state-mem  2Zdcdc-reg9 ' ' vddq_ddr_s0regulator-state-memEdcdc-reg10w@w@ vcc_1v8_s3"regulator-state-mem  w@pldo-reg1w@w@ vcc_1v8_s0regulator-state-memEpldo-reg2w@w@ vcca_1v8_s0"regulator-state-memE w@pldo-reg3OO vdda_1v2_s0regulator-state-memEpldo-reg42Z2Z vcca_3v3_s0regulator-state-memEpldo-reg52Zw@ vccio_sd_s0"|regulator-state-memEpldo-reg6w@w@vcc_1v8_s3_pldo6regulator-state-mem  w@nldo-reg1 q q vdd_0v75_s3regulator-state-mem   qnldo-reg2 P Pvdda_ddr_pll_s0regulator-state-memE  Pnldo-reg3 q q avdd_0v75_s0regulator-state-memEnldo-reg4 P P vdda_0v85_s0regulator-state-memEnldo-reg5spi@feb30000(rockchip,rk3588-spirockchip,rk3066-spiI5!spiclkapb_pclk^ctxrx default+ ;disabledserial@feb40000&rockchip,rk3588-uartsnps,dw-apb-uartL5!baudclkapb_pclk^.. ctxrxdefaultwm ;disabledserial@feb50000&rockchip,rk3588-uartsnps,dw-apb-uartM5!baudclkapb_pclk^. . ctxrxdefaultwm;okayserial@feb60000&rockchip,rk3588-uartsnps,dw-apb-uartN5!baudclkapb_pclk^. . ctxrxdefaultwm ;disabledserial@feb70000&rockchip,rk3588-uartsnps,dw-apb-uartO5!baudclkapb_pclk^ ctxrxdefaultwm ;disabledserial@feb80000&rockchip,rk3588-uartsnps,dw-apb-uartP5!baudclkapb_pclk^ ctxrxdefaultwm ;disabledserial@feb90000&rockchip,rk3588-uartsnps,dw-apb-uartQ5!baudclkapb_pclk^ ctxrxdefaultwm ;disabledserial@feba0000&rockchip,rk3588-uartsnps,dw-apb-uartR5!baudclkapb_pclk^mmctxrxdefaultwm ;disabledserial@febb0000&rockchip,rk3588-uartsnps,dw-apb-uartS5!baudclkapb_pclk^m m ctxrxdefaultwm ;disabledserial@febc0000&rockchip,rk3588-uartsnps,dw-apb-uartT5!baudclkapb_pclk defaultwm;okay 3bluetooth*realtek,rtl8821cs-btrealtek,rtl8723bs-bt C U b defaultpwm@febd0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5LK !pwmpclkdefault ;disabledpwm@febd0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5LK !pwmpclkdefault ;disabledpwm@febd0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5LK !pwmpclkdefault ;disabledpwm@febd0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05LK !pwmpclkdefault ;disabledpwm@febe0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5ON !pwmpclkdefault ;disabledpwm@febe0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5ON !pwmpclkdefault ;disabledpwm@febe0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5ON !pwmpclkdefault ;disabledpwm@febe0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05ON !pwmpclkdefault ;disabledpwm@febf0000(rockchip,rk3588-pwmrockchip,rk3328-pwm5RQ !pwmpclkdefault ;disabledpwm@febf0010(rockchip,rk3588-pwmrockchip,rk3328-pwm5RQ !pwmpclkdefault ;disabledpwm@febf0020(rockchip,rk3588-pwmrockchip,rk3328-pwm 5RQ !pwmpclkdefault ;disabledpwm@febf0030(rockchip,rk3588-pwmrockchip,rk3328-pwm05RQ !pwmpclkdefault ;disabledthermal-zonespackage-thermal r  tripspackage-crit 8   criticalbigcore0-thermal rd  tripsbigcore0-alert L  passive"bigcore0-crit 8   criticalcooling-mapsmap0  bigcore2-thermal rd  tripsbigcore2-alert L  passive"bigcore2-crit 8   criticalcooling-mapsmap0   littlecore-thermal rd  tripslittlecore-alert L  passive"littlecore-crit 8   criticalcooling-mapsmap0 0 center-thermal r  tripscenter-crit 8   criticalgpu-thermal rd  tripsgpu-alert L  passive"gpu-crit 8   criticalcooling-mapsmap0  npu-thermal r  tripsnpu-crit 8   criticaltsadc@fec00000rockchip,rk3588-tsadc5!tsadcapb_pclk<LbVW\tsadc-apbtsadc     gpiootpout $;okay"adc@fec10000rockchip,rk3588-saradc :5!saradcapb_pclkbU \saradc-apb;okay L"i2c@fec80000(rockchip,rk3588-i2crockchip,rk3399-i2c5 !i2cpclkCdefault+;okaytypec-portc@22 fcs,fusb302" default Xconnectorusb-c-connector ddual nUSB-C tdual sink , d B@ports+port@0endpoint%"port@1endpoint%"$port@2endpoint%"rtc@51haoyu,hym8563Qhym8563 default "i2c@fec90000(rockchip,rk3588-i2crockchip,rk3399-i2c5 !i2cpclkDdefault+;okayaudio-codec@11everest,es8388L<1 {51  { portendpoint%"i2c@feca0000(rockchip,rk3588-i2crockchip,rk3399-i2c5 !i2cpclkEdefault+ ;disabledspi@fecb0000(rockchip,rk3588-spirockchip,rk3066-spiJ5!spiclkapb_pclk^m mctxrx default+ ;disabledefuse@fecc0000rockchip,rk3588-otp 5!otpapb_pclkphyarbb \otpapbarb+cpu-code@2id@7cpu-leakage@17cpu-leakage@18cpu-leakage@19log-leakage@1agpu-leakage@1bcpu-version@1c npu-leakage@28(codec-leakage@29)dma-controller@fed10000arm,pl330arm,primecell@ Z[5p !apb_pclk"mphy@fed60000rockchip,rk3588-hdptx-phy 5T!refapbh8b#cde!""\phyapbinitcmnlaneroplllcpll~ ;disabledphy@fed80000rockchip,rk3588-usbdp-phyh5lV!refclkimmortalpclkutmi(b   \initcmnlanepcs_apbpma_apb    (;okay 8 K W e s"#port+endpoint@0%"endpoint@1%"phy@fee00000rockchip,rk3588-naneng-combphy5vW !refapbpipe<Lhb<C\phyapb + ;okay"rphy@fee20000rockchip,rk3588-naneng-combphy5xW !refapbpipe<Lhb>E\phyapb + ;okay")sram@ff001000 mmio-sram+pinctrlrockchip,rk3588-pinctrl~+"gpio@fd8a0000rockchip,gpio-bank5qr : HEADER_12_1v8HEADER_24_1v8"gpio@fec20000rockchip,gpio-bank5st  HEADER_27_3v3HEADER_29_1v8HEADER_7_1v8HEADER_31_1v8HEADER_33_1v8HEADER_11_1v8HEADER_13_1v8HEADER_28_3v3HEADER_5_3v3HEADER_3_3v3gpio@fec30000rockchip,gpio-bank5uv @ gpio@fec40000rockchip,gpio-bank5wx `  HEADER_16_1v8HEADER_18_1v8HEADER_19_1v8HEADER_21_1v8HEADER_23_1v8HEADER_26_1v8HEADER_15_1v8HEADER_22_1v8gpio@fec50000rockchip,gpio-bank5yz  HEADER_37_3v3HEADER_8_3v3HEADER_10_3v3HEADER_32_3v3HEADER_35_3v3HEADER_40_3v3HEADER_38_3v3HEADER_36_3v3"pcfg-pull-up "pcfg-pull-down "pcfg-pull-none "pcfg-pull-none-drv-level-2  "pcfg-pull-up-drv-level-1  "pcfg-pull-up-drv-level-2  "pcfg-pull-none-smt  "auddsmbt1120can0can1can2cifclk32kcpuddrphych0ddrphych1ddrphych2ddrphych3dp0dp1emmcemmc-rstnout "emmc-bus8 "emmc-clk "emmc-cmd "emmc-data-strobe "eth1fspigmac1gpuhdmii2c0i2c0m2-xfer ",i2c1i2c1m0-xfer   "i2c2i2c2m0-xfer   "i2c3i2c3m0-xfer   "i2c4i2c4m0-xfer   "i2c5i2c5m0-xfer   "i2c6i2c6m3-xfer   "i2c7i2c7m0-xfer   "i2c8i2c8m0-xfer   "i2s0i2s0-lrck "i2s0-mclk "i2s0-sclk "i2s0-sdi0 "i2s0-sdo0 "i2s1i2s1m0-lrck "i2s1m0-sclk "i2s1m0-sdi0 "i2s1m0-sdi1 "i2s1m0-sdi2 "i2s1m0-sdi3 "i2s1m0-sdo0  "i2s1m0-sdo1  "i2s1m0-sdo2  "i2s1m0-sdo3  "i2s2i2s2m1-lrck "i2s2m1-sclk  "i2s2m1-sdi  "i2s2m1-sdo  "i2s3i2s3-lrck "i2s3-sclk "i2s3-sdi "i2s3-sdo "jtaglitcpumcumipinpupcie20x1pcie30phypcie30x1pcie30x2pcie30x4pdm0pdm1pmicpmic-pinsp "pmupwm0pwm0m0-pins "0pwm1pwm1m0-pins "1pwm2pwm2m0-pins "2pwm3pwm3m0-pins "3pwm4pwm4m0-pins  "pwm5pwm5m0-pins  "pwm6pwm6m0-pins  "pwm7pwm7m0-pins  "pwm8pwm8m0-pins  "pwm9pwm9m0-pins  "pwm10pwm10m0-pins  "pwm11pwm11m0-pins  "pwm12pwm12m0-pins  "pwm13pwm13m0-pins  "pwm14pwm14m0-pins  "pwm15pwm15m0-pins  "refclksatasata0sata1sata2sdiosdiom1-pins` "}sdmmcsdmmc-bus4@ "zsdmmc-clk "wsdmmc-cmd "xsdmmc-det "yspdif0spdif1spi0spi0m0-pins0 "spi0m0-cs0 "spi0m0-cs1 "spi1spi1m1-pins0 "spi1m1-cs0 "spi1m1-cs1 "spi2spi2m2-pins0  "spi2m2-cs0  "spi3spi3m1-pins0  "spi3m1-cs0 "spi3m1-cs1 "spi4spi4m0-pins0 "spi4m0-cs0 "spi4m0-cs1 "tsadctsadc-shut "uart0uart0m1-xfer  "/uart1uart1m1-xfer   "uart2uart2m0-xfer  "uart3uart3m1-xfer   "uart4uart4m1-xfer   "uart5uart5m1-xfer   "uart6uart6m1-xfer   "uart7uart7m1-xfer   "uart8uart8m1-xfer   "uart9uart9m2-xfer   "uart9m2-ctsn  "uart9m2-rtsn  "vopbt656gpio-functsadc-gpio-func "bluetooth-pinsbt-reset "bt-wake-dev "bt-wake-host "ethernet-pinsrtl8111-perstb "shym8563hym8563-int "sdio-pwrseqwifi-enable-h "usb-typecusbc0-int "typec5v-pwren "opp-table-cluster0operating-points-v2 '" opp-1008000000 2< 9 L L~ G@opp-1200000000 2G 9 4 4~ G@opp-1416000000 2Tfr 9 ~ G@ Xopp-1608000000 2_" 9 P P~ G@opp-1800000000 2kI 9~~~ G@opp-table-cluster1operating-points-v2 '"opp-1200000000 2G 9 L LB@ G@opp-1416000000 2Tfr 9  B@ G@opp-1608000000 2_" 9 B@ G@opp-1800000000 2kI 9 P PB@ G@opp-2016000000 2x) 9HHB@ G@opp-2208000000 2h 9llB@ G@opp-2400000000 2  9B@B@B@ G@opp-table-cluster2operating-points-v2 '"opp-1200000000 2G 9 L LB@ G@opp-1416000000 2Tfr 9  B@ G@opp-1608000000 2_" 9 B@ G@opp-1800000000 2kI 9 P PB@ G@opp-2016000000 2x) 9HHB@ G@opp-2208000000 2h 9llB@ G@opp-2400000000 2  9B@B@B@ G@opp-tableoperating-points-v2"!opp-300000000 2 9 L L Popp-400000000 2ׄ 9 L L Popp-500000000 2e 9 L L Popp-600000000 2#F 9 L L Popp-700000000 2)' 9 ` ` Popp-800000000 2/ 9 q q Popp-900000000 25 9 5 5 Popp-1000000000 2; 9 P P Padc-keys-0 adc-keys dbuttons u w@ dbutton-boot nboot  FPadc-keys-1 adc-keys dbuttons u w@ dbutton-recovery nrecovery  FPchosen serial2:1500000n8sdio-pwrseqmmc-pwrseq-simple !ext_clock5default  "~soundaudio-graph-card nrockchip,es8388) MicrophoneMic JackHeadphoneHeadphones3LINPUT2Mic JackHeadphonesLOUT1HeadphonesROUT1 vbus5v0-typec-regulatorregulator-fixed %defaultvbus5v0_typecLK@LK@:*"vcc-1v1-nldo-s3-regulatorregulator-fixedvcc_1v1_nldo_s3:-"vcc-3v3-s0-regulatorregulator-fixed2Z2Z vcc_3v3_s0:{"regulator-state-memEvcc5v0-sys-regulatorregulator-fixedLK@LK@ vcc5v0_sys"-vcc5v0-usb-regulatorregulator-fixedLK@LK@ vcc5v0_usb:"*vcc5v0-usbdcin-regulatorregulator-fixedLK@LK@vcc5v0_usbdcin" compatibleinterrupt-parent#address-cells#size-cellsmodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3spi4mmc0mmc1mmc2cpudevice_typeregenable-methodcapacity-dmips-mhzclocksassigned-clocksassigned-clock-ratescpu-idle-statesi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachedynamic-power-coefficient#cooling-cellsoperating-points-v2cpu-supplyphandleentry-methodlocal-timer-stoparm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uscache-levelcache-unifiedportsarm,smc-idshmem#clock-cells#reset-cellsinterruptsclock-frequencyclock-output-namesinterrupt-namesrangesclock-namespower-domainsstatusdr_modephysphy-namesphy_typeresetssnps,dis_enblslpm_quirksnps,dis-u1-entry-quirksnps,dis-u2-entry-quirksnps,dis-u2-freeclk-exists-quirksnps,dis-del-phy-power-chg-quirksnps,dis-tx-ipgap-linecheck-quirkusb-role-switchremote-endpointsnps,dis_rxdet_inp3_quirk#iommu-cellsreset-names#phy-cellsphy-supplyrockchip,grfpinctrl-0pinctrl-namesregulator-always-onregulator-boot-onregulator-max-microvoltregulator-min-microvoltregulator-nameregulator-ramp-delayfcs,suspend-voltage-selectorvin-supplyregulator-off-in-suspenddmasdma-namesreg-shiftreg-io-width#pwm-cells#power-domain-cellspm_qosiommusreg-namesrockchip,vop-grfrockchip,vo1-grfrockchip,pmuassigned-clock-parents#sound-dai-cellsbus-range#interrupt-cellsinterrupt-map-maskinterrupt-maplinux,pci-domainmax-link-speedmsi-mapnum-lanesinterrupt-controllerrockchip,php-grfsnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,wr_osr_lmtsnps,rd_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-useports-implementedhba-port-capsnps,rx-ts-maxsnps,tx-ts-maxfifo-depthmax-frequencybus-widthcap-mmc-highspeedcap-sd-highspeeddisable-wpno-sdiono-mmcsd-uhs-sdr104vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqno-sdnon-removableno-mmc-hs400rockchip,trcm-sync-tx-onlydai-formatmclk-fsmbi-aliasmbi-rangesmsi-controller#msi-cellsaffinityarm,pl330-periph-burst#dma-cellsnum-cs#gpio-cellsgpio-controllerspi-max-frequencyvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvcc13-supplyvcc14-supplyvcca-supplypinsfunctionregulator-enable-ramp-delayregulator-on-in-suspendregulator-suspend-microvoltuart-has-rtsctsdevice-wake-gpiosenable-gpioshost-wake-gpiospolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polaritypinctrl-1#thermal-sensor-cells#io-channel-cellsvref-supplyvbus-supplydata-rolelabelpower-roletry-power-rolesource-pdossink-pdosop-sink-microwattwakeup-sourceAVDD-supplyDVDD-supplyHPVDD-supplybitsrockchip,u2phy-grfrockchip,usb-grfrockchip,usbdpphy-grfrockchip,vo-grforientation-switchmode-switchsbu1-dc-gpiossbu2-dc-gpiosrockchip,dp-lane-muxrockchip,pipe-grfrockchip,pipe-phy-grfgpio-rangesgpio-line-namesbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendio-channel-namesio-channelskeyup-threshold-microvoltpoll-intervallinux,codepress-threshold-microvoltstdout-pathpost-power-on-delay-msreset-gpioswidgetsroutingdaisenable-active-highgpio