8(  3,Gateworks Venice GW73xx-2x i.MX8MP Development Kit&2gateworks,imx8mp-gw73xx-2xfsl,imx8mpaliases&=/soc@0/bus@30800000/ethernet@30bf0000=G/soc@0/pcie@33800000/pcie@0,0/pcie@0,0/pcie@4,0/ethernet@0,0"Q/soc@0/bus@30000000/gpio@30200000"W/soc@0/bus@30000000/gpio@30210000"]/soc@0/bus@30000000/gpio@30220000"c/soc@0/bus@30000000/gpio@30230000"i/soc@0/bus@30000000/gpio@30240000!o/soc@0/bus@30800000/i2c@30a20000!t/soc@0/bus@30800000/i2c@30a30000!y/soc@0/bus@30800000/i2c@30a40000!~/soc@0/bus@30800000/i2c@30a50000!/soc@0/bus@30800000/i2c@30ad0000!/soc@0/bus@30800000/i2c@30ae0000!/soc@0/bus@30800000/mmc@30b40000!/soc@0/bus@30800000/mmc@30b50000!/soc@0/bus@30800000/mmc@30b600006/soc@0/bus@30800000/spba-bus@30800000/serial@308600006/soc@0/bus@30800000/spba-bus@30800000/serial@308900006/soc@0/bus@30800000/spba-bus@30800000/serial@30880000$/soc@0/bus@30800000/serial@30a60000!/soc@0/bus@30800000/spi@30bb0000cpus cpu@0cpu2arm,cortex-a53lpsci@ -@?L] ispeed_gradezcpu@1cpu2arm,cortex-a53lpsci@ -@?Lzcpu@2cpu2arm,cortex-a53lpsci@ -@?Lzcpu@3cpu2arm,cortex-a53lpsci@ -@?Lzl2-cache02cache@opp-table2operating-points-v2opp-1200000000G PI opp-1600000000_^~I opp-1800000000kIB@ I clock-osc-32k 2fixed-clock%5osc_32k"clock-osc-24m 2fixed-clock%n65osc_24m#clock-ext1 2fixed-clock%k@ 5clk_ext1$clock-ext2 2fixed-clock%k@ 5clk_ext2%clock-ext3 2fixed-clock%k@ 5clk_ext3&clock-ext4 2fixed-clock%k@ 5clk_ext4'funnel2arm,coresight-static-funnelin-ports port@0endpointHport@1endpointHport@2endpointH port@3endpointH out-portsportendpointH reserved-memory Xdsp@92400000@_ fdisabledpmu2arm,cortex-a53-pmu mpsci 2arm,psci-1.0smcthermal-zonescpu-thermalx tripstrip0Lpassive trip1s criticalcooling-mapsmap0 0soc-thermalx tripstrip0Lpassivetrip1s criticalcooling-mapsmap00timer2arm,armv8-timer0m   %zsoc@02fsl,imx8mp-socsimple-bus X>]isoc_unique_idetm@28440000"2arm,coresight-etm4xarm,primecell(D] apb_pclkout-portsportendpointHetm@28540000"2arm,coresight-etm4xarm,primecell(T] apb_pclkout-portsportendpointHetm@28640000"2arm,coresight-etm4xarm,primecell(d] apb_pclkout-portsportendpointH etm@28740000"2arm,coresight-etm4xarm,primecell(t] apb_pclkout-portsportendpointH funnel@28c03000+2arm,coresight-dynamic-funnelarm,primecell(0] apb_pclkin-ports port@0endpointH port@1endpointport@2endpointout-portsportendpointHetf@28c04000 2arm,coresight-tmcarm,primecell(@] apb_pclkin-portsportendpointHout-portsportendpointHetr@28c06000 2arm,coresight-tmcarm,primecell(`] apb_pclkin-portsportendpointHbus@300000002fsl,aips-bussimple-bus0@ Xgpio@302000002fsl,imx8mp-gpiofsl,imx35-gpio0 m@A/@-gpio@302100002fsl,imx8mp-gpiofsl,imx35-gpio0!mBC/@#6gpio@302200002fsl,imx8mp-gpiofsl,imx35-gpio0"mDE/ @8Ngpio@302300002fsl,imx8mp-gpiofsl,imx35-gpio0#mFG/@R XLdio1dio0pci_usb_selrs485_enrs485_termrs485_halfpci_wdis#;gpio@302400002fsl,imx8mp-gpiofsl,imx35-gpio0$mHI/@r,tmu@302600002fsl,imx8mp-tmu0&]icalib\ watchdog@302800002fsl,imx8mp-wdtfsl,imx21-wdt0( mNfokayrdefaultwatchdog@302900002fsl,imx8mp-wdtfsl,imx21-wdt0) mO fdisabledwatchdog@302a00002fsl,imx8mp-wdtfsl,imx21-wdt0* m  fdisabledtimer@302d00002fsl,imx8mp-gptfsl,imx6dl-gpt0- m7ipgpertimer@302e00002fsl,imx8mp-gptfsl,imx6dl-gpt0. m6ipgpertimer@302f00002fsl,imx8mp-gptfsl,imx6dl-gpt0/ m5ipgperpinctrl@303300002fsl,imx8mp-iomuxc03rdefault eqosgrpPTX|xthd`\lpKethphy0grp0x@ PMgscgrpP5i2c1grp0`@d@3i2c1gpiogrp0`@d@4i2c2grp0h@ l@8i2c2gpiogrp0h@ l@9i2c3grp0p@t@<i2c3gpiogrp0p@t@=uart1grp0 @$@.uart2grp0(@,@1uart3grp`0@4@H@L@/usdhc1grp?usdhc3grp$( h lpt| L$P(T,H0Fusdhc3-100mhzgrp$( h lpt| L$P(T,H0Gusdhc3-200mhzgrp$( h lpt| L$P(T,H0Hwdoggrp|fhoggrph@Ft@F@@@@@ accelgrpP:btengrpF0gpioledgrp0L\pcie0grprppsgrpTFregwlgrpFregusb1grpDFusb1grpH@zusbcon1grp4@regusb2grpxFspi2grp`Ph@Tp@Xl@\@+uart4grp08@<@>usdhc2grp $(,04$Ausdhc2-100mhzgrp $(,04$Cusdhc2-200mhzgrp $(,04$Dusdhc2-vmmc-grp8usdhc2gpiogrpBsyscon@303400002fsl,imx8mp-iomuxc-gprsyscon042efuse@30350000)2fsl,imx8mp-ocotpfsl,imx8mm-ocotpsyscon05 unique-id@8speed-grade@10mac-address@90Imac-address@96Jcalib@264dclock-controller@30360000$2fsl,imx8mp-anatopfsl,imx8mm-anatop06snvs@30370000#2fsl,sec-v4.0-monsysconsimple-mfd07!snvs-rtc-lp2fsl,sec-v4.0-mon-rtc-lp!4m snvs-rtcsnvs-powerkey2fsl,sec-v4.0-pwrkey! m snvs-pwrkeyt fdisabledsnvs-lpgpr+2fsl,imx8mp-snvs-lpgprfsl,imx7d-snvs-lpgprclock-controller@303800002fsl,imx8mp-ccm08mUV"#$%&'4osc_32kosc_24mclk_ext1clk_ext2clk_ext3clk_ext4(B gh(8,A8@;/ereset-controller@303900002fsl,imx8mp-srcsyscon09 mYagpc@303a00002fsl,imx8mp-gpc0: mW/pgc power-domain@0\power-domain@1gpower-domain@2epower-domain@3fpower-domain@4ij 2ij888 //ypower-domain@56lH88ׄ#FQpower-domain@6/(tpower-domain@7fef88/ׄ(power-domain@8)power-domain@9 4/(spower-domain@10  [power-domain@11/) vpower-domain@12/)  wpower-domain@13/)  xpower-domain@14cdc@3ek@hpower-domain@15ipower-domain@16]power-domain@177 7@edpower-domain@18^bus@304000002fsl,aips-bussimple-bus0@@ Xpwm@306600002fsl,imx8mp-pwmfsl,imx27-pwm0f mQipgper= fdisabledpwm@306700002fsl,imx8mp-pwmfsl,imx27-pwm0g mRipgper= fdisabledpwm@306800002fsl,imx8mp-pwmfsl,imx27-pwm0h mSipgper= fdisabledpwm@306900002fsl,imx8mp-pwmfsl,imx27-pwm0i mTipgper= fdisabledtimer@306a00002nxp,sysctr-timer0j m/#pertimer@306e00002fsl,imx8mp-gptfsl,imx6dl-gpt0n m3ipgpertimer@306f00002fsl,imx8mp-gptfsl,imx6dl-gpt0o m3ipgpertimer@307000002fsl,imx8mp-gptfsl,imx6dl-gpt0p m4ipgperbus@308000002fsl,aips-bussimple-bus0@ Xspba-bus@308000002fsl,spba-bussimple-bus0 Xspi@30820000 "2fsl,imx8mp-ecspifsl,imx6ul-ecspi0 mipgperĴ8 H**Mrxtx fdisabledspi@30830000 "2fsl,imx8mp-ecspifsl,imx6ul-ecspi0 m ipgperĴ8 H**Mrxtxfokayrdefault+W, - tpm@12atmel,attpm20ptcg,tpm_tis-spi`%Qspi@30840000 "2fsl,imx8mp-ecspifsl,imx6ul-ecspi0 m!ipgperĴ8 H**Mrxtx fdisabledserial@308600002fsl,imx8mp-uartfsl,imx6q-uart0 mipgper H**Mrxtxfokayrdefault.serial@308800002fsl,imx8mp-uartfsl,imx6q-uart0 mipgper H**Mrxtxfokayrdefault/0 r, |, bluetooth2brcm,bcm4330-bt -serial@308900002fsl,imx8mp-uartfsl,imx6q-uart0 mipgper H**Mrxtxfokayrdefault1can@308c00002fsl,imx8mp-flexcan0 mnipgpert0bZ 2 fdisabledcan@308d00002fsl,imx8mp-flexcan0 mnipgperu0bZ 2 fdisabledcrypto@30900000 2fsl,sec-v4.0 0 X0 m[kn aclkipgjr@10002fsl,sec-v4.0-job-ring mi fdisabledjr@20002fsl,sec-v4.0-job-ring  mjjr@30002fsl,sec-v4.0-job-ring0 mri2c@30a200002fsl,imx8mp-i2cfsl,imx21-i2c 0 m#fokay% rdefaultgpio34 , ,gsc@202gw,gsc 56m/ 7adc 2gw,gsc-adc channel@6tempchannel@8vdd_batchannel@16 fan_tachchannel@82vdd_vinVTchannel@84 vdd_adc1''channel@86 vdd_adc2''channel@88vdd_1p0channel@8cvdd_1p8channel@8evdd_2p5channel@90vdd_3p3''channel@92 vdd_dramchannel@98vdd_socchannel@9avdd_armchannel@a2vdd_gsc''fan-controller@0 2gw,gsc-fan gpio@23 2nxp,pca9555#7meeprom@50 2atmel,24c02Peeprom@51 2atmel,24c02Qeeprom@52 2atmel,24c02Reeprom@53 2atmel,24c02Srtc@682dallas,ds1672hpmic@69 2mps,mp5416iregulatorsbuck1buck1 P&B@>Rbuck2buck2&>Rbuck3buck3 P&B@>Rbuck4buck4w@&w@>Rldo1ldo1w@&w@>Rldo2ldo2B@&B@>Rldo3ldo3&%&&%>Rldo4ldo42Z&2Z>Ri2c@30a300002fsl,imx8mp-i2cfsl,imx21-i2c 0 m$fokay%rdefault89 , ,eeprom@52 2atmel,24c32R accelerometer@19 2st,lis2de12rdefault:d;mi2c@30a400002fsl,imx8mp-i2cfsl,imx21-i2c 0 m%fokay% rdefaultgpio<= , ,i2c@30a500002fsl,imx8mp-i2cfsl,imx21-i2c 0 m& fdisabledserial@30a600002fsl,imx8mp-uartfsl,imx6q-uart0 mipgper H**Mrxtxfokayrdefault>mailbox@30aa00002fsl,imx8mp-mufsl,imx6sx-mu0 mXtmailbox@30e600002fsl,imx8mp-mufsl,imx6sx-mu0 mt fdisabledi2c@30ad00002fsl,imx8mp-i2cfsl,imx21-i2c 0 mL fdisabledi2c@30ae00002fsl,imx8mp-i2cfsl,imx21-i2c 0 mM fdisabledmmc@30b4000022fsl,imx8mp-usdhcfsl,imx8mm-usdhcfsl,imx7d-usdhc0 mn_ ipgahbperfokayrdefault?@mmc@30b5000022fsl,imx8mp-usdhcfsl,imx8mm-usdhcfsl,imx7d-usdhc0 mn_ ipgahbperfokay"rdefaultstate_100mhzstate_200mhzABCBDB 6 Emmc@30b6000022fsl,imx8mp-usdhcfsl,imx8mm-usdhcfsl,imx7d-usdhc0 mn_ ipgahbperfokay"rdefaultstate_100mhzstate_200mhzFGHspi@30bb00002nxp,imx8mp-fspi0fspi_basefspi_mmap mk fspi_enfspiĴ  fdisableddma-controller@30bd0000 2fsl,imx8mp-sdmafsl,imx8mq-sdma0 mkipgahbimx/sdma/sdma-imx7d.bin*ethernet@30be0000-2fsl,imx8mp-fecfsl,imx8mq-fecfsl,imx6sx-fec00mvwxy("ipgahbptpenet_clk_refenet_out ^ 6:;9sY@ ]I imac-address 2 fdisabledethernet@30bf0000'2nxp,imx8mp-dwmac-eqossnps,dwmac-5.10a0m.macirqeth_wake_irq stmmacethpclkptp_reftx^6:; sY@]J imac-address>2fokayrdefaultK Hrgmii-idQLmdio2snps,dwmac-mdio ethernet-phy@02ethernet-phy-ieee802.3-c22MrdefaultNm\qLleds led@1lankeepled@2lankeepbus@30c000002fsl,aips-bussimple-bus0@ Xspba-bus@30c000002fsl,spba-bussimple-bus0 Xsai@30c100002fsl,imx8mp-saifsl,imx8mq-sai0(OOOObusmclk0mclk1mclk2mclk3 HPPMrxtx m_ fdisabledsai@30c200002fsl,imx8mp-saifsl,imx8mq-sai0(OOOObusmclk0mclk1mclk2mclk3 HPPMrxtx m` fdisabledsai@30c300002fsl,imx8mp-saifsl,imx8mq-sai0(OO O O busmclk0mclk1mclk2mclk3 HPPMrxtx m2 fdisabledsai@30c500002fsl,imx8mp-saifsl,imx8mq-sai0(O O OObusmclk0mclk1mclk2mclk3 HPP Mrxtx mZ fdisabledsai@30c600002fsl,imx8mp-saifsl,imx8mq-sai0(OOOObusmclk0mclk1mclk2mclk3 HP P Mrxtx mZ fdisabledsai@30c800002fsl,imx8mp-saifsl,imx8mq-sai0(OOOObusmclk0mclk1mclk2mclk3 HP P Mrxtx mo fdisabledeasrc@30c90000"2fsl,imx8mp-easrcfsl,imx8mn-easrc0 mzOmemHPPPPPPPP@Mctx0_rxctx0_txctx1_rxctx1_txctx2_rxctx2_txctx3_rxctx3_tximx/easrc/easrc-imx8mn.bin@ fdisabledaudio-controller@30ca00002fsl,imx8mp-micfil00mmn,-(OO6&')ipg_clkipg_clk_apppll8kpll11kclkext3HPMrx fdisabledaud2htx@30cb00002fsl,imx8mp-aud2htx0 mO!busHPMtx fdisabledxcvr@30cc00002fsl,imx8mp-xcvr 000 0ramregsrxfifotxfifo$m OO&OO#ipgphyspbapll_ipg HPPMrxtxO fdisableddma-controller@30e00000 2fsl,imx8mp-sdmafsl,imx8mq-sdma0Oipgahb m"imx/sdma/sdma-imx7d.bindma-controller@30e10000 2fsl,imx8mp-sdmafsl,imx8mq-sdma0Oipgahb mgimx/sdma/sdma-imx7d.binPclock-controller@30e200002fsl,imx8mp-audio-blk-ctrl08{|}"ahbsai1sai2sai3sai5sai6sai7/QpOinterconnect@327000002fsl,imx8mp-nocfsl,imx8m-noc2pgzR_opp-table2operating-points-v2Ropp-200000000 opp-1000000000;bus@32c000002fsl,aips-bussimple-bus2@ Xisi@32e000002fsl,imx8mp-isi2@m* axiapbS/S fdisabledports port@0endpointHTVport@1endpointHUWisp@32e100002fsl,imx8mp-isp2 mJ ispaclkhclk/SS fdisabledports port@1isp@32e200002fsl,imx8mp-isp2 mK ispaclkhclk/SS fdisabledports port@1dwe@32e300002nxp,imx8mp-dw1002 md axiahb/Scsi@32e40000*2fsl,imx8mp-mipi-csi2fsl,imx8mm-mipi-csi22 m%沀  pclkwrapphyaxi>/S fdisabledports port@0port@1endpointHVTcsi@32e50000*2fsl,imx8mp-mipi-csi2fsl,imx8mm-mipi-csi22 mP%沀  pclkwrapphyaxi>/S fdisabledports port@0port@1endpointHWUdsi@32e600002fsl,imx8mp-mipi-dsim2 bus_clksclk_mipib8 n6$n6 m/S fdisabledports port@0endpointHXYport@1endpointdisplay-controller@32e800002fsl,imx8mp-lcdif2 pixaxidisp_axi m/S fdisabledportendpointHYXdisplay-controller@32e900002fsl,imx8mp-lcdif2 m pixaxidisp_axi/S fdisabledportendpointHZ`blk-ctrl@32ec0000!2fsl,imx8mp-media-blk-ctrlsyscon2 (/[\\[[][^^]F@busmipi-dsi1mipi-csi1lcdif1isimipi-csi2lcdif2ispdwemipi-dsi2S_________ __!__"__#_/alcdif-rdlcdif-wrisi0isi1isi2isp0isp1dwe@ &apbaxicam1cam2disp1disp2ispphy0ab98(A8((@e e=Sbridge@5c2fsl,imx8mp-ldb\( ldblvdsIldb( fdisabledports port@0endpointH`Zport@1endpointport@2endpointpcie-phy@32f000002fsl,imx8mp-pcie-phy2aatpciephyperst/bfokaycrefqblk-ctrl@32f10000 2fsl,imx8mp-hsio-blk-ctrlsyscon2$ usbpcie/ddefdg(@bususbusb-phy1usb-phy2pciepcie-phy@S________anoc-pcieusb1usb2pciebblk-ctrl@32fc0000 2fsl,imx8mp-hdmi-blk-ctrlsyscon2(capbaxiref_266mref_24mfdcc(/hhhhhhhihh=@busirqsteerlcdifpaipvitrnghdmi-txhdmi-tx-phyhdcphrvjinterrupt-controller@32fc2000%2fsl,imx8mp-irqsteerfsl,imx-irqsteer2  m+/@cipg/jkdisplay-bridge@32fc40002fsl,imx8mp-hdmi-pvi2@km /j fdisabledports port@0endpointHloport@1endpointHmpdisplay-controller@32fc60002fsl,imx8mp-lcdif2`kmncpixaxidisp_axi/j fdisabledportendpointHolhdmi@32fd80002fsl,imx8mp-hdmi-tx2~kmcniahbisfrcecpix6/j fdisabledports port@0endpointHpmport@1phy@32fdff002fsl,imx8mp-hdmi-phy2capbref/j fdisablednpcie@338000002fsl,imx8mp-pcie3@ dbiconfig 7pciepcie_buspcie_auxx9 pci0X m.msi/~}|{1/baa tappsturnoffBq Gpcie-phyfokayrdefaultr Q;pcie@0,0pci Xpcie@0,0pci Xpcie@4,0 pci Xethernet@0,0 X\pcie-ep@338000002fsl,imx8mp-pcie-ep3@dbiaddr_space 7pciepcie_buspcie_auxx9 m.dma/baa tappsturnoffBq Gpcie-phyn} fdisabledgpu@38000000 2vivante,gc8 m 4fcoreshaderbusreg3488///sgpu@38008000 2vivante,gc8 mf corebusreg58//tvideo-codec@383000002nxp,imx8mm-vpu-g180 mr+#F/uvideo-codec@383100002nxp,imx8mq-vpu-g281 m sAe/ublk-ctrl@383300002fsl,imx8mp-vpu-blk-ctrlsyscon83/)vwx@busg1g2vc8000e  g1g2vc8000e`+#F#F0S_%_$_&_$_'_$ag1g2vc8000eunpu@38500000 2vivante,gc8P  m    ijcoreshaderbusreg/yinterrupt-controller@38800000 2arm,gic-v388 / m memory-controller@3d4000002snps,ddrc-3.80a=@@ mddr-pmu@3d800000%2fsl,imx8mp-ddr-pmufsl,imx8m-ddr-pmu=@ mbusb-phy@381f00402fsl,imx8mp-usb-phy8@@phy/bfokay{usb@32f101002fsl,imx8mp-dwc328  @ hsiosuspend m/b  @@Xfokayrdefaultzusb@38100000 2snps,dwc38@bus_earlyrefsuspend m(B{{Gusb2-phyusb3-phy  otg  /peripheralfokayportendpointH|usb-phy@382f00402fsl,imx8mp-usb-phy8/@@phy/bfokay H}~usb@32f101082fsl,imx8mp-dwc328/  @ hsiosuspend m/b  @@Xfokay T musb@38200000 2snps,dwc38 @bus_earlyrefsuspend m)B~~Gusb2-phyusb3-phy hostfokaydsp@3b6e80002fsl,imx8mp-dsp;n txdb0txdb1rxdb0rxdb10   fdisabledmemory@40000000memory@gpio-keys 2gpio-keyskey-user-pbuser_pb Z key-user-pb1x user_pb1x 7mkey-erased key_erased 7mkey-eeprom-wp eeprom_wp 7mkey-tampertamper 7mswitch-hold switch_hold 7mconnector%2gpio-usb-b-connectorusb-b-connectorrdefaultmicrootg H NportendpointH|led-controller 2gpio-ledsrdefaultled-0status Z;on heartbeatled-1status Z;offclock-pcie0 2fixed-clock%cpps 2pps-gpiordefault Z;fokayregulator-usb12regulator-fixedrdefault usb1_vbus W-  LK@&LK@regulator-usb22regulator-fixedrdefault usb2_vbus W;  LK@&LK@}regulator-wifi-en2regulator-fixedrdefaultwl W; d 2Z&2Z@regulator-usdhc2-vmmc2regulator-fixedrdefault VDD_3V3_SD  W6 .&2Z2Z dEchosen6 /soc@0/bus@30800000/spba-bus@30800000/serial@30890000 interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0ethernet1gpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5mmc0mmc1mmc2serial0serial1serial2serial3spi0device_typeregclock-latencyclocksenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachenvmem-cellsnvmem-cell-namesoperating-points-v2#cooling-cellscpu-supplyphandlecache-unifiedcache-levelopp-sharedopp-hzopp-microvoltopp-supported-hwclock-latency-nsopp-suspend#clock-cellsclock-frequencyclock-output-namesremote-endpointrangesno-mapstatusinterruptspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicearm,no-tick-in-suspendcpuclock-namesgpio-controller#gpio-cellsinterrupt-controller#interrupt-cellsgpio-rangesgpio-line-names#thermal-sensor-cellspinctrl-namespinctrl-0fsl,ext-reset-outputfsl,pinsregmapoffsetlinux,keycodewakeup-sourceassigned-clocksassigned-clock-parentsassigned-clock-rates#reset-cells#power-domain-cellspower-domains#pwm-cellsdmasdma-namescs-gpiosspi-max-frequencycts-gpiosrts-gpiosshutdown-gpiosfsl,clk-sourcefsl,stop-modepinctrl-1scl-gpiossda-gpiosgw,modelabelgw,voltage-divider-ohmspagesizeregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onst,drdy-int-pin#mbox-cellsfsl,tuning-start-tapfsl,tuning-stepbus-widthnon-removablevmmc-supplypinctrl-2cd-gpiosreg-names#dma-cellsfsl,sdma-ram-script-namefsl,num-tx-queuesfsl,num-rx-queuesinterrupt-namesintf_modephy-modephy-handleti,rx-internal-delayti,tx-internal-delaytx-fifo-depthrx-fifo-depthcolorfunctiondefault-state#sound-dai-cellsfirmware-namefsl,asrc-ratefsl,asrc-formatresets#interconnect-cellsfsl,blk-ctrlsamsung,pll-clock-frequencypower-domain-namesinterconnectsinterconnect-namesreset-names#phy-cellsfsl,refclk-pad-modefsl,clkreq-unsupportedfsl,channelfsl,num-irqsreg-io-widthbus-rangenum-lanesnum-viewportinterrupt-map-maskinterrupt-mapfsl,max-link-speedlinux,pci-domainphysphy-namesreset-gpiolocal-mac-addressnum-ib-windowsnum-ob-windowsdma-rangesfsl,over-current-active-lowsnps,gfladj-refclk-lpm-sel-quirksnps,parkmode-disable-ss-quirkadp-disablehnp-disablesrp-disabledr_modeusb-role-switchrole-switch-default-modevbus-supplyfsl,permanently-attachedfsl,disable-port-power-controlmbox-namesmboxesmemory-regionlinux,codeid-gpioslinux,default-triggerenable-active-highstartup-delay-usoff-on-delay-usstdout-path