8( Kgoogle,veyron-pinky-rev2google,veyron-pinkygoogle,veyronrockchip,rk3288& 7Google Pinkyaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/mmc@ff0f0000k/mmc@ff0c0000q/mmc@ff0d0000w/mmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/mmc@ff0f0000/mmc@ff0c0000/spi@ff110000/ec@0/i2c-tunnelarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12  (7@ELrf rcpu@501cpuarm,cortex-a12  (7@ELrrcpu@502cpuarm,cortex-a12  (7@ELrrcpu@503cpuarm,cortex-a12  (7@ELrropp-table-0operating-points-v2zropp-126000000 opp-216000000  opp-408000000Q opp-600000000#F opp-696000000)|~opp-8160000000,B@opp-1008000000<opp-1200000000Gopp-1416000000TfrOopp-1512000000ZJopp-1608000000_" opp-1704000000epopp-1800000000kI\reserved-memorydma-unusable@fe000000 oscillator fixed-clockn6xin24mr timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H Ea   pclktimerdisplay-subsystemrockchip,display-subsystem mmc@ff0c0000rockchip,rk3288-dw-mshcр EDrv biuciuciu-driveciu-sample,  @ 7resetCokayJTfw  Zdefault   mmc@ff0d0000rockchip,rk3288-dw-mshcр EEsw biuciuciu-driveciu-sample, ! @ 7resetCokayJf,BMdefault  mmc@ff0e0000rockchip,rk3288-dw-mshcр EFtx biuciuciu-driveciu-sample, " @ 7reset Cdisabledmmc@ff0f0000rockchip,rk3288-dw-mshcр EGuy biuciuciu-driveciu-sample, # @ 7resetCokayJT[fMdefault saradc@ff100000rockchip,saradc  $uEI[ saradcapb_pclk W 7saradc-apb Cdisabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spiEAR spiclkapb_pclk txrx ,default !"#$ Cokayec@0google,cros-ec-spi & default %-i2c-tunnelgoogle,cros-ec-i2c-tunnelsbs-battery@bsbs,sbs-battery keyboard-controllergoogle,cros-ec-keyb #D=;<=>?@A B CD}0Y1 d"#(  \V |})   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ispi@ff120000(rockchip,rk3288-spirockchip,rk3066-spiEBS spiclkapb_pclk txrx -default &'()  Cdisabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spiECT spiclkapb_pclk  txrx .default *+,- CokayJ flash@0jedec,spi-nor i2c@ff140000rockchip,rk3288-i2c  > i2cEMdefault .Cokay]2udtpm@20infineon,slb9645tt i2c@ff150000rockchip,rk3288-i2c  ? i2cEOdefault /Cokay]2u,i2c@ff160000rockchip,rk3288-i2c  @ i2cEPdefault 0Cokay]2u,ts3a227e@3b ti,ts3a227e ;&1default 2rtrackpad@15elan,ekth3000 & default 34i2c@ff170000rockchip,rk3288-i2c  A i2cEQdefault 5 Cdisabledserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart  7EMU baudclkapb_pclk  txrxdefault  678Cokayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart  8ENV baudclkapb_pclk  txrxdefault 9Cokayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uart i 9EOW baudclkapb_pclkdefault :Cokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart  :EPX baudclkapb_pclk  txrxdefault ; Cdisabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart  ;EQY baudclkapb_pclk txrxdefault < Cdisableddma-controller@ff250000arm,pl330arm,primecell %@E  apb_pclkr thermal-zonesreserve-thermal2@=cpu-thermald2@=tripscpu_alert0Pp\passiver>cpu_alert1P$\passiver?cpu_critP\ criticalcooling-mapsmap0g>0lmap1g?0lgpu-thermald2@=tripsgpu_alert0P4\passiver@gpu_critP\ criticalcooling-mapsmap0g@ lAtsadc@ff280000rockchip,rk3288-tsadc ( %EHZ tsadcapb_pclk  7tsadc-apbinitdefaultsleep B{CBDH Cdisabledr=ethernet@ff290000rockchip,rk3288-gmac )macirqeth_wake_irqD8Efgc]M stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac B 7stmmaceth Cdisabledusb@ff500000 generic-ehci P E EusbCokayusb@ff520000 generic-ohci R )E Eusb Cdisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2 T E otg0host F usb2-phy8CokayOusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2 X E otg0hostfx@@  G usb2-phyCokayzGOusb@ff5c0000 generic-ehci \ E Cdisableddma-controller@ff600000arm,pl330arm,primecell `@E  apb_pclk Cdisabledi2c@ff650000rockchip,rk3288-i2c e < i2cELdefault HCokay]2udpmic@1brockchip,rk808 xin32kwifibt_32kin&1default IJ&2?4LYJeJrregulatorsDCDC_REG1rvdd_arm q qr regulator-state-memDCDC_REG2rvdd_gpu 5qrregulator-state-memDCDC_REG3 rvcc135_ddrregulator-state-memDCDC_REG4rvcc_18w@w@rregulator-state-memw@LDO_REG1 rvcc33_io2Z2Zr4regulator-state-mem2ZLDO_REG3rvdd_10B@B@regulator-state-memB@LDO_REG7rvdd10_lcd_pwren_h&%&%regulator-state-memSWITCH_REG1 rvcc33_lcdr`regulator-state-memLDO_REG6 rvcc18_codecw@w@raregulator-state-memLDO_REG4 rvccio_sdw@2Zrregulator-state-memLDO_REG5 rvcc33_sd2Z2Zrregulator-state-memLDO_REG8 rvcc33_ccd2Z2Zregulator-state-memSWITCH_REG2 rvcc18_lcdregulator-state-memi2c@ff660000rockchip,rk3288-i2c f = i2cENdefault KCokay]2u max98090@10maxim,max98090 &L mclkEqdefault Mrpwm@ff680000rockchip,rk3288-pwm h9default NE_Cokayrpwm@ff680010rockchip,rk3288-pwm h9default OE_Cokayrpwm@ff680020rockchip,rk3288-pwm h 9default PE_ Cdisabledpwm@ff680030rockchip,rk3288-pwm h09default QE_ Cdisabledsram@ff700000 mmio-sram ppsmp-sram@0rockchip,rk3066-smp-sram sram@ff720000#rockchip,rk3288-pmu-srammmio-sram rpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd srpower-controller!rockchip,rk3288-power-controllerDh repower-domain@9 Echgfdehilkj$XRSTUVWXYZDpower-domain@11 EopX[\Dpower-domain@12 EX]Dpower-domain@13 EX^_Dreboot-modesyscon-reboot-mode_fRBrRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscon tclock-controller@ff760000rockchip,rk3288-cru vE  xin24mDHjk$#gׄeрxhрxhrsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd wrDedp-phyrockchip,rk3288-dp-phyEh 24mCokayruio-domains"rockchip,rk3288-io-voltage-domainCokay444 `  "a /usbphyrockchip,rk3288-usb-phyCokayusb-phy@320  E] phyclk  7phy-resetrGusb-phy@334 4E^ phyclk  7phy-resetrEusb-phy@348 HE_ phyclk  7phy-resetrFwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt Ep OCokaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif  =ET  mclkhclkbtx 6default cD Cdisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s  = 5ER i2s_clki2s_hclkbbtxrxdefault d N iCokayrcrypto@ff8a0000rockchip,rk3288-crypto @ 0 E} aclkhclksclkapb_pclk  7crypto-rstiommu@ff900800rockchip,iommu @ E  aclkiface  Cdisablediommu@ff914000rockchip,iommu  @P E  aclkiface   Cdisabledrga@ff920000rockchip,rk3288-rga  Ej aclkhclksclk e  ilm 7coreaxiahbvop@ff930000rockchip,rk3288-vop   E aclk_vopdclk_vophclk_vop e  def 7axiahbdclk fCokayportr endpoint@0  gr{endpoint@1  hrvendpoint@2  irpendpoint@3  jrsiommu@ff930300rockchip,iommu  E  aclkiface e  Cokayrfvop@ff940000rockchip,rk3288-vop   E aclk_vopdclk_vophclk_vop e   7axiahbdclk kCokayportr endpoint@0  lr|endpoint@1  mrwendpoint@2  nrqendpoint@3  ortiommu@ff940300rockchip,iommu  E  aclkiface e  Cokayrkdsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi @ E~d  refpclk e D Cdisabledportsport@0 endpoint@0  priendpoint@1  qrnport@1 lvds@ff96c000rockchip,rk3288-lvds @Eg  pclk_lvdslcdc r e D Cdisabledportsport@0 endpoint@0  srjendpoint@1  troport@1 dp@ff970000rockchip,rk3288-dp @ bEic dppclk udp e  o7dpDCokay portsport@0 endpoint@0  vrhendpoint@1  wrmport@1 endpoint@0  xrhdmi@ff980000rockchip,rk3288-dw-hdmi  =D gEhmn iahbisfrcec e Cokaydefaultunwedge y{zrportsportendpoint@0  {rgendpoint@1  |rlvideo-codec@ff9a0000rockchip,rk3288-vpu    vepuvdpuE  aclkhclk } e iommu@ff9a0800rockchip,iommu  E  aclkiface  e r}iommu@ff9c0440rockchip,iommu  @@@ oE  aclkiface  Cdisabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760 $ jobmmugpuE~( e Cokay rAopp-table-1operating-points-v2r~opp-100000000~opp-200000000 ~opp-300000000B@opp-400000000ׄopp-600000000#Fqos@ffaa0000rockchip,rk3288-qossyscon r^qos@ffaa0080rockchip,rk3288-qossyscon r_qos@ffad0000rockchip,rk3288-qossyscon rSqos@ffad0100rockchip,rk3288-qossyscon  rTqos@ffad0180rockchip,rk3288-qossyscon  rUqos@ffad0400rockchip,rk3288-qossyscon  rVqos@ffad0480rockchip,rk3288-qossyscon  rWqos@ffad0500rockchip,rk3288-qossyscon  rRqos@ffad0800rockchip,rk3288-qossyscon  rXqos@ffad0880rockchip,rk3288-qossyscon  rYqos@ffad0900rockchip,rk3288-qossyscon rZqos@ffae0000rockchip,rk3288-qossyscon r]qos@ffaf0000rockchip,rk3288-qossyscon r[qos@ffaf0080rockchip,rk3288-qossyscon r\dma-controller@ffb20000arm,pl330arm,primecell @E  apb_pclkrbefuse@ffb40000rockchip,rk3288-efuse Eq  pclk_efusecpu-id@7 cpu_leakage@17 interrupt-controller@ffc01000 arm,gic-400  @  @ `   rpinctrlrockchip,rk3288-pinctrlDdefaultsleep {gpio@ff750000rockchip,gpio-bank u QE@    r1gpio@ff780000rockchip,gpio-bank x REA    gpio@ff790000rockchip,gpio-bank y SEB    gpio@ff7a0000rockchip,gpio-bank z TEC    gpio@ff7b0000rockchip,gpio-bank { UED    rgpio@ff7c0000rockchip,gpio-bank | VEE    gpio@ff7d0000rockchip,gpio-bank } WEF    rLgpio@ff7e0000rockchip,gpio-bank ~ XEG    r gpio@ff7f0000rockchip,gpio-bank  YEH    hdmihdmi-cec-c0 (hdmi-cec-c7 (hdmi-ddc (ryhdmi-ddc-unwedge (rzpcfg-output-low 6rpcfg-pull-up Arpcfg-pull-down Nrpcfg-pull-none ]rpcfg-pull-none-12ma ] j rsuspendglobal-pwroff (rddrio-pwroff (rddr0-retention (rddr1-retention (suspend-l-wake (rsuspend-l-sleep (redpedp-hpd ( i2c0i2c0-xfer (rHi2c1i2c1-xfer (r.i2c2i2c2-xfer (  rKi2c3i2c3-xfer (r/i2c4i2c4-xfer (r0i2c5i2c5-xfer (r5i2s0i2s0-bus` (rdlcdclcdc-ctl@ (rrsdmmcsdmmc-clk (rsdmmc-cmd (rsdmmc-cd (sdmmc-bus1 (sdmmc-bus4@ (rsdmmc-cd-disabled (rsdmmc-cd-pin (rsdmmc-wp-pin ( rsdio0sdio0-bus1 (sdio0-bus4@ (rsdio0-cmd (rsdio0-clk (rsdio0-cd (sdio0-wp (sdio0-pwr (sdio0-bkpwr (sdio0-int (wifienable-h (rbt-enable-l (bt-host-wake (bt-host-wake-l (bt-dev-wake-sleep (rbt-dev-wake-awake (rbt-dev-wake (sdio1sdio1-bus1 (sdio1-bus4@ (sdio1-cd (sdio1-wp (sdio1-bkpwr (sdio1-int (sdio1-cmd (sdio1-clk (sdio1-pwr ( emmcemmc-clk (remmc-cmd (remmc-pwr ( emmc-bus1 (emmc-bus4@ (emmc-bus8 (remmc-reset ( rspi0spi0-clk ( r!spi0-cs0 ( r$spi0-tx (r"spi0-rx (r#spi0-cs1 (spi1spi1-clk ( r&spi1-cs0 ( r)spi1-rx (r(spi1-tx (r'spi2spi2-cs1 (spi2-clk (r*spi2-cs0 (r-spi2-rx (r,spi2-tx ( r+uart0uart0-xfer (r6uart0-cts (r7uart0-rts (r8uart1uart1-xfer ( r9uart1-cts ( uart1-rts ( uart2uart2-xfer (r:uart3uart3-xfer (r;uart3-cts ( uart3-rts ( uart4uart4-xfer (r<uart4-cts ( uart4-rts ( tsadcotp-pin ( rBotp-out ( rCpwm0pwm0-pin (rNpwm1pwm1-pin (rOpwm2pwm2-pin (rPpwm3pwm3-pin (rQgmacrgmii-pins ( rmii-pins (spdifspdif-tx ( rcpcfg-pull-none-drv-8ma ] jrpcfg-pull-up-drv-8ma A jpcfg-output-high yrbuttonspwr-key-l (rap-lid-int-l (rpwr-key-h (rpmicpmic-int-l (rIrebootap-warm-reset-h ( rrecovery-switchrec-mode-l ( tpmtpm-int-h (write-protectfw-wp-ap (codechp-det (rint-codec (rMmic-det ( rheadsetts3a227e-int-l (r2backlightbl-en (rchargerac-present-ap (rcros-ecec-int (r%trackpadtrackpad-int (r3usb-hosthost1-pwr-en ( rusbotg-pwren-h ( rchosen serial2:115200n8memorymemory power-button gpio-keysdefault key-power Power 1 t dgpio-restart gpio-restart 1 default  sdio-pwrseqmmc-pwrseq-simpleE  ext_clockdefault  rvcc-5vregulator-fixedrvcc_5vLK@LK@ rJvcc33-sysregulator-fixed rvcc33_sys2Z2Z rvcc50-hdmiregulator-fixed rvcc50_hdmi Jvdd-logicpwm-regulator rvdd_logic   { ~psound!rockchip,rockchip-audio-max98090default  VEYRON-I2S  2 GL ]L  t backlightpwm-backlight    default  B@   rpanelinnolux,n116bgeCokay ` !panel-timingl +V 3 @< L V c k x   portsportendpoint rxgpio-charger gpio-charger mains 1default lid-switch gpio-keysdefault switch-lid Lid 1   key-power 1vccsysregulator-fixedrvccsysrvcc5-host1-regulatorregulator-fixed  1 default  rvcc5_host1vcc5v-otg-regulatorregulator-fixed  1 default  rvcc5_host2 #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2mmc0mmc1i2c20interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaycd-gpiosrockchip,default-sample-phasesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplypinctrl-namespinctrl-0wp-gpioscap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removabledisable-wpmmc-hs200-1_8v#io-channel-cellsdmasdma-namesgoogle,cros-ec-spi-pre-delayspi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymaprx-sample-delay-nsi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedti,micbiasvcc-supplywakeup-sourcereg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphysphy-namesneeds-reset-on-resumedr_modesnps,reset-phy-on-wakesnps,need-phy-for-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clocksassigned-clock-parentsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc10-supplyvcc9-supplyvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplyaudio-supplysdcard-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointforce-hpdmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathlabellinux,codedebounce-intervalpriorityreset-gpiosvin-supplypwmspwm-supplypwm-dutycycle-rangepwm-dutycycle-unitrockchip,modelrockchip,i2s-controllerrockchip,audio-codecrockchip,hp-det-gpiosrockchip,mic-det-gpiosrockchip,headset-codecrockchip,hdmi-codecbrightness-levelsnum-interpolated-stepsdefault-brightness-levelenable-gpiospost-pwm-on-delay-mspwm-off-delay-mspower-supplybacklighthactivehfront-porchhback-porchhsync-lenhsync-activevactivevfront-porchvback-porchvsync-lenvsync-activecharger-typelinux,input-typeenable-active-highgpio