8( t%asus,rk3288-tinker-srockchip,rk3288&$7Rockchip RK3288 Asus Tinker Board Saliases=/ethernet@ff290000G/pinctrl/gpio@ff750000M/pinctrl/gpio@ff780000S/pinctrl/gpio@ff790000Y/pinctrl/gpio@ff7a0000_/pinctrl/gpio@ff7b0000e/pinctrl/gpio@ff7c0000k/pinctrl/gpio@ff7d0000q/pinctrl/gpio@ff7e0000w/pinctrl/gpio@ff7f0000}/i2c@ff650000/i2c@ff140000/i2c@ff660000/i2c@ff150000/i2c@ff160000/i2c@ff170000/mmc@ff0f0000/mmc@ff0c0000/mmc@ff0d0000/mmc@ff0e0000/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500#cpuarm,cortex-a12/3:N]@krr cpu@501#cpuarm,cortex-a12/3:N]@krrcpu@502#cpuarm,cortex-a12/3:N]@krrcpu@503#cpuarm,cortex-a12/3:N]@krropp-table-0operating-points-v2opp-126000000 opp-216000000  opp-312000000 opp-408000000Q opp-600000000#F opp-696000000)|~opp-8160000000,B@opp-1008000000<opp-1200000000Gopp-1416000000TfrOopp-1512000000ZJ opp-1608000000_"popp-1704000000epopp-1800000000kI\reserved-memorydma-unusable@fe000000/oscillator fixed-clockn6xin24m timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer/  H ka  2pclktimerdisplay-subsystemrockchip,display-subsystem> mmc@ff0c0000rockchip,rk3288-dw-mshcDр kDrv2biuciuciu-driveciu-sampleR / @3]resetiokaypzdefault mmc@ff0d0000rockchip,rk3288-dw-mshcD kEsw2biuciuciu-driveciu-sampleR !/ @3]resetiokaypdefault,9mmc@ff0e0000rockchip,rk3288-dw-mshcDр kFtx2biuciuciu-driveciu-sampleR "/@3]reset idisabledmmc@ff0f0000rockchip,rk3288-dw-mshcDр kGuy2biuciuciu-driveciu-sampleR #/@3]resetiokaypzdefaultFUsaradc@ff100000rockchip,saradc/ $bkI[2saradcapb_pclk3W ]saradc-apbiokaytspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spikAR2spiclkapb_pclk  txrx ,default !"#/ idisabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spikBS2spiclkapb_pclk txrx -default$%&'/ idisabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spikCT2spiclkapb_pclktxrx .default()*+/ idisabledi2c@ff140000rockchip,rk3288-i2c/ >2i2ckMdefault, idisabledi2c@ff150000rockchip,rk3288-i2c/ ?2i2ckOdefault- idisabledi2c@ff160000rockchip,rk3288-i2c/ @2i2ckPdefault. idisabledi2c@ff170000rockchip,rk3288-i2c/ A2i2ckQdefault/iokaytserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart/ 7kMU2baudclkapb_pclktxrxdefault0iokayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart/ 8kNV2baudclkapb_pclktxrxdefault1iokayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uart/i 9kOW2baudclkapb_pclkdefault2iokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart/ :kPX2baudclkapb_pclktxrxdefault3iokayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart/ ;kQY2baudclkapb_pclk  txrxdefault4iokaydma-controller@ff250000arm,pl330arm,primecell/%@k 2apb_pclkthermal-zonesreserve-thermal5cpu-thermald5tripscpu_alert0p#*passive6cpu_alert1$#*passive7cpu_crit_# *criticalcooling-mapsmap0.603map1.703gpu-thermald5tripsgpu_alert0p#*passive8gpu_crit_# *criticalcooling-mapsmap0.8 39tsadc@ff280000rockchip,rk3288-tsadc/( %kHZ2tsadcapb_pclk3 ]tsadc-apbinitdefaultsleep:B;L:Vl<ysiokay5ethernet@ff290000rockchip,rk3288-gmac/)macirqeth_wake_irql<8kfgc]M2stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac3B ]stmmacethiokay=inputrgmii>default? @* @'B@U0^usb@ff500000 generic-ehci/P kgAlusbiokayusb@ff520000 generic-ohci/R )kgAlusb idisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2/T k2otgvhostgB lusb2-phy~iokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2/X k2otgvotg@@ gC lusb2-phyiokayusb@ff5c0000 generic-ehci/\ k idisableddma-controller@ff600000arm,pl330arm,primecell/`@k 2apb_pclk idisabledi2c@ff650000rockchip,rk3288-i2c/e <2i2ckLdefaultDiokaypmic@1brockchip,rk808/&Exin32krk808-clkout2E E defaultFGHIJ JJ"J.J:JFR^kJxregulatorsDCDC_REG1 q\vdd_armp regulator-state-mem DCDC_REG2 Pvdd_gpupzregulator-state-mem%=B@DCDC_REG3vcc_ddrregulator-state-mem%DCDC_REG42Z2Zvcc_ioregulator-state-mem%=2ZLDO_REG1w@w@ vcc18_ldo1regulator-state-mem%=w@LDO_REG22Z2Z vcc33_mipiregulator-state-mem LDO_REG3B@B@vdd_10regulator-state-mem%=B@LDO_REG4w@w@ vcc18_codecregulator-state-mem%=w@LDO_REG5w@2Z vccio_sdregulator-state-mem%=2ZLDO_REG6B@B@ vdd10_lcdregulator-state-mem%=B@LDO_REG7w@w@vcc_18regulator-state-mem%=w@LDO_REG8w@w@ vcc18_lcdregulator-state-mem%=w@SWITCH_REG1 vcc33_sdregulator-state-mem%SWITCH_REG2 vcc33_lan>regulator-state-mem%i2c@ff660000rockchip,rk3288-i2c/f =2i2ckNdefaultKiokaypwm@ff680000rockchip,rk3288-pwm/hYdefaultLk_iokaypwm@ff680010rockchip,rk3288-pwm/hYdefaultMk_ idisabledpwm@ff680020rockchip,rk3288-pwm/h YdefaultNk_ idisabledpwm@ff680030rockchip,rk3288-pwm/h0YdefaultOk_ idisabledsram@ff700000 mmio-sram/ppsmp-sram@0rockchip,rk3066-smp-sram/sram@ff720000#rockchip,rk3288-pmu-srammmio-sram/rpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd/spower-controller!rockchip,rk3288-power-controllerdh apower-domain@9/ kchgfdehilkj$xPQRSTUVWXdpower-domain@11/ kopxYZdpower-domain@12/ kx[dpower-domain@13/ kx\]dreboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscon/tclock-controller@ff760000rockchip,rk3288-cru/vk 2xin24ml<Hjk$#gׄeрxhрxhsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd/w<edp-phyrockchip,rk3288-dp-phykh224m idisabledqio-domains"rockchip,rk3288-io-voltage-domainiokayusbphyrockchip,rk3288-usb-phyiokayusb-phy@320/ k]2phyclk3 ]phy-resetCusb-phy@334/4k^2phyclk3 ]phy-resetAusb-phy@348/Hk_2phyclk3 ]phy-resetBwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt/kp Oiokaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif/kT 2mclkhclk^tx 6default_l< idisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s/ 5kR2i2s_clki2s_hclk^^txrxdefault`/iokaycrypto@ff8a0000rockchip,rk3288-crypto/@ 0 k}2aclkhclksclkapb_pclk3 ]crypto-rstiommu@ff900800rockchip,iommu/@ k 2aclkifaceI idisablediommu@ff914000rockchip,iommu /@P k 2aclkifaceIV idisabledrga@ff920000rockchip,rk3288-rga/ kj2aclkhclksclkqa 3ilm ]coreaxiahbvop@ff930000rockchip,rk3288-vop / k2aclk_vopdclk_vophclk_vopqa 3def ]axiahbdclkbiokayport endpoint@0/cvendpoint@1/drendpoint@2/elendpoint@3/foiommu@ff930300rockchip,iommu/ k 2aclkifaceqa Iiokaybvop@ff940000rockchip,rk3288-vop / k2aclk_vopdclk_vophclk_vopqa 3 ]axiahbdclkgiokayport endpoint@0/hwendpoint@1/isendpoint@2/jmendpoint@3/kpiommu@ff940300rockchip,iommu/ k 2aclkifaceqa Iiokaygdsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi/@ k~d 2refpclkqa l< idisabledportsport@0/endpoint@0/leendpoint@1/mjport@1/lvds@ff96c000rockchip,rk3288-lvds/@kg 2pclk_lvdslcdcnqa l< idisabledportsport@0/endpoint@0/ofendpoint@1/pkport@1/dp@ff970000rockchip,rk3288-dp/@ bkic2dppclkgqldpqa 3o]dpl< idisabledportsport@0/endpoint@0/rdendpoint@1/siport@1/hdmi@ff980000rockchip,rk3288-dw-hdmi/ gkhmn2iahbisfrcecqa l<iokaytdefaultuportsport@0/endpoint@0/vcendpoint@1/whport@1/video-codec@ff9a0000rockchip,rk3288-vpu/   vepuvdpuk 2aclkhclkxqa iommu@ff9a0800rockchip,iommu/ k 2aclkifaceIqa xiommu@ff9c0440rockchip,iommu /@@@ ok 2aclkifaceI idisabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760/$ jobmmugpuk:yNqa iokayz9opp-table-1operating-points-v2yopp-100000000~opp-200000000 ~opp-300000000B@opp-400000000ׄopp-600000000#Fqos@ffaa0000rockchip,rk3288-qossyscon/ \qos@ffaa0080rockchip,rk3288-qossyscon/ ]qos@ffad0000rockchip,rk3288-qossyscon/ Qqos@ffad0100rockchip,rk3288-qossyscon/ Rqos@ffad0180rockchip,rk3288-qossyscon/ Sqos@ffad0400rockchip,rk3288-qossyscon/ Tqos@ffad0480rockchip,rk3288-qossyscon/ Uqos@ffad0500rockchip,rk3288-qossyscon/ Pqos@ffad0800rockchip,rk3288-qossyscon/ Vqos@ffad0880rockchip,rk3288-qossyscon/ Wqos@ffad0900rockchip,rk3288-qossyscon/ Xqos@ffae0000rockchip,rk3288-qossyscon/ [qos@ffaf0000rockchip,rk3288-qossyscon/ Yqos@ffaf0080rockchip,rk3288-qossyscon/ Zdma-controller@ffb20000arm,pl330arm,primecell/@k 2apb_pclk^efuse@ffb40000rockchip,rk3288-efuse/ kq 2pclk_efusecpu-id@7/cpu_leakage@17/interrupt-controller@ffc01000 arm,gic-400@/ @ `   pinctrlrockchip,rk3288-pinctrll<gpio@ff750000rockchip,gpio-bank/u Qk@Egpio@ff780000rockchip,gpio-bank/x RkAgpio@ff790000rockchip,gpio-bank/y SkBgpio@ff7a0000rockchip,gpio-bank/z TkCgpio@ff7b0000rockchip,gpio-bank/{ UkD@gpio@ff7c0000rockchip,gpio-bank/| VkEgpio@ff7d0000rockchip,gpio-bank/} WkFgpio@ff7e0000rockchip,gpio-bank/~ XkGgpio@ff7f0000rockchip,gpio-bank/ YkHhdmihdmi-cec-c0{uhdmi-cec-c7{hdmi-ddc {{hdmi-ddc-unwedge |{pcfg-output-low|pcfg-pull-up }pcfg-pull-down ~pcfg-pull-none %{pcfg-pull-none-12ma % 2 suspendglobal-pwroff{Gddrio-pwroff{ddr0-retention}ddr1-retention}edpedp-hpd ~i2c0i2c0-xfer {{Di2c1i2c1-xfer {{,i2c2i2c2-xfer  { {Ki2c3i2c3-xfer {{-i2c4i2c4-xfer {{.i2c5i2c5-xfer {{/i2s0i2s0-bus`{{{{{{`lcdclcdc-ctl@{{{{nsdmmcsdmmc-clk sdmmc-cmdsdmmc-cd}sdmmc-bus1}sdmmc-bus4@sdmmc-pwr {sdio0sdio0-bus1}sdio0-bus4@}}}}sdio0-cmd}sdio0-clk{sdio0-cd}sdio0-wp}sdio0-pwr}sdio0-bkpwr}sdio0-int}sdio1sdio1-bus1}sdio1-bus4@}}}}sdio1-cd}sdio1-wp}sdio1-bkpwr}sdio1-int}sdio1-cmd}sdio1-clk{sdio1-pwr }emmcemmc-clk{emmc-cmd}emmc-pwr }emmc-bus1}emmc-bus4@}}}}emmc-bus8}}}}}}}}spi0spi0-clk } spi0-cs0 }#spi0-tx}!spi0-rx}"spi0-cs1}spi1spi1-clk }$spi1-cs0 }'spi1-rx}&spi1-tx}%spi2spi2-cs1}spi2-clk}(spi2-cs0}+spi2-rx}*spi2-tx })uart0uart0-xfer }{0uart0-cts}uart0-rts{uart1uart1-xfer } {1uart1-cts }uart1-rts {uart2uart2-xfer }{2uart3uart3-xfer }{3uart3-cts }uart3-rts {uart4uart4-xfer }{4uart4-cts }uart4-rts {tsadcotp-pin {:otp-out {;pwm0pwm0-pin{Lpwm1pwm1-pin{Mpwm2pwm2-pin{Npwm3pwm3-pin{Ogmacrgmii-pins{{{{{{{ {{?rmii-pins{{{{{{{{{{spdifspdif-tx {_pcfg-pull-none-drv-8ma 2pcfg-pull-up-drv-8ma  2backlightbl-en{buttonspwrbtn}eth_phyeth-phy-pwr{pmicpmic-int}Fdvs-1 ~Hdvs-2 ~Iusbhost-vbus-drv{pwr-3g{sdiowifi-enable {{chosen Aserial2:115200n8memory/#memoryexternal-gmac-clock fixed-clocksY@ ext_gmac=gpio-keys gpio-keys Mdefaultbutton E Xt cGPIO Key Power i zdgpio-leds gpio-ledsled-0  mmc0led-1  heartbeatled-2 E default-onsdio-pwrseqmmc-pwrseq-simplek 2ext_clockdefault @@soundsimple-audio-card i2s rockchip,tinker-codec simple-audio-card,codec simple-audio-card,cpu vsys-regulatorregulator-fixedvcc_sysLK@LK@Jsdmmc-regulatorregulator-fixed % defaultvcc_sd2Z2Z   #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedbroken-cddisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50mmc-hs200-1_8vmmc-ddr-1_8v#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-modephy-supplysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizedvs-gpiosrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellssdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthstdout-pathautorepeatlinux,codelabellinux,input-typedebounce-intervallinux,default-triggerreset-gpiossimple-audio-card,formatsimple-audio-card,namesimple-audio-card,mclk-fssound-daistartup-delay-usvin-supply