t8( X.firefly,firefly-rk3288-reloadrockchip,rk3288&7Firefly-RK3288-reloadaliases=/ethernet@ff290000G/pinctrl/gpio@ff750000M/pinctrl/gpio@ff780000S/pinctrl/gpio@ff790000Y/pinctrl/gpio@ff7a0000_/pinctrl/gpio@ff7b0000e/pinctrl/gpio@ff7c0000k/pinctrl/gpio@ff7d0000q/pinctrl/gpio@ff7e0000w/pinctrl/gpio@ff7f0000}/i2c@ff650000/i2c@ff140000/i2c@ff660000/i2c@ff150000/i2c@ff160000/i2c@ff170000/mmc@ff0f0000/mmc@ff0c0000/mmc@ff0d0000/mmc@ff0e0000/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500#cpuarm,cortex-a12/3:N]@krr cpu@501#cpuarm,cortex-a12/3:N]@krrcpu@502#cpuarm,cortex-a12/3:N]@krrcpu@503#cpuarm,cortex-a12/3:N]@krropp-table-0operating-points-v2opp-126000000 opp-216000000  opp-312000000 opp-408000000Q opp-600000000#F opp-696000000)|~opp-8160000000,B@opp-1008000000<opp-1200000000Gopp-1416000000TfrOopp-1512000000ZJ opp-1608000000_"preserved-memorydma-unusable@fe000000/oscillator fixed-clockn6xin24m timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer/  H ka  2pclktimerdisplay-subsystemrockchip,display-subsystem> mmc@ff0c0000rockchip,rk3288-dw-mshcDр kDrv2biuciuciu-driveciu-sampleR / @3]resetiokaypzdefault mmc@ff0d0000rockchip,rk3288-dw-mshcDр kEsw2biuciuciu-driveciu-sampleR !/ @3]resetiokaypdefault+8mmc@ff0e0000rockchip,rk3288-dw-mshcDр kFtx2biuciuciu-driveciu-sampleR "/@3]reset idisabledmmc@ff0f0000rockchip,rk3288-dw-mshcDр kGuy2biuciuciu-driveciu-sampleR #/@3]resetiokaypzERdefaultsaradc@ff100000rockchip,saradc/ $akI[2saradcapb_pclk3W ]saradc-apbiokaysspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spikAR2spiclkapb_pclk txrx ,default!"#$/ idisabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spikBS2spiclkapb_pclk txrx -default%&'(/ idisabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spikCT2spiclkapb_pclk  txrx .default)*+,/ idisabledi2c@ff140000rockchip,rk3288-i2c/ >2i2ckMdefault- idisabledi2c@ff150000rockchip,rk3288-i2c/ ?2i2ckOdefault. idisabledi2c@ff160000rockchip,rk3288-i2c/ @2i2ckPdefault/ idisabledi2c@ff170000rockchip,rk3288-i2c/ A2i2ckQdefault0iokay}serial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart/ 7kMU2baudclkapb_pclk  txrxdefault 123iokayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart/ 8kNV2baudclkapb_pclk  txrxdefault4iokayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uart/i 9kOW2baudclkapb_pclkdefault5iokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart/ :kPX2baudclkapb_pclk  txrxdefault6iokayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart/ ;kQY2baudclkapb_pclk txrxdefault7 idisableddma-controller@ff250000arm,pl330arm,primecell/%@k 2apb_pclk thermal-zonesreserve-thermal8cpu-thermald8tripscpu_alert0p"*passive9cpu_alert1$"*passive:cpu_crit_" *criticalcooling-mapsmap0-902map1-:02gpu-thermald8tripsgpu_alert0p"*passive;gpu_crit_" *criticalcooling-mapsmap0-; 2<tsadc@ff280000rockchip,rk3288-tsadc/( %kHZ2tsadcapb_pclk3 ]tsadc-apbinitdefaultsleep=A>K=Uk?xsiokay8ethernet@ff290000rockchip,rk3288-gmac/)macirqeth_wake_irqk?8kfgc]M2stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac3B ]stmmacethiokay@inputdefaultABCDErgmii /'B@ DFT0]usb@ff500000 generic-ehci/P kfGkusb idisabledusb@ff520000 generic-ohci/R )kfGkusb idisabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2/T k2otguhostfH kusb2-phy}iokaydefaultIusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2/X k2otguotg@@ fJ kusb2-phyiokayusb@ff5c0000 generic-ehci/\ k idisableddma-controller@ff600000arm,pl330arm,primecell/`@k 2apb_pclk idisabledi2c@ff650000rockchip,rk3288-i2c/e <2i2ckLdefaultKiokaysyr827@40silergy,syr827/@vdd_cpu Pp 4F,b@wL syr828@41silergy,syr828/Avdd_gpu Pp wLact8846@5aactive-semi,act8846/ZdefaultMNLLLLLLOregulatorsREG1vcc_ddrOO REG2vcc_io2Z2Z REG3vdd_log REG4vcc_20 OREG5 vccio_sd2Z2ZREG6 vdd10_lcdB@B@ REG7vcca_18w@w@ REG8vcca_332Z2Z SREG9 vcca_lan2Z2ZEREG10vdd_10B@B@ REG11vcc_18w@w@REG12 vcc18_lcdw@w@ hym8563@51haoyu,hym8563/Qxin32k&PdefaultQi2c@ff660000rockchip,rk3288-i2c/f =2i2ckNdefaultRiokayes8328@10everest,es8328SSSSkR2i2s_hclki2s_clk/pwm@ff680000rockchip,rk3288-pwm/hdefaultTk_ idisabledpwm@ff680010rockchip,rk3288-pwm/hdefaultUk_ idisabledpwm@ff680020rockchip,rk3288-pwm/h defaultVk_ idisabledpwm@ff680030rockchip,rk3288-pwm/h0defaultWk_ idisabledsram@ff700000 mmio-sram/ppsmp-sram@0rockchip,rk3066-smp-sram/sram@ff720000#rockchip,rk3288-pmu-srammmio-sram/rpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfd/spower-controller!rockchip,rk3288-power-controller&h jpower-domain@9/ kchgfdehilkj$:XYZ[\]^_`&power-domain@11/ kop:ab&power-domain@12/ k:c&power-domain@13/ k:de&reboot-modesyscon-reboot-modeAHRBTRBbRB rRBsyscon@ff740000rockchip,rk3288-sgrfsyscon/tclock-controller@ff760000rockchip,rk3288-cru/vk 2xin24mk?~Hjk$#gׄeрxhрxhsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfd/w?edp-phyrockchip,rk3288-dp-phykh224m idisabledzio-domains"rockchip,rk3288-io-voltage-domainiokayfE!usbphyrockchip,rk3288-usb-phyiokayusb-phy@320/ k]2phyclk3 ]phy-resetJusb-phy@334/4k^2phyclk3 ]phy-resetGusb-phy@348/Hk_2phyclk3 ]phy-resetHwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt/kp Oiokaysound@ff8b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif/-kT 2mclkhclkgtx 6defaulthk?iokayi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s/- 5kR2i2s_clki2s_hclkggtxrxdefaulti>Yiokaycrypto@ff8a0000rockchip,rk3288-crypto/@ 0 k}2aclkhclksclkapb_pclk3 ]crypto-rstiommu@ff900800rockchip,iommu/@ k 2aclkifaces idisablediommu@ff914000rockchip,iommu /@P k 2aclkifaces idisabledrga@ff920000rockchip,rk3288-rga/ kj2aclkhclksclkj 3ilm ]coreaxiahbvop@ff930000rockchip,rk3288-vop / k2aclk_vopdclk_vophclk_vopj 3def ]axiahbdclkkiokayport endpoint@0/lendpoint@1/m{endpoint@2/nuendpoint@3/oxiommu@ff930300rockchip,iommu/ k 2aclkifacej siokaykvop@ff940000rockchip,rk3288-vop / k2aclk_vopdclk_vophclk_vopj 3 ]axiahbdclkpiokayport endpoint@0/qendpoint@1/r|endpoint@2/svendpoint@3/tyiommu@ff940300rockchip,iommu/ k 2aclkifacej siokaypdsi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi/@ k~d 2refpclkj k? idisabledportsport@0/endpoint@0/unendpoint@1/vsport@1/lvds@ff96c000rockchip,rk3288-lvds/@kg 2pclk_lvdslcdcwj k? idisabledportsport@0/endpoint@0/xoendpoint@1/ytport@1/dp@ff970000rockchip,rk3288-dp/@ bkic2dppclkfzkdpj 3o]dpk? idisabledportsport@0/endpoint@0/{mendpoint@1/|rport@1/hdmi@ff980000rockchip,rk3288-dw-hdmi/ gkhmn2iahbisfrcecj k?-iokay}default~portsport@0/endpoint@0/lendpoint@1/qport@1/video-codec@ff9a0000rockchip,rk3288-vpu/   vepuvdpuk 2aclkhclkj iommu@ff9a0800rockchip,iommu/ k 2aclkifacesj iommu@ff9c0440rockchip,iommu /@@@ ok 2aclkifaces idisabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760/$ jobmmugpuk:Nj  idisabled<opp-table-1operating-points-v2opp-100000000~opp-200000000 ~opp-300000000B@opp-400000000ׄopp-600000000#Fqos@ffaa0000rockchip,rk3288-qossyscon/ dqos@ffaa0080rockchip,rk3288-qossyscon/ eqos@ffad0000rockchip,rk3288-qossyscon/ Yqos@ffad0100rockchip,rk3288-qossyscon/ Zqos@ffad0180rockchip,rk3288-qossyscon/ [qos@ffad0400rockchip,rk3288-qossyscon/ \qos@ffad0480rockchip,rk3288-qossyscon/ ]qos@ffad0500rockchip,rk3288-qossyscon/ Xqos@ffad0800rockchip,rk3288-qossyscon/ ^qos@ffad0880rockchip,rk3288-qossyscon/ _qos@ffad0900rockchip,rk3288-qossyscon/ `qos@ffae0000rockchip,rk3288-qossyscon/ cqos@ffaf0000rockchip,rk3288-qossyscon/ aqos@ffaf0080rockchip,rk3288-qossyscon/ bdma-controller@ffb20000arm,pl330arm,primecell/@k 2apb_pclkgefuse@ffb40000rockchip,rk3288-efuse/ kq 2pclk_efusecpu-id@7/cpu_leakage@17/interrupt-controller@ffc01000 arm,gic-400@/ @ `   pinctrlrockchip,rk3288-pinctrlk?gpio@ff750000rockchip,gpio-bank/u Qk@ gpio@ff780000rockchip,gpio-bank/x RkA gpio@ff790000rockchip,gpio-bank/y SkB gpio@ff7a0000rockchip,gpio-bank/z TkC gpio@ff7b0000rockchip,gpio-bank/{ UkD Fgpio@ff7c0000rockchip,gpio-bank/| VkE gpio@ff7d0000rockchip,gpio-bank/} WkF gpio@ff7e0000rockchip,gpio-bank/~ XkG Pgpio@ff7f0000rockchip,gpio-bank/ YkH hdmihdmi-cec-c0 ~hdmi-cec-c7 hdmi-ddc hdmi-ddc-unwedge pcfg-output-low pcfg-pull-up 'pcfg-pull-down 4pcfg-pull-none Cpcfg-pull-none-12ma C P suspendglobal-pwroff ddrio-pwroff ddr0-retention ddr1-retention edpedp-hpd  i2c0i2c0-xfer Ki2c1i2c1-xfer -i2c2i2c2-xfer   Ri2c3i2c3-xfer .i2c4i2c4-xfer /i2c5i2c5-xfer 0i2s0i2s0-bus` ilcdclcdc-ctl@ wsdmmcsdmmc-clk  sdmmc-cmd sdmmc-cd sdmmc-bus1 sdmmc-bus4@ sdmmc-pwr  sdio0sdio0-bus1 sdio0-bus4@ sdio0-cmd sdio0-clk sdio0-cd sdio0-wp sdio0-pwr sdio0-bkpwr sdio0-int sdio1sdio1-bus1 sdio1-bus4@ sdio1-cd sdio1-wp sdio1-bkpwr sdio1-int sdio1-cmd sdio1-clk sdio1-pwr  emmcemmc-clk emmc-cmd emmc-pwr  emmc-bus1 emmc-bus4@ emmc-bus8 spi0spi0-clk  !spi0-cs0  $spi0-tx "spi0-rx #spi0-cs1 spi1spi1-clk  %spi1-cs0  (spi1-rx 'spi1-tx &spi2spi2-cs1 spi2-clk )spi2-cs0 ,spi2-rx +spi2-tx  *uart0uart0-xfer 1uart0-cts 2uart0-rts 3uart1uart1-xfer  4uart1-cts  uart1-rts  uart2uart2-xfer 5uart3uart3-xfer 6uart3-cts  uart3-rts  uart4uart4-xfer 7uart4-cts  uart4-rts  tsadcotp-pin  =otp-out  >pwm0pwm0-pin Tpwm1pwm1-pin Upwm2pwm2-pin Vpwm3pwm3-pin Wgmacrgmii-pins  Armii-pins phy-int  Dphy-pmeb Cphy-rst Bspdifspdif-tx  hpcfg-output-high _pcfg-pull-up-drv-12ma ' P act8846pwr-hold Npmic-vsel Mirir-int dvpdvp-pwr  cif-pwr  hym8563rtc-int Qkeyspwr-key ledspower-led-pin work-led-pin sdiowifi-enable usb_hosthost-vbus-drv usbhub-rst Iusb_otgotg-vbus-drv  memory@0#memory/external-gmac-clock fixed-clocksY@ ext_gmac@flash-regulatorregulator-fixed vcc_flashw@w@wadc-keys adc-keys k wbuttons w@button-recovery Recovery h gpio-keys gpio-keyskey-power   GPIO Power tdefaultir-receivergpio-ir-receiver Pleds gpio-ledsled-0  firefly:blue:powerdefault led-1  firefly:blue:user rc-feedbackdefaultsdio-pwrseqmmc-pwrseq-simplek 2ext_clockdefault Fsoundsimple-audio-card SPDIFsimple-audio-card,dai-link@1cpu *codec *spdif-outlinux,spdif-dit-usb-host-regulatorregulator-fixed 4 Odefault vcc_host_5vLK@LK@ wLvsys-regulatorregulator-fixedvcc_5vLK@LK@ 4Lsdmmc-regulatorregulator-fixed OP defaultvcc_sd2Z2Z Gwusb-otg-regulatorregulator-fixed 4 O default vcc_otg_5vLK@LK@ wLdovdd-1v8-regulatorregulator-fixed 4 O default dovdd_1v8w@w@wfvcc28-dvp-regulatorregulator-fixed 4 O default vcc28_dvp**waf_28-regulatorregulator-fixed 4 OP default dvdd_1v2OOwwifi-regulatorregulator-fixedvbat_wl2Z2Zw #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7gpio8i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltrangesclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendclock-namesportsmax-frequencyfifo-depthreset-namesstatusbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplycap-sdio-irqmmc-pwrseqnon-removablesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-ddr50mmc-ddr-1_8vmmc-hs200-1_8v#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-width#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplysystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supplyDVDD-supplyAVDD-supplyPVDD-supplyHPVDD-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltwakeup-sourcegpiospanic-indicatorlinux,default-triggerreset-gpiossimple-audio-card,namesound-daienable-active-highstartup-delay-us