8( bKgoogle,veyron-brain-rev0google,veyron-braingoogle,veyronrockchip,rk3288& 7Google Brainaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12hw@\@p@ @@OOa sB@ ~ ' 9 K 0 $@29Ecpu@501cpuarm,cortex-a12Ecpu@502cpuarm,cortex-a12Ecpu@503cpuarm,cortex-a12Eamba simple-busMdma-controller@ff250000arm,pl330arm,primecell%@T_2 zapb_pclkEdma-controller@ff600000arm,pl330arm,primecell`@T_2 zapb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@T_2 zapb_pclkESreserved-memoryMdma-unusable@fe000000oscillator fixed-clockn6xin24mE timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 2 a ztimerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 2Drvzbiuciuciu-driveciu-sample  @reset disableddwmmc@ff0d0000rockchip,rk3288-dw-mshcр 2Eswzbiuciuciu-driveciu-sample ! @resetokay '4J Ucdefault q {dwmmc@ff0e0000rockchip,rk3288-dw-mshcр 2Ftxzbiuciuciu-driveciu-sample "@reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 2Guyzbiuciuciu-driveciu-sample #@resetokay JUcdefault qsaradc@ff100000rockchip,saradc $2I[zsaradcapb_pclkW saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2ARzspiclkapb_pclk%  *txrx ,cdefaultq disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BSzspiclkapb_pclk% *txrx -cdefaultq disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CTzspiclkapb_pclk%*txrx .cdefaultq !"okay4 flash@0jedec,spi-norGi2c@ff140000rockchip,rk3288-i2c >zi2c2Mcdefaultq#okayY2qdtpm@20infineon,slb9645tt i2c@ff150000rockchip,rk3288-i2c ?zi2c2Ocdefaultq$ disabledi2c@ff160000rockchip,rk3288-i2c @zi2c2Pcdefaultq%okayY2q,i2c@ff170000rockchip,rk3288-i2c Azi2c2Qcdefaultq&okayY,qEiserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 72MUzbaudclkapb_pclkcdefault q'()okayMlserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 82NVzbaudclkapb_pclkcdefaultq*okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 92OWzbaudclkapb_pclkcdefaultq+okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :2PXzbaudclkapb_pclkcdefaultq, disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;2QYzbaudclkapb_pclkcdefaultq- disabledthermal-zonesreserve_thermal.cpu_thermald.tripscpu_alert0ppassiveE/cpu_alert1$passiveE0cpu_crit_ criticalcooling-mapsmap0'/ ,map1'0 ,gpu_thermald.tripsgpu_alert0ppassiveE1gpu_crit_ criticalcooling-mapsmap0'1 ,tsadc@ff280000rockchip,rk3288-tsadc( %2HZztsadcapb_pclk tsadc-apbcinitdefaultsleepq2;3E2Oesokay|E.ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq482fgc]Mzstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmaceth disabledusb@ff500000 generic-ehciP 2zusbhost5usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2zotghost6 usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2zotghost @@ 7 usb2-phyokayz(7usb@ff5c0000 generic-ehci\ 2zusbhost disabledi2c@ff650000rockchip,rk3288-i2ce <zi2c2Lcdefaultq8okayY2qdpmic@1brockchip,rk808xin32kwifibt_32kin&9cdefault q:;<?`nz=> >ExregulatorsDCDC_REG1vdd_arm q' ?qEregulator-state-memTDCDC_REG2vdd_gpu 5'?qEmregulator-state-memmB@DCDC_REG3 vcc135_ddrregulator-state-memmDCDC_REG4vcc_18w@'w@Eregulator-state-memmw@LDO_REG3vdd_10B@'B@regulator-state-memmB@LDO_REG7 vdd10_lcdB@'B@regulator-state-memTSWITCH_REG1 vcc33_lcdERregulator-state-memTSWITCH_REG2 vcc18_hdmii2c@ff660000rockchip,rk3288-i2cf =zi2c2Ncdefaultq?okayY2q pwm@ff680000rockchip,rk3288-pwmhcdefaultq@2^zpwm disabledpwm@ff680010rockchip,rk3288-pwmhcdefaultqA2^zpwmokaypwm@ff680020rockchip,rk3288-pwmh cdefaultqB2^zpwm disabledpwm@ff680030rockchip,rk3288-pwmh0cdefaultqC2^zpwm disabledbus_intmem@ff700000 mmio-srampMpsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsEpower-controller!rockchip,rk3288-power-controllerh( EVpd_vio@9 2chgfdehilkj$DEFGHIJKLpd_hevc@11 2opMNpd_video@12 2Opd_gpu@13 2PQreboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv4#Hjk$#gׄeрxhрxhEsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwE4edp-phyrockchip,rk3288-dp-phy2hz24m0 disabledEfio-domains"rockchip,rk3288-io-voltage-domainokay;=EP^=n=|Rusbphyrockchip,rk3288-usb-phyokayusb-phy@3200 2]zphyclkE7usb-phy@334042^zphyclkE5usb-phy@3480H2_zphyclkE6watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt2p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif zhclkmclk2T%S*tx 6cdefaultqT4 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5%SS*txrxzi2s_hclki2s_clk2RcdefaultqU disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 2}zaclkhclksclkapb_pclk crypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu disablediommu@ff914000rockchip,iommu @P isp_mmu disabledrga@ff920000rockchip,rk3288-rga 2jzaclkhclksclkV ilm coreaxiahbvop@ff930000rockchip,rk3288-vop 2zaclk_vopdclk_vophclk_vopV def axiahbdclkWokayportE endpoint@0XEjendpoint@1YEgendpoint@2ZEaendpoint@3[Ediommu@ff930300rockchip,iommu  vopb_mmuV okayEWvop@ff940000rockchip,rk3288-vop 2zaclk_vopdclk_vophclk_vopV  axiahbdclk\ disabledportE endpoint@0]Ekendpoint@1^Ehendpoint@2_Ebendpoint@3`Eeiommu@ff940300rockchip,iommu  vopl_mmuV  disabledE\mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 2~d zrefpclkV 4 disabledportsportendpoint@0aEZendpoint@1bE_lvds@ff96c000rockchip,rk3288-lvds@2g zpclk_lvdsclcdcqcV 4 disabledportsport@0endpoint@0dE[endpoint@1eE`dp@ff970000rockchip,rk3288-dp@ b2iczdppclkfdpodp4 disabledportsport@0endpoint@0gEYendpoint@1hE^hdmi@ff980000rockchip,rk3288-dw-hdmi4 g2hmnziahbisfrcecV okay'iportsportendpoint@0jEXendpoint@1kE]iommu@ff9a0800rockchip,iommu vpu_mmu disablediommu@ff9c0440rockchip,iommu @@@ o hevc_mmu disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu23lV okayGmgpu-opp-tableoperating-points-v2Elopp@100000000SZ~opp@200000000S Z~opp@300000000SZB@opp@400000000SׄZopp@500000000SeZOopp@600000000S#FZqos@ffaa0000syscon EPqos@ffaa0080syscon EQqos@ffad0000syscon EEqos@ffad0100syscon EFqos@ffad0180syscon EGqos@ffad0400syscon EHqos@ffad0480syscon EIqos@ffad0500syscon EDqos@ffad0800syscon EJqos@ffad0880syscon EKqos@ffad0900syscon ELqos@ffae0000syscon EOqos@ffaf0000syscon EMqos@ffaf0080syscon ENinterrupt-controller@ffc01000 arm,gic-400h}@ @ `   Eefuse@ffb40000rockchip,rk3288-efuse 2q zpclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl4Mcdefaultsleepqn;ngpio0@ff750000rockchip,gpio-banku Q2@h}E9gpio1@ff780000rockchip,gpio-bankx R2Ah}gpio2@ff790000rockchip,gpio-banky S2Bh}Ewgpio3@ff7a0000rockchip,gpio-bankz T2Ch}gpio4@ff7b0000rockchip,gpio-bank{ U2Dh}E{gpio5@ff7c0000rockchip,gpio-bank| V2Eh}gpio6@ff7d0000rockchip,gpio-bank} W2Fh}gpio7@ff7e0000rockchip,gpio-bank~ X2Gh}E>gpio8@ff7f0000rockchip,gpio-bank Y2Hh}hdmihdmi-cec-c0ohdmi-cec-c7ohdmi-ddc oovcc50-hdmi-enoE}pcfg-pull-upEppcfg-pull-downEqpcfg-pull-noneEopcfg-pull-none-12ma Essleepglobal-pwroffoEnddrio-pwroffoddr0-retentionpddr1-retentionpedpedp-hpd qi2c0i2c0-xfer ooE8i2c1i2c1-xfer ooE#i2c2i2c2-xfer  o oE?i2c3i2c3-xfer ooE$i2c4i2c4-xfer ooE%i2c5i2c5-xfer ooE&i2s0i2s0-bus`ooooooEUlcdclcdc-ctl@ooooEcsdmmcsdmmc-clkosdmmc-cmdpsdmmc-cdpsdmmc-bus1psdmmc-bus4@ppppsdio0sdio0-bus1psdio0-bus4@rrrrEsdio0-cmdrEsdio0-clkrE sdio0-cdpsdio0-wppsdio0-pwrpsdio0-bkpwrpsdio0-intpwifienable-hoEzbt-enable-loEysdio1sdio1-bus1psdio1-bus4@ppppsdio1-cdpsdio1-wppsdio1-bkpwrpsdio1-intpsdio1-cmdpsdio1-clkosdio1-pwr pemmcemmc-clkrEemmc-cmdrEemmc-pwr pemmc-bus1pemmc-bus4@ppppemmc-bus8rrrrrrrrEemmc-reset oEvspi0spi0-clk pEspi0-cs0 pEspi0-txpEspi0-rxpEspi0-cs1pspi1spi1-clk pEspi1-cs0 pEspi1-rxpEspi1-txpEspi2spi2-cs1pspi2-clkpEspi2-cs0pE"spi2-rxpE!spi2-tx pE uart0uart0-xfer poE'uart0-ctspE(uart0-rtsoE)uart1uart1-xfer p oE*uart1-cts puart1-rts ouart2uart2-xfer poE+uart3uart3-xfer poE,uart3-cts puart3-rts ouart4uart4-xfer  p oE-uart4-ctspuart4-rtsotsadcotp-gpio oE2otp-out oE3pwm0pwm0-pinoE@pwm1pwm1-pinoEApwm2pwm2-pinoEBpwm3pwm3-pinoECgmacrgmii-pinsoooossssooo ssoormii-pinsoooooooooospdifspdif-tx oETpcfg-pull-none-drv-8maErpcfg-pull-up-drv-8mapcfg-output-highpcfg-output-lowbuttonspwr-key-lpEtpmicpmic-int-lpE:dvs-1 qE;dvs-2qE<rebootap-warm-reset-h oEurecovery-switchrec-mode-l ptpmtpm-int-howrite-protectfw-wp-apousb-hostusb2-pwr-en oE~memory@0memorygpio-keys gpio-keyscdefaultqtpower Power 9 t d`gpio-restart gpio-restart 9 cdefaultqu *emmc-pwrseqmmc-pwrseq-emmcqvcdefault 3w Esdio-pwrseqmmc-pwrseq-simple2x zext_clockcdefaultqyz 3{E vcc-5vregulator-fixedvcc_5vLK@'LK@E|vcc33-sysregulator-fixed vcc33_sys2Z'2Z ?|Evcc50-hdmiregulator-fixed vcc50_hdmi ?| J ]>cdefaultq}vcc33_ioregulator-fixed vcc33_io ?E=vcc5-host2-regulatorregulator-fixed J ]9 cdefaultq~ vcc5_host2 #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplyphandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablepinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplycap-mmc-highspeedrockchip,default-sample-phasedisable-wpmmc-hs200-1_8v#io-channel-cellsdmasdma-namesrx-sample-delay-nsspi-max-frequencyi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedreg-shiftreg-io-widthassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphysphy-namesneeds-reset-on-resumedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clock-parentsrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplydvs-gpiosregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltregulator-suspend-mem-disabled#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cells#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busoperating-points-v2mali-supplyopp-hzopp-microvoltinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowlabellinux,codedebounce-intervalpriorityreset-gpiosvin-supplyenable-active-highgpio