84( o*rockchip,rk3288-evb-rk808rockchip,rk3288&7Rockchip RK3288 EVB RK808aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/mmc@ff0f0000k/mmc@ff0c0000q/mmc@ff0d0000w/mmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5<rV bcpu@501cpuarm,cortex-a12'@5<rbcpu@502cpuarm,cortex-a12'@5<rbcpu@503cpuarm,cortex-a12'@5<rbcpu-opp-tableoperating-points-v2jbopp-126000000u| opp-216000000u | opp-312000000u| opp-408000000uQ| opp-600000000u#F| opp-696000000u)||~opp-816000000u0,|B@opp-1008000000u<|opp-1200000000uG|opp-1416000000uTfr|Oopp-1512000000uZJ| opp-1608000000u_"|pbus simple-busdma-controller@ff250000arm,pl330arm,primecell%@5 apb_pclkbdma-controller@ff600000arm,pl330arm,primecell`@5 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@5 apb_pclkbWreserved-memorydma-unusable@fe000000oscillator fixed-clockn6xin24mb timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 5 a timerpclkdisplay-subsystemrockchip,display-subsystem5 mmc@ff0c0000rockchip,rk3288-dw-mshc;р 5Drvbiuciuciu-driveciu-sampleI  @Tresetokay`j|default mmc@ff0d0000rockchip,rk3288-dw-mshc;р 5Eswbiuciuciu-driveciu-sampleI ! @Treset disabledmmc@ff0e0000rockchip,rk3288-dw-mshc;р 5Ftxbiuciuciu-driveciu-sampleI "@Treset disabledmmc@ff0f0000rockchip,rk3288-dw-mshc;р 5Guybiuciuciu-driveciu-sampleI #@Tresetokay`jdefaultsaradc@ff100000rockchip,saradc $5I[saradcapb_pclkW Tsaradc-apbokayb{spi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclk   txrx ,default disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclk  txrx -default  disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclk txrx .default!"#$ disabledi2c@ff140000rockchip,rk3288-i2c >i2c5Mdefault% disabledi2c@ff150000rockchip,rk3288-i2c ?i2c5Odefault& disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pdefault' disabledi2c@ff170000rockchip,rk3288-i2c Ai2c5Qdefault(okaybnserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7 5MUbaudclkapb_pclk txrxdefault)okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8 5NVbaudclkapb_pclk txrxdefault*okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9 5OWbaudclkapb_pclkdefault+okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart : 5PXbaudclkapb_pclk txrxdefault,okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ; 5QYbaudclkapb_pclk   txrxdefault-okaythermal-zonesreserve_thermal-CQ.cpu_thermal-dCQ.tripscpu_alert0apmpassiveb/cpu_alert1a$mpassiveb0cpu_crita_m criticalcooling-mapsmap0x/0}map1x00}gpu_thermal-dCQ.tripsgpu_alert0apmpassiveb1gpu_crita_m criticalcooling-mapsmap0x1 }2tsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk Ttsadc-apbinitdefaultsleep3435sokayb.ethernet@ff290000rockchip,rk3288-gmac) macirqeth_wake_irq585fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB Tstmmacethok6'rgmii0input =7M c'B@x8default90usb@ff500000 generic-ehciP 5:usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otghost; usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otgotg@@ < usb2-phy disabledusb@ff5c0000 generic-ehci\ 5 disabledi2c@ff650000rockchip,rk3288-i2ce <i2c5Ldefault=okaypmic@1brockchip,rk808&>default?@0xin32krk808-clkout2>AJAVAbAnAzABBABCregulatorsDCDC_REG1 qp(vdd_armb regulator-state-mem7DCDC_REG2 P(vdd_gpubsregulator-state-memPhB@DCDC_REG3(vcc_ddrregulator-state-memPDCDC_REG42Z2Z(vcc_iobBregulator-state-memPh2ZLDO_REG12Z2Z (vccio_pmubCregulator-state-memPh2ZLDO_REG22Z2Z(vcc_tpregulator-state-mem7LDO_REG3B@B@(vdd_10regulator-state-memPhB@LDO_REG4w@w@ (vcc18_lcdregulator-state-memPhw@LDO_REG5w@2Z (vccio_sdbregulator-state-memPh2ZLDO_REG6B@B@ (vdd10_lcdregulator-state-memPhB@LDO_REG7w@w@(vcc_18bregulator-state-memPhw@LDO_REG82Z2Z (vcca_codecregulator-state-memPh2ZSWITCH_REG1(vcc_wlregulator-state-memPSWITCH_REG2(vcc_lcdbregulator-state-memPi2c@ff660000rockchip,rk3288-i2cf =i2c5NdefaultD disabledpwm@ff680000rockchip,rk3288-pwmhdefaultE5_pwmokayb~pwm@ff680010rockchip,rk3288-pwmhdefaultF5_pwm disabledpwm@ff680020rockchip,rk3288-pwmh defaultG5_pwm disabledpwm@ff680030rockchip,rk3288-pwmh0defaultH5_pwm disabledsram@ff700000 mmio-sramppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsbpower-controller!rockchip,rk3288-power-controllerxh bZpd_vio@9 5chgfdehilkj$IJKLMNOPQpd_hevc@11 5opRSpd_video@12 5Tpd_gpu@13 5UVreboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv5Hxjk$#gׄeрxhрxhbsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwb5edp-phyrockchip,rk3288-dp-phy5h24m okaybjio-domains"rockchip,rk3288-io-voltage-domain disabledusbphyrockchip,rk3288-usb-phyokayusb-phy@320  5]phyclk Tphy-resetb<usb-phy@334 45^phyclk Tphy-resetb:usb-phy@348 H5_phyclk Tphy-resetb;watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif5T mclkhclkW tx 6defaultX5 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 55Ri2s_clki2s_hclkWW txrxdefaultY%@ disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk Tcrypto-rstokayiommu@ff900800rockchip,iommu@  iep_mmu5 aclkifaceZ disablediommu@ff914000rockchip,iommu @P  isp_mmu5 aclkifaceZg disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclkZ ilm Tcoreaxiahbvop@ff930000rockchip,rk3288-vop  5aclk_vopdclk_vophclk_vopZ def Taxiahbdclk[okayportb endpoint@0\boendpoint@1]bkendpoint@2^beendpoint@3_bhiommu@ff930300rockchip,iommu   vopb_mmu5 aclkifaceZ Zokayb[vop@ff940000rockchip,rk3288-vop  5aclk_vopdclk_vophclk_vopZ  Taxiahbdclk`okayportb endpoint@0abpendpoint@1bblendpoint@2cbfendpoint@3dbiiommu@ff940300rockchip,iommu   vopl_mmu5 aclkifaceZ Zokayb`mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclkZ 5 disabledportsportendpoint@0eb^endpoint@1fbclvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdslcdcgZ 5 disabledportsport@0endpoint@0hb_endpoint@1ibddp@ff970000rockchip,rk3288-dp@ b5icdppclkjdpoTdp5okayportsport@0endpoint@0kb]endpoint@1lbbport@1endpoint@0mbhdmi@ff980000rockchip,rk3288-dw-hdmi 5 g5hmniahbisfrcecZ okaynportsportendpoint@0ob\endpoint@1pbavideo-codec@ff9a0000rockchip,rk3288-vpu    vepuvdpu5 aclkhclkqZ iommu@ff9a0800rockchip,iommu  vpu_mmu5 aclkifaceZZ bqiommu@ff9c0440rockchip,iommu @@@ o  hevc_mmu5 aclkifaceZ disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$  jobmmugpu5rZ okaysb2gpu-opp-tableoperating-points-v2bropp-100000000u|~opp-200000000u |~opp-300000000u|B@opp-400000000uׄ|opp-600000000u#F|qos@ffaa0000syscon bUqos@ffaa0080syscon bVqos@ffad0000syscon bJqos@ffad0100syscon bKqos@ffad0180syscon bLqos@ffad0400syscon bMqos@ffad0480syscon bNqos@ffad0500syscon bIqos@ffad0800syscon bOqos@ffad0880syscon bPqos@ffad0900syscon bQqos@ffae0000syscon bTqos@ffaf0000syscon bRqos@ffaf0080syscon bSefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu-id@7cpu_leakage@17interrupt-controller@ffc01000 arm,gic-400@ @ `   bpinctrlrockchip,rk3288-pinctrl5gpio0@ff750000rockchip,gpio-banku Q5@b>gpio1@ff780000rockchip,gpio-bankx R5Agpio2@ff790000rockchip,gpio-banky S5Bgpio3@ff7a0000rockchip,gpio-bankz T5Cgpio4@ff7b0000rockchip,gpio-bank{ U5Db7gpio5@ff7c0000rockchip,gpio-bank| V5Egpio6@ff7d0000rockchip,gpio-bank} W5Fgpio7@ff7e0000rockchip,gpio-bank~ X5Gb|gpio8@ff7f0000rockchip,gpio-bank Y5Hhdmihdmi-cec-c0 thdmi-cec-c7 thdmi-ddc  tthdmi-ddc-unwedge  utpcfg-output-lowbupcfg-pull-up$bvpcfg-pull-down1bwpcfg-pull-none@btpcfg-pull-none-12ma@M bzsleepglobal-pwroff tb@ddrio-pwroff tddr0-retention vddr1-retention vedpedp-hpd  wi2c0i2c0-xfer  ttb=i2c1i2c1-xfer  ttb%i2c2i2c2-xfer   t tbDi2c3i2c3-xfer  ttb&i2c4i2c4-xfer  ttb'i2c5i2c5-xfer  ttb(i2s0i2s0-bus` ttttttbYlcdclcdc-ctl@ ttttbgsdmmcsdmmc-clk xb sdmmc-cmd ybsdmmc-cd vbsdmmc-bus1 vsdmmc-bus4@ yyyybsdmmc-pwr  tbsdio0sdio0-bus1 vsdio0-bus4@ vvvvsdio0-cmd vsdio0-clk tsdio0-cd vsdio0-wp vsdio0-pwr vsdio0-bkpwr vsdio0-int vsdio1sdio1-bus1 vsdio1-bus4@ vvvvsdio1-cd vsdio1-wp vsdio1-bkpwr vsdio1-int vsdio1-cmd vsdio1-clk tsdio1-pwr  vemmcemmc-clk tbemmc-cmd vbemmc-pwr  vbemmc-bus1 vemmc-bus4@ vvvvemmc-bus8 vvvvvvvvbspi0spi0-clk  vbspi0-cs0  vbspi0-tx vbspi0-rx vbspi0-cs1 vspi1spi1-clk  vbspi1-cs0  vb spi1-rx vbspi1-tx vbspi2spi2-cs1 vspi2-clk vb!spi2-cs0 vb$spi2-rx vb#spi2-tx  vb"uart0uart0-xfer  vtb)uart0-cts vuart0-rts tuart1uart1-xfer  v tb*uart1-cts  vuart1-rts  tuart2uart2-xfer  vtb+uart3uart3-xfer  vtb,uart3-cts  vuart3-rts  tuart4uart4-xfer  vtb-uart4-cts  vuart4-rts  ttsadcotp-gpio tb3otp-out tb4pwm0pwm0-pin tbEpwm1pwm1-pin tbFpwm2pwm2-pin tbGpwm3pwm3-pin tbHgmacrgmii-pins ttttzzzzttt zzttb9rmii-pins ttttttttttspdifspdif-tx  tbXpcfg-pull-none-drv-8maMbxpcfg-pull-up-drv-8ma$Mbybacklightbl-en tb}buttonspwrbtn vblcdlcd-cs tbpmicpmic-int vb?usbhost-vbus-drv tbeth_phyeth-phy-pwr tbmemory@0memoryadc-keys adc-keys\{hbuttonsyw@button-up Volume Upsbutton-down Volume DownrmenuMenu escEscB@homeHomef backlightpwm-backlight  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ |default}~B@bexternal-gmac-clock fixed-clocksY@ ext_gmacb8panellg,lp079qx1-sp0v | portsportendpointbmgpio-keys gpio-keys defaultpower >tGPIO Key Power 0 .dvcc-host-regulatorregulator-fixed @ H>default (vcc_hostvcc-phy-regulatorregulator-fixed @ H>default(vcc_phy2Z2Zb6vsys-regulatorregulator-fixed(vcc_sysLK@LK@bAsdmmc-regulatorregulator-fixed H| default(vcc_sd2Z2Z S dBb #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclocksdynamic-power-coefficientcpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredarm,no-tick-in-suspendportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,grfrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usassigned-clocksassigned-clock-parentstx_delayrx_delayphysphy-namesdr_modesnps,reset-phy-on-wakeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cells#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointforce-hpdddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsoutput-lowbias-pull-upbias-pull-downbias-disabledrive-strengthio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltbrightness-levelsdefault-brightness-levelenable-gpiospwmsbacklightpower-supplyautorepeatlinux,input-typedebounce-intervalenable-active-highstartup-delay-usvin-supply