8X( P Qgumstix,omap3-overo-tobiduogumstix,omap3-overoti,omap3630ti,omap36xxti,omap3 +07OMAP36xx/AM37xx/DM37xx Gumstix Overo on TobiDuochosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000d/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8lcpux|cpupmu@54000000arm,cortex-a8-pmuxTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-busxh +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-busx + pinmux@30 ti,omap3-padconfpinctrl-singlex08+ +HdefaultV`pinmux_uart2_pins h<>@B`pinmux_i2c1_pinsh`pinmux_mmc1_pins0h`pinmux_mmc2_pins0h(*,.02`pinmux_w3cbw003c_pinshl`pinmux_hsusb2_pins@h      `pinmux_twl4030_pinshA`pinmux_i2c3_pinsh`pinmux_uart3_pinshnp`scm_conf@270sysconsimple-busxp0+ p0`pbias_regulator@2b0ti,pbias-omap3ti,pbias-omapx|pbias_mmc_omap2430pbias_mmc_omap2430w@-`clocks+mcbsp5_mux_fck@68ti,composite-mux-clock|xh` mcbsp5_fckti,composite-clock| `mcbsp1_mux_fck@4ti,composite-mux-clock|x` mcbsp1_fckti,composite-clock| `mcbsp2_mux_fck@4ti,composite-mux-clock| x`mcbsp2_fckti,composite-clock|`mcbsp3_mux_fck@68ti,composite-mux-clock| xh`mcbsp3_fckti,composite-clock|`mcbsp4_mux_fck@68ti,composite-mux-clock| xh`mcbsp4_fckti,composite-clock|`clockdomainspinmux@a00 ti,omap3-padconfpinctrl-singlex \+ +pinmux_twl4030_vpins h`aes@480c5000 ti,omap3-aesaesxH PPABtxrxprm@48306000 ti,omap3-prmxH0`@ clocks+virt_16_8m_ck fixed-clockY`osc_sys_ck@d40 ti,mux-clock|x @`sys_ck@1270ti,divider-clock|xp` sys_clkout1@d70ti,gate-clock|x pdpll3_x2_ckfixed-factor-clock|(dpll3_m2x2_ckfixed-factor-clock|(`dpll4_x2_ckfixed-factor-clock|(corex2_fckfixed-factor-clock|(`!wkup_l4_ickfixed-factor-clock| (`Pcorex2_d3_fckfixed-factor-clock|!(`corex2_d5_fckfixed-factor-clock|!(`clockdomainscm@48004000 ti,omap3-cmxH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clock`Bvirt_12m_ck fixed-clock`virt_13m_ck fixed-clock]@`virt_19200000_ck fixed-clock$`virt_26000000_ck fixed-clock`virt_38_4m_ck fixed-clockI`dpll4_ck@d00ti,omap3-dpll-per-j-type-clock| x D 0`dpll4_m2_ck@d48ti,divider-clock|?x H`"dpll4_m2x2_mul_ckfixed-factor-clock|"(`#dpll4_m2x2_ck@d00ti,hsdiv-gate-clock|#x 2`$omap_96m_alwon_fckfixed-factor-clock|$(`+dpll3_ck@d00ti,omap3-dpll-core-clock| x @ 0`dpll3_m3_ck@1140ti,divider-clock|x@`%dpll3_m3x2_mul_ckfixed-factor-clock|%(`&dpll3_m3x2_ck@d00ti,hsdiv-gate-clock|& x 2`'emu_core_alwon_ckfixed-factor-clock|'(`dsys_altclk fixed-clock`0mcbsp_clks fixed-clock`dpll3_m2_ck@d40ti,divider-clock|x @`core_ckfixed-factor-clock|(`(dpll1_fck@940ti,divider-clock|(x @`)dpll1_ck@904ti,omap3-dpll-clock| )x  $ @ 4`dpll1_x2_ckfixed-factor-clock|(`*dpll1_x2m2_ck@944ti,divider-clock|*x D`>cm_96m_fckfixed-factor-clock|+(`,omap_96m_fck@d40 ti,mux-clock|, x @`Gdpll4_m3_ck@e40ti,divider-clock| x@`-dpll4_m3x2_mul_ckfixed-factor-clock|-(`.dpll4_m3x2_ck@d00ti,hsdiv-gate-clock|.x 2`/omap_54m_fck@d40 ti,mux-clock|/0x @`:cm_96m_d2_fckfixed-factor-clock|,(`1omap_48m_fck@d40 ti,mux-clock|10x @`2omap_12m_fckfixed-factor-clock|2(`Idpll4_m4_ck@e40ti,divider-clock|x@`3dpll4_m4x2_mul_ckti,fixed-factor-clock|3HVc`4dpll4_m4x2_ck@d00ti,gate-clock|4x 2c`dpll4_m5_ck@f40ti,divider-clock|?x@`5dpll4_m5x2_mul_ckti,fixed-factor-clock|5HVc`6dpll4_m5x2_ck@d00ti,hsdiv-gate-clock|6x 2c`ldpll4_m6_ck@1140ti,divider-clock|?x@`7dpll4_m6x2_mul_ckfixed-factor-clock|7(`8dpll4_m6x2_ck@d00ti,hsdiv-gate-clock|8x 2`9emu_per_alwon_ckfixed-factor-clock|9(`eclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock|(x p`;clkout2_src_mux_ck@d70ti,composite-mux-clock|( ,:x p`<clkout2_src_ckti,composite-clock|;<`=sys_clkout2@d70ti,divider-clock|=@x pvmpu_ckfixed-factor-clock|>(`?arm_fck@924ti,divider-clock|?x $emu_mpu_alwon_ckfixed-factor-clock|?(`fl3_ick@a40ti,divider-clock|(x @`@l4_ick@a40ti,divider-clock|@x @`Arm_ick@c40ti,divider-clock|Ax @gpt10_gate_fck@a00ti,composite-gate-clock|  x `Cgpt10_mux_fck@a40ti,composite-mux-clock|B x @`Dgpt10_fckti,composite-clock|CDgpt11_gate_fck@a00ti,composite-gate-clock|  x `Egpt11_mux_fck@a40ti,composite-mux-clock|B x @`Fgpt11_fckti,composite-clock|EFcore_96m_fckfixed-factor-clock|G(`mmchs2_fck@a00ti,wait-gate-clock|x `mmchs1_fck@a00ti,wait-gate-clock|x `i2c3_fck@a00ti,wait-gate-clock|x `i2c2_fck@a00ti,wait-gate-clock|x `i2c1_fck@a00ti,wait-gate-clock|x `mcbsp5_gate_fck@a00ti,composite-gate-clock| x ` mcbsp1_gate_fck@a00ti,composite-gate-clock| x ` core_48m_fckfixed-factor-clock|2(`Hmcspi4_fck@a00ti,wait-gate-clock|Hx `mcspi3_fck@a00ti,wait-gate-clock|Hx `mcspi2_fck@a00ti,wait-gate-clock|Hx `mcspi1_fck@a00ti,wait-gate-clock|Hx `uart2_fck@a00ti,wait-gate-clock|Hx `uart1_fck@a00ti,wait-gate-clock|Hx  `core_12m_fckfixed-factor-clock|I(`Jhdq_fck@a00ti,wait-gate-clock|Jx `core_l3_ickfixed-factor-clock|@(`Ksdrc_ick@a10ti,wait-gate-clock|Kx `gpmc_fckfixed-factor-clock|K(core_l4_ickfixed-factor-clock|A(`Lmmchs2_ick@a10ti,omap3-interface-clock|Lx `mmchs1_ick@a10ti,omap3-interface-clock|Lx `hdq_ick@a10ti,omap3-interface-clock|Lx `mcspi4_ick@a10ti,omap3-interface-clock|Lx `mcspi3_ick@a10ti,omap3-interface-clock|Lx `mcspi2_ick@a10ti,omap3-interface-clock|Lx `mcspi1_ick@a10ti,omap3-interface-clock|Lx `i2c3_ick@a10ti,omap3-interface-clock|Lx `i2c2_ick@a10ti,omap3-interface-clock|Lx `i2c1_ick@a10ti,omap3-interface-clock|Lx `uart2_ick@a10ti,omap3-interface-clock|Lx `uart1_ick@a10ti,omap3-interface-clock|Lx  `gpt11_ick@a10ti,omap3-interface-clock|Lx  `gpt10_ick@a10ti,omap3-interface-clock|Lx  `mcbsp5_ick@a10ti,omap3-interface-clock|Lx  `mcbsp1_ick@a10ti,omap3-interface-clock|Lx  `omapctrl_ick@a10ti,omap3-interface-clock|Lx `dss_tv_fck@e00ti,gate-clock|:x`dss_96m_fck@e00ti,gate-clock|Gx`dss2_alwon_fck@e00ti,gate-clock| x`dummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock| x `Mgpt1_mux_fck@c40ti,composite-mux-clock|B x @`Ngpt1_fckti,composite-clock|MN`aes2_ick@a10ti,omap3-interface-clock|Lx `wkup_32k_fckfixed-factor-clock|B(`Ogpio1_dbck@c00ti,gate-clock|Ox `sha12_ick@a10ti,omap3-interface-clock|Lx `wdt2_fck@c00ti,wait-gate-clock|Ox `wdt2_ick@c10ti,omap3-interface-clock|Px `wdt1_ick@c10ti,omap3-interface-clock|Px `gpio1_ick@c10ti,omap3-interface-clock|Px `omap_32ksync_ick@c10ti,omap3-interface-clock|Px `gpt12_ick@c10ti,omap3-interface-clock|Px `gpt1_ick@c10ti,omap3-interface-clock|Px `per_96m_fckfixed-factor-clock|+(` per_48m_fckfixed-factor-clock|2(`Quart3_fck@1000ti,wait-gate-clock|Qx `gpt2_gate_fck@1000ti,composite-gate-clock| x`Rgpt2_mux_fck@1040ti,composite-mux-clock|B x@`Sgpt2_fckti,composite-clock|RS`gpt3_gate_fck@1000ti,composite-gate-clock| x`Tgpt3_mux_fck@1040ti,composite-mux-clock|B x@`Ugpt3_fckti,composite-clock|TUgpt4_gate_fck@1000ti,composite-gate-clock| x`Vgpt4_mux_fck@1040ti,composite-mux-clock|B x@`Wgpt4_fckti,composite-clock|VWgpt5_gate_fck@1000ti,composite-gate-clock| x`Xgpt5_mux_fck@1040ti,composite-mux-clock|B x@`Ygpt5_fckti,composite-clock|XYgpt6_gate_fck@1000ti,composite-gate-clock| x`Zgpt6_mux_fck@1040ti,composite-mux-clock|B x@`[gpt6_fckti,composite-clock|Z[gpt7_gate_fck@1000ti,composite-gate-clock| x`\gpt7_mux_fck@1040ti,composite-mux-clock|B x@`]gpt7_fckti,composite-clock|\]gpt8_gate_fck@1000ti,composite-gate-clock|  x`^gpt8_mux_fck@1040ti,composite-mux-clock|B x@`_gpt8_fckti,composite-clock|^_gpt9_gate_fck@1000ti,composite-gate-clock|  x``gpt9_mux_fck@1040ti,composite-mux-clock|B x@`agpt9_fckti,composite-clock|`aper_32k_alwon_fckfixed-factor-clock|B(`bgpio6_dbck@1000ti,gate-clock|bx`gpio5_dbck@1000ti,gate-clock|bx`gpio4_dbck@1000ti,gate-clock|bx`gpio3_dbck@1000ti,gate-clock|bx`gpio2_dbck@1000ti,gate-clock|bx `wdt3_fck@1000ti,wait-gate-clock|bx `per_l4_ickfixed-factor-clock|A(`cgpio6_ick@1010ti,omap3-interface-clock|cx`gpio5_ick@1010ti,omap3-interface-clock|cx`gpio4_ick@1010ti,omap3-interface-clock|cx`gpio3_ick@1010ti,omap3-interface-clock|cx`gpio2_ick@1010ti,omap3-interface-clock|cx `wdt3_ick@1010ti,omap3-interface-clock|cx `uart3_ick@1010ti,omap3-interface-clock|cx `uart4_ick@1010ti,omap3-interface-clock|cx`gpt9_ick@1010ti,omap3-interface-clock|cx `gpt8_ick@1010ti,omap3-interface-clock|cx `gpt7_ick@1010ti,omap3-interface-clock|cx`gpt6_ick@1010ti,omap3-interface-clock|cx`gpt5_ick@1010ti,omap3-interface-clock|cx`gpt4_ick@1010ti,omap3-interface-clock|cx`gpt3_ick@1010ti,omap3-interface-clock|cx`gpt2_ick@1010ti,omap3-interface-clock|cx`mcbsp2_ick@1010ti,omap3-interface-clock|cx`mcbsp3_ick@1010ti,omap3-interface-clock|cx`mcbsp4_ick@1010ti,omap3-interface-clock|cx`mcbsp2_gate_fck@1000ti,composite-gate-clock|x`mcbsp3_gate_fck@1000ti,composite-gate-clock|x`mcbsp4_gate_fck@1000ti,composite-gate-clock|x`emu_src_mux_ck@1140 ti,mux-clock| defx@`gemu_src_ckti,clkdm-gate-clock|g`hpclk_fck@1140ti,divider-clock|hx@pclkx2_fck@1140ti,divider-clock|hx@atclk_fck@1140ti,divider-clock|hx@traceclk_src_fck@1140 ti,mux-clock| defx@`itraceclk_fck@1140ti,divider-clock|i x@secure_32k_fck fixed-clock`jgpt12_fckfixed-factor-clock|j(`wdt1_fckfixed-factor-clock|j(security_l4_ick2fixed-factor-clock|A(`kaes1_ick@a14ti,omap3-interface-clock|kx rng_ick@a14ti,omap3-interface-clock|kx `sha11_ick@a14ti,omap3-interface-clock|kx des1_ick@a14ti,omap3-interface-clock|kx cam_mclk@f00ti,gate-clock|lxccam_ick@f10!ti,omap3-no-wait-interface-clock|Ax`csi2_96m_fck@f00ti,gate-clock|x`security_l3_ickfixed-factor-clock|@(`mpka_ick@a14ti,omap3-interface-clock|mx icr_ick@a10ti,omap3-interface-clock|Lx des2_ick@a10ti,omap3-interface-clock|Lx mspro_ick@a10ti,omap3-interface-clock|Lx mailboxes_ick@a10ti,omap3-interface-clock|Lx ssi_l4_ickfixed-factor-clock|A(`tsr1_fck@c00ti,wait-gate-clock| x `sr2_fck@c00ti,wait-gate-clock| x ` sr_l4_ickfixed-factor-clock|A(dpll2_fck@40ti,divider-clock|(x@`ndpll2_ck@4ti,omap3-dpll-clock| nx$@4`odpll2_m2_ck@44ti,divider-clock|oxD`piva2_ck@0ti,wait-gate-clock|px`modem_fck@a00ti,omap3-interface-clock| x `sad2d_ick@a10ti,omap3-interface-clock|@x `mad2d_ick@a18ti,omap3-interface-clock|@x `mspro_fck@a00ti,wait-gate-clock|x ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock|!x `qssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock|!x @$`rssi_ssr_fck_3430es2ti,composite-clock|qr`sssi_sst_fck_3430es2fixed-factor-clock|s(` hsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clock|Kx `ssi_ick_3430es2@a10ti,omap3-ssi-interface-clock|tx ` usim_gate_fck@c00ti,composite-gate-clock|G x `sys_d2_ckfixed-factor-clock| (`vomap_96m_d2_fckfixed-factor-clock|G(`womap_96m_d4_fckfixed-factor-clock|G(`xomap_96m_d8_fckfixed-factor-clock|G(`yomap_96m_d10_fckfixed-factor-clock|G( `zdpll5_m2_d4_ckfixed-factor-clock|u(`{dpll5_m2_d8_ckfixed-factor-clock|u(`|dpll5_m2_d16_ckfixed-factor-clock|u(`}dpll5_m2_d20_ckfixed-factor-clock|u(`~usim_mux_fck@c40ti,composite-mux-clock(| vwxyz{|}~x @`usim_fckti,composite-clock|usim_ick@c10ti,omap3-interface-clock|Px  `dpll5_ck@d04ti,omap3-dpll-clock| x  $ L 4`dpll5_m2_ck@d50ti,divider-clock|x P`usgx_gate_fck@b00ti,composite-gate-clock|(x `core_d3_ckfixed-factor-clock|((`core_d4_ckfixed-factor-clock|((`core_d6_ckfixed-factor-clock|((`omap_192m_alwon_fckfixed-factor-clock|$(`core_d2_ckfixed-factor-clock|((`sgx_mux_fck@b40ti,composite-mux-clock |,x @`sgx_fckti,composite-clock|`sgx_ick@b10ti,wait-gate-clock|@x `cpefuse_fck@a08ti,gate-clock| x `ts_fck@a08ti,gate-clock|Bx `usbtll_fck@a08ti,wait-gate-clock|ux `usbtll_ick@a18ti,omap3-interface-clock|Lx `mmchs3_ick@a10ti,omap3-interface-clock|Lx `mmchs3_fck@a00ti,wait-gate-clock|x `dss1_alwon_fck_3430es2@e00ti,dss-gate-clock|xc`dss_ick_3430es2@e10ti,omap3-dss-interface-clock|Ax`usbhost_120m_fck@1400ti,gate-clock|ux`usbhost_48m_fck@1400ti,dss-gate-clock|2x`usbhost_ick@1410ti,omap3-dss-interface-clock|Ax`uart4_fck@1000ti,wait-gate-clock|Qx`clockdomainscore_l3_clkdmti,clockdomain|dpll3_clkdmti,clockdomain|dpll1_clkdmti,clockdomain|per_clkdmti,clockdomainl|emu_clkdmti,clockdomain|hdpll4_clkdmti,clockdomain|wkup_clkdmti,clockdomain$|dss_clkdmti,clockdomain|core_l4_clkdmti,clockdomain|cam_clkdmti,clockdomain|iva2_clkdmti,clockdomain|dpll2_clkdmti,clockdomain|od2d_clkdmti,clockdomain |dpll5_clkdmti,clockdomain|sgx_clkdmti,clockdomain|usbhost_clkdmti,clockdomain |target-module@48320000ti,sysc-omap2ti,syscxH2H2 revsysc|Ofckick+ H2counter@0ti,omap-counter32kx interrupt-controller@48200000ti,omap3-intcxH `target-module@48056000ti,sysc-omap2ti,syscxH`H`,H`(revsyscsyss#  |Kick+ H`dma-controller@0ti,omap3630-sdmati,omap-sdmax  ``gpio@48310000ti,omap3-gpioxH1gpio1+=M`gpio@49050000ti,omap3-gpioxIgpio2=M`gpio@49052000ti,omap3-gpioxI gpio3=M`gpio@49054000ti,omap3-gpioxI@ gpio4=Mgpio@49056000ti,omap3-gpioxI`!gpio5=Mgpio@49058000ti,omap3-gpioxI"gpio6=M`serial@4806a000ti,omap3-uartxH YH12txrxuart1lserial@4806c000ti,omap3-uartxHYI34txrxuart2lHdefaultVserial@49020000ti,omap3-uartxIYJn56txrxuart3lHdefaultVi2c@48070000 ti,omap3-i2cxH8txrx+i2c1HdefaultV'@twl@48xH  ti,twl4030HdefaultVaudioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci m{ vacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' regulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0`regulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5`regulator-vusb1v8ti,twl4030-vusb1v8`regulator-vusb3v1ti,twl4030-vusb3v1`regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@regulator-vsimti,twl4030-vsimw@-gpioti,twl4030-gpio=Mtwl4030-usbti,twl4030-usb `pwmti,twl4030-pwmpwmledti,twl4030-pwmled`pwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadmadcti,twl4030-madc`i2c@48072000 ti,omap3-i2cxH 9txrx+i2c2 "disabledi2c@48060000 ti,omap3-i2cxH=txrx+i2c3HdefaultVeeprom@51 atmel,24c01xQ)lis33de@1dst,lis33dest,lis3lv02dx2=K]o   -x<xKZ&i&x "disabledmailbox@48094000ti,omap3-mailboxmailboxxH @dsp  spi@48098000ti,omap2-mcspixH A+mcspi1@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspixH B+mcspi2 +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspixH [+mcspi3 tx0rx0tx1rx1spi@480ba000ti,omap2-mcspixH 0+mcspi4FGtx0rx01w@480b2000 ti,omap3-1wxH :hdq1wmmc@4809c000ti,omap3-hsmmcxH Smmc1=>txrxHdefaultVmmc@480b4000ti,omap3-hsmmcxH @Vmmc2/0txrxHdefaultV %mmc@480ad000ti,omap3-hsmmcxH ^mmc3MNtxrx "disabledmmu@480bd4003ti,omap2-iommuxH mmu_isp@` mmu@5d0000003ti,omap2-iommux]mmu_iva "disabledwdt@48314000 ti,omap3-wdtxH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspxH@mpu ;< Pcommontxrx`mcbsp1 txrx|fck "disabledtarget-module@480a0000ti,sysc-omap2ti,syscxH <H @H Drevsyscsyss|ick+ H rng@0 ti,omap2-rngx 4mcbsp@49022000ti,omap3-mcbspxI I mpusidetone>?Pcommontxrxsidetone`mcbsp2mcbsp2_sidetone!"txrx|fckick"okay`mcbsp@49024000ti,omap3-mcbspxI@I mpusidetoneYZPcommontxrxsidetone`mcbsp3mcbsp3_sidetonetxrx|fckick "disabledmcbsp@49026000ti,omap3-mcbspxI`mpu 67 Pcommontxrx`mcbsp4txrx|fcko "disabledmcbsp@48096000ti,omap3-mcbspxH `mpu QR Pcommontxrx`mcbsp5txrx|fck "disabledsham@480c3000ti,omap3-shamshamxH 0d1Erxtarget-module@48318000ti,sysc-omap2-timerti,syscxH1H1H1revsyscsyss' |fckick+ H1timer@0ti,omap3430-timerx|fck%Btarget-module@49032000ti,sysc-omap2-timerti,syscxI I I revsyscsyss' |fckick+ I timer@0ti,omap3430-timerx&timer@49034000ti,omap3430-timerxI@'timer3timer@49036000ti,omap3430-timerxI`(timer4timer@49038000ti,omap3430-timerxI)timer5timer@4903a000ti,omap3430-timerxI*timer6timer@4903c000ti,omap3430-timerxI+timer7timer@4903e000ti,omap3430-timerxI,timer8timer@49040000ti,omap3430-timerxI-timer9timer@48086000ti,omap3430-timerxH`.timer10timer@48088000ti,omap3430-timerxH/timer11target-module@48304000ti,sysc-omap2-timerti,syscxH0@H0@H0@revsyscsyss' |fckick+ H0@timer@0ti,omap3430-timerx_usbhstll@48062000 ti,usbhs-tllxH N usb_tll_hsusbhshost@48064000ti,usbhs-hostxH@ usb_host_hs+ ehci-phyohci@48064400ti,ohci-omap3xHDL ehci@48064800 ti,ehci-omapxHHM"gpmc@6e000000ti,omap3430-gpmcgpmcxnrxtx'3+=M00+,`nand@0,0ti,omap2-nandEmicron,mt29c4g96maz x Tcubch8,,",( 6@*R;RL(^+partition@0vSPLxpartition@80000vU-Bootxpartition@1c0000 vEnvironmentx$partition@280000vKernelx(partition@780000 vFilesystemxethernet@gpmcsmsc,lan9221smsc,lan9115|*$   *$*<;6$^L*   4 D R _ x ethernet@4,0smsc,lan9221smsc,lan9115|*$   *$*<;6$^L*   4 D R _ x usb_otg_hs@480ab000ti,omap3-musbxH \]Pmcdma usb_otg_hs u    " usb2-phy 2dss@48050000 ti,omap3-dssxH "disabled dss_core|fck+dispc@48050400ti,omap3-dispcxH dss_dispc|fckencoder@4804fc00 ti,omap3-dsixHH@H protophypll "disabled dss_dsi1| fcksys_clkencoder@48050800ti,omap3-rfbixH "disabled dss_rfbi|fckickencoder@48050c00ti,omap3-vencxH  "disabled dss_venc|fcktv_dac_clkssi-controller@48058000 ti,omap3-ssissi"okxHHsysgddGPgdd_mpu+ |s   ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portxHHtxrxCDssi-port@4805b000ti,omap3-ssi-portxHHtxrxEFserial@49042000ti,omap3-uartxI PQRtxrxuart4lregulator-abb-mpu ti,abb-v1 abb_mpu_iva+xH0rH0hbase-addressint-address |   ` sO7`pinmux@480025a0 ti,omap3-padconfpinctrl-singlexH%\+ +HdefaultV pinmux_hsusb2_2_pins0hPRT V X Z ` pinmux_w3cbw003c_2_pinsh@`isp@480bc000 ti,omap3-ispxH H   | ports+bandgap@48002524xH%$ti,omap36xx-bandgap `target-module@480cb000ti,sysc-omap3630-srti,syscsmartreflex_corexH 8sysc | fck+ H smartreflex@0ti,omap3-smartreflex-corextarget-module@480c9000ti,sysc-omap3630-srti,syscsmartreflex_mpu_ivaxH 8sysc |fck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivaxtarget-module@50000000ti,sysc-omap4ti,syscxPP revsysc  |fckick+ Popp-tableoperating-points-v2-ti-cpu|`opp50-300000000 ' .ssssss < Mopp100-600000000 '#F .OOOOOO <opp130-800000000 '/ .777777 <opp1g-1000000000 '; . < Yopp_supplyti,omap-opp-supply dthermal-zonescpu_thermal   N  memory@0lmemoryxpwmleds pwm-ledsoverovovero:blue:COM w5  mmc0soundti,omap-twl4030 overo hsusb2_power_regregulator-fixed hsusb2_vbusLK@LK@  p `hsusb2_phyusb-nop-xceiv % 1`regulator-w3cbw003c-npoweronregulator-fixedregulator-w3cbw003c-npoweron2Z2Z  `regulator-w3cbw003c-wifi-nresetHdefaultVregulator-fixed regulator-w3cbw003c-wifi-nreset2Z2Z  '`lis33-3v3-regregulator-fixedlis33-3v3-reg2Z2Z`lis33-1v8-regregulator-fixedlis33-1v8-regw@w@`regulator-vddvarioregulator-fixed vddvario <`regulator-vdd33aregulator-fixedvdd33a <` compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supplyinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0phandlepinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersreg-namesti,sysc-sidleti,sysc-maskti,sysc-midleti,syss-mask#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cellsstatuspagesizeVdd-supplyVdd_IO-supplyst,click-single-xst,click-single-yst,click-single-zst,click-thresh-xst,click-thresh-yst,click-thresh-zst,irq1-clickst,irq2-clickst,wakeup-x-lost,wakeup-x-hist,wakeup-y-lost,wakeup-y-hist,wakeup-z-lost,wakeup-z-hist,min-limit-xst,min-limit-yst,min-limit-zst,max-limit-xst,max-limit-yst,max-limit-z#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplybus-widthvqmmc-supplycap-sdio-irqnon-removable#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthgpmc,mux-add-datagpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsenvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowerti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorspwmsmax-brightnesslinux,default-triggerti,modelti,mcbspgpiostartup-delay-usenable-active-highreset-gpiosvcc-supplyregulator-always-on