8( \;isee,omap3-igep0030-rev-gti,omap3630ti,omap36xxti,omap3 +*7IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)chosen=/ocp@68000000/serial@49020000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/serial@4806a000`/ocp@68000000/serial@4806c000h/ocp@68000000/serial@49020000p/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8xcpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+7Tdefaultbpinmux_gpmc_pinslpinmux_uart1_pinslRLpinmux_uart3_pinslnppinmux_mcbsp2_pins l pinmux_mmc1_pins0lpinmux_mmc2_pins0l(*,.02pinmux_i2c1_pinslpinmux_i2c3_pinslpinmux_twl4030_pinslApinmux_hsusb2_pins0l      pinmux_uart2_pins l<>@Bpinmux_lbep5clwmc_pinsl46:pinmux_leds_pinslscm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+mcbsp5_mux_fck@68ti,composite-mux-clockh mcbsp5_fckti,composite-clock mcbsp1_mux_fck@4ti,composite-mux-clock mcbsp1_fckti,composite-clock mcbsp2_mux_fck@4ti,composite-mux-clock mcbsp2_fckti,composite-clockmcbsp3_mux_fck@68ti,composite-mux-clock hmcbsp3_fckti,composite-clockmcbsp4_mux_fck@68ti,composite-mux-clock hmcbsp4_fckti,composite-clockclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+7pinmux_twl4030_vpins laes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clockp sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock)4dpll3_m2x2_ckfixed-factor-clock)4dpll4_x2_ckfixed-factor-clock)4corex2_fckfixed-factor-clock)4!wkup_l4_ickfixed-factor-clock )4Pcorex2_d3_fckfixed-factor-clock!)4corex2_d5_fckfixed-factor-clock!)4clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockBvirt_12m_ck fixed-clockvirt_13m_ck fixed-clock]@virt_19200000_ck fixed-clock$virt_26000000_ck fixed-clockvirt_38_4m_ck fixed-clockIdpll4_ck@d00ti,omap3-dpll-per-j-type-clock  D 0dpll4_m2_ck@d48ti,divider-clock? H"dpll4_m2x2_mul_ckfixed-factor-clock")4#dpll4_m2x2_ck@d00ti,hsdiv-gate-clock# >$omap_96m_alwon_fckfixed-factor-clock$)4+dpll3_ck@d00ti,omap3-dpll-core-clock  @ 0dpll3_m3_ck@1140ti,divider-clock@%dpll3_m3x2_mul_ckfixed-factor-clock%)4&dpll3_m3x2_ck@d00ti,hsdiv-gate-clock&  >'emu_core_alwon_ckfixed-factor-clock')4dsys_altclk fixed-clock0mcbsp_clks fixed-clockdpll3_m2_ck@d40ti,divider-clock @core_ckfixed-factor-clock)4(dpll1_fck@940ti,divider-clock( @)dpll1_ck@904ti,omap3-dpll-clock )  $ @ 4dpll1_x2_ckfixed-factor-clock)4*dpll1_x2m2_ck@944ti,divider-clock* D>cm_96m_fckfixed-factor-clock+)4,omap_96m_fck@d40 ti,mux-clock,  @Gdpll4_m3_ck@e40ti,divider-clock @-dpll4_m3x2_mul_ckfixed-factor-clock-)4.dpll4_m3x2_ck@d00ti,hsdiv-gate-clock. >/omap_54m_fck@d40 ti,mux-clock/0 @:cm_96m_d2_fckfixed-factor-clock,)41omap_48m_fck@d40 ti,mux-clock10 @2omap_12m_fckfixed-factor-clock2)4Idpll4_m4_ck@e40ti,divider-clock@3dpll4_m4x2_mul_ckti,fixed-factor-clock3Tbo4dpll4_m4x2_ck@d00ti,gate-clock4 >odpll4_m5_ck@f40ti,divider-clock?@5dpll4_m5x2_mul_ckti,fixed-factor-clock5Tbo6dpll4_m5x2_ck@d00ti,hsdiv-gate-clock6 >oldpll4_m6_ck@1140ti,divider-clock?@7dpll4_m6x2_mul_ckfixed-factor-clock7)48dpll4_m6x2_ck@d00ti,hsdiv-gate-clock8 >9emu_per_alwon_ckfixed-factor-clock9)4eclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock( p;clkout2_src_mux_ck@d70ti,composite-mux-clock( ,: p<clkout2_src_ckti,composite-clock;<=sys_clkout2@d70ti,divider-clock=@ pmpu_ckfixed-factor-clock>)4?arm_fck@924ti,divider-clock? $emu_mpu_alwon_ckfixed-factor-clock?)4fl3_ick@a40ti,divider-clock( @@l4_ick@a40ti,divider-clock@ @Arm_ick@c40ti,divider-clockA @gpt10_gate_fck@a00ti,composite-gate-clock   Cgpt10_mux_fck@a40ti,composite-mux-clockB  @Dgpt10_fckti,composite-clockCDgpt11_gate_fck@a00ti,composite-gate-clock   Egpt11_mux_fck@a40ti,composite-mux-clockB  @Fgpt11_fckti,composite-clockEFcore_96m_fckfixed-factor-clockG)4mmchs2_fck@a00ti,wait-gate-clock mmchs1_fck@a00ti,wait-gate-clock i2c3_fck@a00ti,wait-gate-clock i2c2_fck@a00ti,wait-gate-clock i2c1_fck@a00ti,wait-gate-clock mcbsp5_gate_fck@a00ti,composite-gate-clock   mcbsp1_gate_fck@a00ti,composite-gate-clock   core_48m_fckfixed-factor-clock2)4Hmcspi4_fck@a00ti,wait-gate-clockH mcspi3_fck@a00ti,wait-gate-clockH mcspi2_fck@a00ti,wait-gate-clockH mcspi1_fck@a00ti,wait-gate-clockH uart2_fck@a00ti,wait-gate-clockH uart1_fck@a00ti,wait-gate-clockH  core_12m_fckfixed-factor-clockI)4Jhdq_fck@a00ti,wait-gate-clockJ core_l3_ickfixed-factor-clock@)4Ksdrc_ick@a10ti,wait-gate-clockK gpmc_fckfixed-factor-clockK)4core_l4_ickfixed-factor-clockA)4Lmmchs2_ick@a10ti,omap3-interface-clockL mmchs1_ick@a10ti,omap3-interface-clockL hdq_ick@a10ti,omap3-interface-clockL mcspi4_ick@a10ti,omap3-interface-clockL mcspi3_ick@a10ti,omap3-interface-clockL mcspi2_ick@a10ti,omap3-interface-clockL mcspi1_ick@a10ti,omap3-interface-clockL i2c3_ick@a10ti,omap3-interface-clockL i2c2_ick@a10ti,omap3-interface-clockL i2c1_ick@a10ti,omap3-interface-clockL uart2_ick@a10ti,omap3-interface-clockL uart1_ick@a10ti,omap3-interface-clockL  gpt11_ick@a10ti,omap3-interface-clockL  gpt10_ick@a10ti,omap3-interface-clockL  mcbsp5_ick@a10ti,omap3-interface-clockL  mcbsp1_ick@a10ti,omap3-interface-clockL  omapctrl_ick@a10ti,omap3-interface-clockL dss_tv_fck@e00ti,gate-clock:dss_96m_fck@e00ti,gate-clockGdss2_alwon_fck@e00ti,gate-clock dummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock  Mgpt1_mux_fck@c40ti,composite-mux-clockB  @Ngpt1_fckti,composite-clockMNaes2_ick@a10ti,omap3-interface-clockL wkup_32k_fckfixed-factor-clockB)4Ogpio1_dbck@c00ti,gate-clockO sha12_ick@a10ti,omap3-interface-clockL wdt2_fck@c00ti,wait-gate-clockO wdt2_ick@c10ti,omap3-interface-clockP wdt1_ick@c10ti,omap3-interface-clockP gpio1_ick@c10ti,omap3-interface-clockP omap_32ksync_ick@c10ti,omap3-interface-clockP gpt12_ick@c10ti,omap3-interface-clockP gpt1_ick@c10ti,omap3-interface-clockP per_96m_fckfixed-factor-clock+)4 per_48m_fckfixed-factor-clock2)4Quart3_fck@1000ti,wait-gate-clockQ gpt2_gate_fck@1000ti,composite-gate-clock Rgpt2_mux_fck@1040ti,composite-mux-clockB @Sgpt2_fckti,composite-clockRSgpt3_gate_fck@1000ti,composite-gate-clock Tgpt3_mux_fck@1040ti,composite-mux-clockB @Ugpt3_fckti,composite-clockTUgpt4_gate_fck@1000ti,composite-gate-clock Vgpt4_mux_fck@1040ti,composite-mux-clockB @Wgpt4_fckti,composite-clockVWgpt5_gate_fck@1000ti,composite-gate-clock Xgpt5_mux_fck@1040ti,composite-mux-clockB @Ygpt5_fckti,composite-clockXYgpt6_gate_fck@1000ti,composite-gate-clock Zgpt6_mux_fck@1040ti,composite-mux-clockB @[gpt6_fckti,composite-clockZ[gpt7_gate_fck@1000ti,composite-gate-clock \gpt7_mux_fck@1040ti,composite-mux-clockB @]gpt7_fckti,composite-clock\]gpt8_gate_fck@1000ti,composite-gate-clock  ^gpt8_mux_fck@1040ti,composite-mux-clockB @_gpt8_fckti,composite-clock^_gpt9_gate_fck@1000ti,composite-gate-clock  `gpt9_mux_fck@1040ti,composite-mux-clockB @agpt9_fckti,composite-clock`aper_32k_alwon_fckfixed-factor-clockB)4bgpio6_dbck@1000ti,gate-clockbgpio5_dbck@1000ti,gate-clockbgpio4_dbck@1000ti,gate-clockbgpio3_dbck@1000ti,gate-clockbgpio2_dbck@1000ti,gate-clockb wdt3_fck@1000ti,wait-gate-clockb per_l4_ickfixed-factor-clockA)4cgpio6_ick@1010ti,omap3-interface-clockcgpio5_ick@1010ti,omap3-interface-clockcgpio4_ick@1010ti,omap3-interface-clockcgpio3_ick@1010ti,omap3-interface-clockcgpio2_ick@1010ti,omap3-interface-clockc wdt3_ick@1010ti,omap3-interface-clockc uart3_ick@1010ti,omap3-interface-clockc uart4_ick@1010ti,omap3-interface-clockcgpt9_ick@1010ti,omap3-interface-clockc gpt8_ick@1010ti,omap3-interface-clockc gpt7_ick@1010ti,omap3-interface-clockcgpt6_ick@1010ti,omap3-interface-clockcgpt5_ick@1010ti,omap3-interface-clockcgpt4_ick@1010ti,omap3-interface-clockcgpt3_ick@1010ti,omap3-interface-clockcgpt2_ick@1010ti,omap3-interface-clockcmcbsp2_ick@1010ti,omap3-interface-clockcmcbsp3_ick@1010ti,omap3-interface-clockcmcbsp4_ick@1010ti,omap3-interface-clockcmcbsp2_gate_fck@1000ti,composite-gate-clockmcbsp3_gate_fck@1000ti,composite-gate-clockmcbsp4_gate_fck@1000ti,composite-gate-clockemu_src_mux_ck@1140 ti,mux-clock def@gemu_src_ckti,clkdm-gate-clockghpclk_fck@1140ti,divider-clockh@pclkx2_fck@1140ti,divider-clockh@atclk_fck@1140ti,divider-clockh@traceclk_src_fck@1140 ti,mux-clock def@itraceclk_fck@1140ti,divider-clocki @secure_32k_fck fixed-clockjgpt12_fckfixed-factor-clockj)4wdt1_fckfixed-factor-clockj)4security_l4_ick2fixed-factor-clockA)4kaes1_ick@a14ti,omap3-interface-clockk rng_ick@a14ti,omap3-interface-clockk sha11_ick@a14ti,omap3-interface-clockk des1_ick@a14ti,omap3-interface-clockk cam_mclk@f00ti,gate-clocklocam_ick@f10!ti,omap3-no-wait-interface-clockAcsi2_96m_fck@f00ti,gate-clocksecurity_l3_ickfixed-factor-clock@)4mpka_ick@a14ti,omap3-interface-clockm icr_ick@a10ti,omap3-interface-clockL des2_ick@a10ti,omap3-interface-clockL mspro_ick@a10ti,omap3-interface-clockL mailboxes_ick@a10ti,omap3-interface-clockL ssi_l4_ickfixed-factor-clockA)4tsr1_fck@c00ti,wait-gate-clock   sr2_fck@c00ti,wait-gate-clock   sr_l4_ickfixed-factor-clockA)4dpll2_fck@40ti,divider-clock(@ndpll2_ck@4ti,omap3-dpll-clock n$@4odpll2_m2_ck@44ti,divider-clockoDpiva2_ck@0ti,wait-gate-clockpmodem_fck@a00ti,omap3-interface-clock  sad2d_ick@a10ti,omap3-interface-clock@ mad2d_ick@a18ti,omap3-interface-clock@ mspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock! qssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock! @$rssi_ssr_fck_3430es2ti,composite-clockqrsssi_sst_fck_3430es2fixed-factor-clocks)4hsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockK ssi_ick_3430es2@a10ti,omap3-ssi-interface-clockt  usim_gate_fck@c00ti,composite-gate-clockG  sys_d2_ckfixed-factor-clock )4vomap_96m_d2_fckfixed-factor-clockG)4womap_96m_d4_fckfixed-factor-clockG)4xomap_96m_d8_fckfixed-factor-clockG)4yomap_96m_d10_fckfixed-factor-clockG)4 zdpll5_m2_d4_ckfixed-factor-clocku)4{dpll5_m2_d8_ckfixed-factor-clocku)4|dpll5_m2_d16_ckfixed-factor-clocku)4}dpll5_m2_d20_ckfixed-factor-clocku)4~usim_mux_fck@c40ti,composite-mux-clock( vwxyz{|}~ @usim_fckti,composite-clockusim_ick@c10ti,omap3-interface-clockP  dpll5_ck@d04ti,omap3-dpll-clock   $ L 4dpll5_m2_ck@d50ti,divider-clock Pusgx_gate_fck@b00ti,composite-gate-clock( core_d3_ckfixed-factor-clock()4core_d4_ckfixed-factor-clock()4core_d6_ckfixed-factor-clock()4omap_192m_alwon_fckfixed-factor-clock$)4core_d2_ckfixed-factor-clock()4sgx_mux_fck@b40ti,composite-mux-clock , @sgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clock@ cpefuse_fck@a08ti,gate-clock  ts_fck@a08ti,gate-clockB usbtll_fck@a08ti,wait-gate-clocku usbtll_ick@a18ti,omap3-interface-clockL mmchs3_ick@a10ti,omap3-interface-clockL mmchs3_fck@a00ti,wait-gate-clock dss1_alwon_fck_3430es2@e00ti,dss-gate-clockodss_ick_3430es2@e10ti,omap3-dss-interface-clockAusbhost_120m_fck@1400ti,gate-clockuusbhost_48m_fck@1400ti,dss-gate-clock2usbhost_ick@1410ti,omap3-dss-interface-clockAuart4_fck@1000ti,wait-gate-clockQclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainlemu_clkdmti,clockdomainhdpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainod2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2 revsyscOfckick+ H2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intcH target-module@48056000ti,sysc-omap2ti,syscH`H`,H`(revsyscsyss#  Kick+ H`dma-controller@0ti,omap3630-sdmati,omap-sdma  *`gpio@48310000ti,omap3-gpioH1gpio17IYgpio@49050000ti,omap3-gpioIgpio2IYgpio@49052000ti,omap3-gpioI gpio3IYgpio@49054000ti,omap3-gpioI@ gpio4IYgpio@49056000ti,omap3-gpioI`!gpio5IYgpio@49058000ti,omap3-gpioI"gpio6IYserial@4806a000ti,omap3-uartH eH12txrxuart1lTdefaultbserial@4806c000ti,omap3-uartHeI34txrxuart2lTdefaultbbluetooth ti,wl1835-st y serial@49020000ti,omap3-uartIeJ56txrxuart3lTdefaultbi2c@48070000 ti,omap3-i2cH8txrx+i2c1Tdefaultb'@twl@48H  ti,twl4030Tdefaultbaudioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci  vacwatchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' regulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0regulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5regulator-vusb1v8ti,twl4030-vusb1v8regulator-vusb3v1ti,twl4030-vusb3v1regulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@regulator-vsimti,twl4030-vsimw@-gpioti,twl4030-gpioIYtwl4030-usbti,twl4030-usb pwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypad madcti,twl4030-madc3i2c@48072000 ti,omap3-i2cH 9txrx+i2c2 Edisabledi2c@48060000 ti,omap3-i2cH=txrx+i2c3Tdefaultbmailbox@48094000ti,omap3-mailboxmailboxH @LXjdsp | spi@48098000ti,omap2-mcspiH A+mcspi1@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH B+mcspi2 +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3 tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4FGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1=>txrxTdefaultb mmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrxTdefaultb+wlcore@2 ti,wl1835 mmc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx Edisabledmmu@480bd400ti,omap2-iommuH mmu_isp mmu@5d000000ti,omap2-iommu]mmu_iva Edisabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrx$mcbsp1 txrxfck Edisabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H Drevsyscsyssick+ H rng@0 ti,omap2-rng 4mcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetone$mcbsp2mcbsp2_sidetone!"txrxfckickEokayTdefaultbmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetone$mcbsp3mcbsp3_sidetonetxrxfckick Edisabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrx$mcbsp4txrxfck3 Edisabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrx$mcbsp5txrxfck Edisabledsham@480c3000ti,omap3-shamshamH 0d1Erxtarget-module@48318000ti,sysc-omap2-timerti,syscH1H1H1revsyscsyss' fckick+ H1DXtimer@0ti,omap3430-timerfck%crBtarget-module@49032000ti,sysc-omap2-timerti,syscI I I revsyscsyss' fckick+ I timer@0ti,omap3430-timer&timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11target-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@revsyscsyss' fckick+ H0@timer@0ti,omap3430-timer_cusbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ ehci-phyohci@48064400ti,ohci-omap3HDLehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmcgpmcnrxtx+IYTdefaultb0nand@0,0ti,omap2-nand   micron,mt29c4g96maz'9bch8IZh,z,",(6@RR("+Eokayonenand@0,0ti,omap2-onenand :IYk{'Zh`z`  ``rrZ -"ZI.+ Edisabledusb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hsDOW `o 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smartreflex@480c9000ti,omap3-smartreflex-mpu-ivatarget-module@50000000ti,sysc-omap4ti,syscPP revsysc  fckick+ Popp-tableoperating-points-v2-ti-cpuopp50-300000000ssssss  opp100-600000000#FOOOOOO opp130-800000000/777777 opp1g-1000000000;  (opp_supplyti,omap-opp-supply 3thermal-zonescpu_thermal N d rN  memory@80000000xmemory soundti,omap-twl4030 igep2 regulator-vdd33regulator-fixedvdd33 gpio_leds gpio-ledsTdefaultbuser0 omap3:red:user0  offuser1 omap3:green:user1  offuser2 omap3:red:user1  offboot omap3:green:boot  onhsusb2_phyusb-nop-xceiv regulator-lbep5clwmc-wlenregulator-fixedregulator-lbep5clwmc-wlen2Z2Z   compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supplyinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinsphandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersreg-namesti,sysc-sidleti,sysc-maskti,sysc-midleti,syss-mask#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedenable-gpiosmax-speedbci3v1-supplyio-channelsio-channel-namesti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cellsstatus#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvmmc_aux-supplybus-widthcd-gpiosnon-removable#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,sync-readgpmc,sync-writegpmc,burst-lengthgpmc,burst-wrapgpmc,burst-readgpmc,burst-writegpmc,mux-add-datagpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowerti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorsti,modelti,mcbspregulator-always-onlabeldefault-statereset-gpiosgpioenable-active-high