8 ( 0ti,omap3-gta04ti,omap3630ti,omap36xxti,omap3 +7Goldelico GTA04A4/Letux 2804chosen=/ocp@68000000/serial@49020000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/serial@4806a000`/ocp@68000000/serial@4806c000h/ocp@68000000/serial@49020000p/ocp@68000000/serial@49042000x/spi_lcd/td028ttec1@0 /connectorcpus+cpu@0arm,cortex-a8cpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+"7Urdefaultpinmux_hsusb2_pins0      pinmux_uart1_pinsRLpinmux_uart2_pinsJHpinmux_uart3_pinsnppinmux_mmc1_pins0backlight_pins_pinmux+pinmux_dss_dpi_pinspinmux_gps_pinsF hdq_pinspinmux_bmp085_pinspinmux_bma180_pins pinmux_itg3200_pinspinmux_hmc5843_pinspinmux_penirq_pinsdpinmux_camera_pins pinmux_mcbsp1_pins0\^`bfhpinmux_mcbsp2_pins   pinmux_mcbsp3_pins <>@B pinmux_mcbsp4_pinsTVZ pinmux_twl4030_pinsAscm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+mcbsp5_mux_fck@68ti,composite-mux-clock h mcbsp5_fckti,composite-clock mcbsp1_mux_fck@4ti,composite-mux-clock  mcbsp1_fckti,composite-clock mcbsp2_mux_fck@4ti,composite-mux-clock mcbsp2_fckti,composite-clockmcbsp3_mux_fck@68ti,composite-mux-clock hmcbsp3_fckti,composite-clock mcbsp4_mux_fck@68ti,composite-mux-clock hmcbsp4_fckti,composite-clock clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+"7Upinmux_gpio1_pinsAApinmux_twl4030_vpins aes@480c5000 ti,omap3-aesaesH PPAB txrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clock%p0!sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockGRdpll3_m2x2_ckfixed-factor-clockGR dpll4_x2_ckfixed-factor-clockGRcorex2_fckfixed-factor-clock GR"wkup_l4_ickfixed-factor-clock!GRQcorex2_d3_fckfixed-factor-clock"GRcorex2_d5_fckfixed-factor-clock"GRclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockCvirt_12m_ck fixed-clockvirt_13m_ck fixed-clock]@virt_19200000_ck fixed-clock$virt_26000000_ck fixed-clockvirt_38_4m_ck fixed-clockIdpll4_ck@d00ti,omap3-dpll-per-j-type-clock!! D 0dpll4_m2_ck@d48ti,divider-clock%? H0#dpll4_m2x2_mul_ckfixed-factor-clock#GR$dpll4_m2x2_ck@d00ti,hsdiv-gate-clock$ \%omap_96m_alwon_fckfixed-factor-clock%GR,dpll3_ck@d00ti,omap3-dpll-core-clock!! @ 0dpll3_m3_ck@1140ti,divider-clock%@0&dpll3_m3x2_mul_ckfixed-factor-clock&GR'dpll3_m3x2_ck@d00ti,hsdiv-gate-clock'  \(emu_core_alwon_ckfixed-factor-clock(GResys_altclk fixed-clock1mcbsp_clks fixed-clock dpll3_m2_ck@d40ti,divider-clock% @0core_ckfixed-factor-clockGR)dpll1_fck@940ti,divider-clock)% @0*dpll1_ck@904ti,omap3-dpll-clock!*  $ @ 4dpll1_x2_ckfixed-factor-clockGR+dpll1_x2m2_ck@944ti,divider-clock+% D0?cm_96m_fckfixed-factor-clock,GR-omap_96m_fck@d40 ti,mux-clock-! @Hdpll4_m3_ck@e40ti,divider-clock% @0.dpll4_m3x2_mul_ckfixed-factor-clock.GR/dpll4_m3x2_ck@d00ti,hsdiv-gate-clock/ \0omap_54m_fck@d40 ti,mux-clock01 @;cm_96m_d2_fckfixed-factor-clock-GR2omap_48m_fck@d40 ti,mux-clock21 @3omap_12m_fckfixed-factor-clock3GRJdpll4_m4_ck@e40ti,divider-clock%@04dpll4_m4x2_mul_ckti,fixed-factor-clock4r5dpll4_m4x2_ck@d00ti,gate-clock5 \dpll4_m5_ck@f40ti,divider-clock%?@06dpll4_m5x2_mul_ckti,fixed-factor-clock6r7dpll4_m5x2_ck@d00ti,hsdiv-gate-clock7 \mdpll4_m6_ck@1140ti,divider-clock%?@08dpll4_m6x2_mul_ckfixed-factor-clock8GR9dpll4_m6x2_ck@d00ti,hsdiv-gate-clock9 \:emu_per_alwon_ckfixed-factor-clock:GRfclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock) p<clkout2_src_mux_ck@d70ti,composite-mux-clock)!-; p=clkout2_src_ckti,composite-clock<=>sys_clkout2@d70ti,divider-clock>%@ pmpu_ckfixed-factor-clock?GR@arm_fck@924ti,divider-clock@ $%emu_mpu_alwon_ckfixed-factor-clock@GRgl3_ick@a40ti,divider-clock)% @0Al4_ick@a40ti,divider-clockA% @0Brm_ick@c40ti,divider-clockB% @0gpt10_gate_fck@a00ti,composite-gate-clock!  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gpt2_gate_fck@1000ti,composite-gate-clock!Sgpt2_mux_fck@1040ti,composite-mux-clockC!@Tgpt2_fckti,composite-clockSTgpt3_gate_fck@1000ti,composite-gate-clock!Ugpt3_mux_fck@1040ti,composite-mux-clockC!@Vgpt3_fckti,composite-clockUVgpt4_gate_fck@1000ti,composite-gate-clock!Wgpt4_mux_fck@1040ti,composite-mux-clockC!@Xgpt4_fckti,composite-clockWXgpt5_gate_fck@1000ti,composite-gate-clock!Ygpt5_mux_fck@1040ti,composite-mux-clockC!@Zgpt5_fckti,composite-clockYZgpt6_gate_fck@1000ti,composite-gate-clock![gpt6_mux_fck@1040ti,composite-mux-clockC!@\gpt6_fckti,composite-clock[\gpt7_gate_fck@1000ti,composite-gate-clock!]gpt7_mux_fck@1040ti,composite-mux-clockC!@^gpt7_fckti,composite-clock]^gpt8_gate_fck@1000ti,composite-gate-clock! _gpt8_mux_fck@1040ti,composite-mux-clockC!@`gpt8_fckti,composite-clock_`gpt9_gate_fck@1000ti,composite-gate-clock! agpt9_mux_fck@1040ti,composite-mux-clockC!@bgpt9_fckti,composite-clockabper_32k_alwon_fckfixed-factor-clockCGRcgpio6_dbck@1000ti,gate-clockcgpio5_dbck@1000ti,gate-clockcgpio4_dbck@1000ti,gate-clockcgpio3_dbck@1000ti,gate-clockcgpio2_dbck@1000ti,gate-clockc wdt3_fck@1000ti,wait-gate-clockc per_l4_ickfixed-factor-clockBGRdgpio6_ick@1010ti,omap3-interface-clockdgpio5_ick@1010ti,omap3-interface-clockdgpio4_ick@1010ti,omap3-interface-clockdgpio3_ick@1010ti,omap3-interface-clockdgpio2_ick@1010ti,omap3-interface-clockd wdt3_ick@1010ti,omap3-interface-clockd uart3_ick@1010ti,omap3-interface-clockd uart4_ick@1010ti,omap3-interface-clockdgpt9_ick@1010ti,omap3-interface-clockd gpt8_ick@1010ti,omap3-interface-clockd gpt7_ick@1010ti,omap3-interface-clockdgpt6_ick@1010ti,omap3-interface-clockdgpt5_ick@1010ti,omap3-interface-clockdgpt4_ick@1010ti,omap3-interface-clockdgpt3_ick@1010ti,omap3-interface-clockdgpt2_ick@1010ti,omap3-interface-clockdmcbsp2_ick@1010ti,omap3-interface-clockdmcbsp3_ick@1010ti,omap3-interface-clockdmcbsp4_ick@1010ti,omap3-interface-clockdmcbsp2_gate_fck@1000ti,composite-gate-clock mcbsp3_gate_fck@1000ti,composite-gate-clock mcbsp4_gate_fck@1000ti,composite-gate-clock emu_src_mux_ck@1140 ti,mux-clock!efg@hemu_src_ckti,clkdm-gate-clockhipclk_fck@1140ti,divider-clocki%@0pclkx2_fck@1140ti,divider-clocki%@0atclk_fck@1140ti,divider-clocki%@0traceclk_src_fck@1140 ti,mux-clock!efg@jtraceclk_fck@1140ti,divider-clockj %@0secure_32k_fck fixed-clockkgpt12_fckfixed-factor-clockkGRwdt1_fckfixed-factor-clockkGRsecurity_l4_ick2fixed-factor-clockBGRlaes1_ick@a14ti,omap3-interface-clockl rng_ick@a14ti,omap3-interface-clockl sha11_ick@a14ti,omap3-interface-clockl des1_ick@a14ti,omap3-interface-clockl cam_mclk@f00ti,gate-clockmcam_ick@f10!ti,omap3-no-wait-interface-clockBcsi2_96m_fck@f00ti,gate-clocksecurity_l3_ickfixed-factor-clockAGRnpka_ick@a14ti,omap3-interface-clockn icr_ick@a10ti,omap3-interface-clockM des2_ick@a10ti,omap3-interface-clockM mspro_ick@a10ti,omap3-interface-clockM mailboxes_ick@a10ti,omap3-interface-clockM ssi_l4_ickfixed-factor-clockBGRusr1_fck@c00ti,wait-gate-clock! sr2_fck@c00ti,wait-gate-clock! sr_l4_ickfixed-factor-clockBGRdpll2_fck@40ti,divider-clock)%@0odpll2_ck@4ti,omap3-dpll-clock!o$@4pdpll2_m2_ck@44ti,divider-clockp%D0qiva2_ck@0ti,wait-gate-clockqmodem_fck@a00ti,omap3-interface-clock! sad2d_ick@a10ti,omap3-interface-clockA mad2d_ick@a18ti,omap3-interface-clockA mspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock" rssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock" @$sssi_ssr_fck_3430es2ti,composite-clockrstssi_sst_fck_3430es2fixed-factor-clocktGRhsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockL ssi_ick_3430es2@a10ti,omap3-ssi-interface-clocku usim_gate_fck@c00ti,composite-gate-clockH  sys_d2_ckfixed-factor-clock!GRwomap_96m_d2_fckfixed-factor-clockHGRxomap_96m_d4_fckfixed-factor-clockHGRyomap_96m_d8_fckfixed-factor-clockHGRzomap_96m_d10_fckfixed-factor-clockHGR {dpll5_m2_d4_ckfixed-factor-clockvGR|dpll5_m2_d8_ckfixed-factor-clockvGR}dpll5_m2_d16_ckfixed-factor-clockvGR~dpll5_m2_d20_ckfixed-factor-clockvGRusim_mux_fck@c40ti,composite-mux-clock(!wxyz{|}~ @0usim_fckti,composite-clockusim_ick@c10ti,omap3-interface-clockQ  dpll5_ck@d04ti,omap3-dpll-clock!!  $ L 4dpll5_m2_ck@d50ti,divider-clock% P0vsgx_gate_fck@b00ti,composite-gate-clock) core_d3_ckfixed-factor-clock)GRcore_d4_ckfixed-factor-clock)GRcore_d6_ckfixed-factor-clock)GRomap_192m_alwon_fckfixed-factor-clock%GRcore_d2_ckfixed-factor-clock)GRsgx_mux_fck@b40ti,composite-mux-clock - @sgx_fckti,composite-clock sgx_ick@b10ti,wait-gate-clockA cpefuse_fck@a08ti,gate-clock! ts_fck@a08ti,gate-clockC usbtll_fck@a08ti,wait-gate-clockv usbtll_ick@a18ti,omap3-interface-clockM mmchs3_ick@a10ti,omap3-interface-clockM mmchs3_fck@a00ti,wait-gate-clock dss1_alwon_fck_3430es2@e00ti,dss-gate-clockdss_ick_3430es2@e10ti,omap3-dss-interface-clockBusbhost_120m_fck@1400ti,gate-clockvusbhost_48m_fck@1400ti,dss-gate-clock3usbhost_ick@1410ti,omap3-dss-interface-clockBuart4_fck@1000ti,wait-gate-clockRclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainlemu_clkdmti,clockdomainidpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainpd2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2 revsyscPfckick+ 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mcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp4 txrx fckokrdefault %mcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp5 txrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1E rxtarget-module@48318000ti,sysc-omap2-timerti,syscH1H1H1revsyscsyss' #fckick+ H1timer@0ti,omap3430-timerfck%Ctarget-module@49032000ti,sysc-omap2-timerti,syscI I I revsyscsyss' #fckick+ I timer@0ti,omap3430-timer&timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11,target-module@48304000ti,sysc-omap2-timerti,syscH0@H0@H0@revsyscsyss' #fckick+ H0@timer@0ti,omap3430-timer_*usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ :ehci-phyohci@48064400ti,ohci-omap3HDLEehci@48064800 ti,ehci-omapHHM]gpmc@6e000000ti,omap3430-gpmcgpmcn rxtxbn+"gw0nand@0,0ti,omap2-nand  ham1 +,,",!60(?@NR_Rp(x-loader@0 X-Loaderbootloaders@80000U-Bootbootloaders_env@240000 U-Boot Env$kernel@280000Kernel(`filesystem@880000 File Systemusb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs ] usb2-phy2dss@48050000 ti,omap3-dssHokay dss_corefck+rdefaultdispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH okay dss_vencfcktv_dac_clkportendpoint   &.portendpoint  9)ssi-controller@48058000 ti,omap3-ssissiokHHsysgddGgdd_mpu+ t ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFserial@49042000ti,omap3-uartI PQR txrxuart4lregulator-abb-mpu ti,abb-v1 abb_mpu_iva+H0rH0hbase-addressint-address D! ] n` ~sO7pinmux@480025a0 ti,omap3-padconfpinctrl-singleH%\+"7Urdefaultpinmux_hsusb2_2_pins0PRT V X Z spi_gpio_pinmux 8FHD'isp@480bc000 ti,omap3-ispH H   ports+port@0endpoint  +     bandgap@48002524H%$ti,omap36xx-bandgap !target-module@480cb000ti,sysc-omap3630-srti,syscsmartreflex_coreH 8sysc fck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3630-srti,syscsmartreflex_mpu_ivaH 8sysc fck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivatarget-module@50000000ti,sysc-omap4ti,syscPP revsysc   fckick+ Popp-tableoperating-points-v2-ti-cpuopp50-300000000  ssssss ) :opp100-600000000 #F OOOOOO )opp130-800000000 / 777777 )opp1g-1000000000 ;  ) Fopp_supplyti,omap-opp-supply Qthermal-zonescpu_thermal l  N  !memory@80000000memory fixedregulatorregulator-fixedldo_3v32Z2Z4oscillator fixed-clockgpio-keys gpio-keysaux-buttonaux  " antenna-detect gpio-keysgps-antenna-button GPS_EXT_ANT      soundti,omap-twl4030 gta04 #sound_telephonysimple-audio-card GTA04 voice $ 4$ Si2s l simple-audio-card,cpu %simple-audio-card,codec &$gsm_codecoption,gtm601&spi_lcd spi-gpio+rdefault' "  " " " td028ttec1@0tpo,td028ttec1     #(lcdportendpoint )backlightpwm-backlight -* 2backlight, < (2<FPZd N rdefault+(dmtimer-pwmti,omap-dmtimer-pwm g, q*hsusb2_phyusb-nop-xceiv connectorcomposite-video-connectortvportendpoint -/opa362 ti,opa362 "ports+port@0endpoint .port@1endpoint /-wifi_pwrseqmmc-pwrseq-simple 0pinmux_mcbsp1@48002274pinctrl-singleH"t+ 7 Urdefault1pinmux_mcbsp1_devconf0_pins 1pinmux_tv_out@480022d8pinctrl-singleH"+ 7 Urdefault2pinmux_tv_acbias_devconf1_pins 2 compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2serial0serial1serial2serial3display0display1device_typeregclocksclock-namesclock-latencyoperating-points-v2vbb-supplycpu0-supplyinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0phandlepinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersreg-namesti,sysc-sidleti,sysc-maskti,sysc-midleti,syss-mask#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedsirf,onoff-gpioslna-supplyvcc-supplyti,enable-vibrati,ramp_delay_valueti,use_poweroffbci3v1-supplyio-channelsio-channel-namesti,bb-uvoltti,bb-uampregulator-always-onti,pullupsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnsstatus#io-channel-cellspintcrl-0labellinux,default-triggerti,x-plate-ohmstouchscreen-size-xtouchscreen-size-ytouchscreen-max-pressuretouchscreen-fuzz-xtouchscreen-fuzz-ytouchscreen-fuzz-pressuretouchscreen-inverted-y#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplybus-widthti,non-removablebroken-cdcap-power-off-cardmmc-pwrseq#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsti,nand-ecc-optrb-gpiosnand-bus-widthgpmc,device-widthgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-off-nsgpmc,we-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,sync-clk-psmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdds_dsi-supplyvdda-supplyremote-endpointti,channelsti,invert-polaritydata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-typeti,isp-clock-divisorti,strobe-modedata-shifthsync-activevsync-activedata-activepclk-sample#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modeti,absolute-max-voltage-uvpolling-delay-passivepolling-delaycoefficientsthermal-sensorslinux,codewakeup-sourcelinux,input-typedebounce-intervalti,modelti,mcbspsimple-audio-card,namesimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersimple-audio-card,formatsimple-audio-card,bitclock-inversionsimple-audio-card,frame-inversionsound-daigpio-sckgpio-misogpio-mosics-gpiosnum-chipselectsspi-max-frequencyspi-cpolspi-cphaspi-cs-highbacklightpwmspwm-namesbrightness-levelsdefault-brightness-levelti,timersti,clock-sourcereset-gpiosenable-gpiospinctrl-single,bit-per-muxpinctrl-single,bits