8( "ti,omap3-evmti,omap3430ti,omap3 +7TI OMAP35XX EVM (TMDSEVM3530)chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000 d/displaycpus+cpu@0arm,cortex-a8mcpuy}cpupmu@54000000arm,cortex-a8-pmuyTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-busyh +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-busy + pinmux@30 ti,omap3-padconfpinctrl-singley08+-JdefaultXbpinmux_twl4030_pinsjAbpinmux_dss_dpi_pins2jbpinmux_mmc1_pinsPj "$&bpinmux_mmc2_pinsPj(*,.02468:bpinmux_uart3_pinsjnApbpinmux_ehci_port_select_pinsjbpinmux_hsusb2_pins0j      bpinmux_wl12xx_gpiojPNbpinmux_smsc911x_pinsjbscm_conf@270sysconsimple-busyp0+ p0bpbias_regulator@2b0ti,pbias-omap3ti,pbias-omapy~pbias_mmc_omap2430pbias_mmc_omap2430w@-bclocks+mcbsp5_mux_fck@68ti,composite-mux-clock} yhb mcbsp5_fckti,composite-clock} bmcbsp1_mux_fck@4ti,composite-mux-clock} yb mcbsp1_fckti,composite-clock} bmcbsp2_mux_fck@4ti,composite-mux-clock} ybmcbsp2_fckti,composite-clock}bmcbsp3_mux_fck@68ti,composite-mux-clock} yhbmcbsp3_fckti,composite-clock}bmcbsp4_mux_fck@68ti,composite-mux-clock} yhbmcbsp4_fckti,composite-clock}bclockdomainspinmux@a00 ti,omap3-padconfpinctrl-singley \+-pinmux_twl4030_vpins jbpinmux_dss_dpi_pins10j  baes@480c5000 ti,omap3-aesaesyH PPABtxrxprm@48306000 ti,omap3-prmyH0`@ clocks+virt_16_8m_ck fixed-clockYbosc_sys_ck@d40 ti,mux-clock}y @bsys_ck@1270ti,divider-clock}ypb!sys_clkout1@d70ti,gate-clock}y pdpll3_x2_ckfixed-factor-clock}*dpll3_m2x2_ckfixed-factor-clock}*b dpll4_x2_ckfixed-factor-clock}*corex2_fckfixed-factor-clock} *b"wkup_l4_ickfixed-factor-clock}!*bQcorex2_d3_fckfixed-factor-clock}"*bcorex2_d5_fckfixed-factor-clock}"*bclockdomainscm@48004000 ti,omap3-cmyH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockbCvirt_12m_ck fixed-clockbvirt_13m_ck fixed-clock]@bvirt_19200000_ck fixed-clock$bvirt_26000000_ck fixed-clockbvirt_38_4m_ck fixed-clockIbdpll4_ck@d00ti,omap3-dpll-per-clock}!!y D 0bdpll4_m2_ck@d48ti,divider-clock}?y Hb#dpll4_m2x2_mul_ckfixed-factor-clock}#*b$dpll4_m2x2_ck@d00ti,gate-clock}$y 4b%omap_96m_alwon_fckfixed-factor-clock}%*b,dpll3_ck@d00ti,omap3-dpll-core-clock}!!y @ 0bdpll3_m3_ck@1140ti,divider-clock}y@b&dpll3_m3x2_mul_ckfixed-factor-clock}&*b'dpll3_m3x2_ck@d00ti,gate-clock}' y 4b(emu_core_alwon_ckfixed-factor-clock}(*besys_altclk fixed-clockb1mcbsp_clks fixed-clockb dpll3_m2_ck@d40ti,divider-clock}y @bcore_ckfixed-factor-clock}*b)dpll1_fck@940ti,divider-clock})y @b*dpll1_ck@904ti,omap3-dpll-clock}!*y  $ @ 4bdpll1_x2_ckfixed-factor-clock}*b+dpll1_x2m2_ck@944ti,divider-clock}+y Db?cm_96m_fckfixed-factor-clock},*b-omap_96m_fck@d40 ti,mux-clock}-!y @bHdpll4_m3_ck@e40ti,divider-clock} y@b.dpll4_m3x2_mul_ckfixed-factor-clock}.*b/dpll4_m3x2_ck@d00ti,gate-clock}/y 4b0omap_54m_fck@d40 ti,mux-clock}01y @b;cm_96m_d2_fckfixed-factor-clock}-*b2omap_48m_fck@d40 ti,mux-clock}21y @b3omap_12m_fckfixed-factor-clock}3*bJdpll4_m4_ck@e40ti,divider-clock}y@b4dpll4_m4x2_mul_ckti,fixed-factor-clock}4JXeb5dpll4_m4x2_ck@d00ti,gate-clock}5y 4ebdpll4_m5_ck@f40ti,divider-clock}?y@b6dpll4_m5x2_mul_ckti,fixed-factor-clock}6JXeb7dpll4_m5x2_ck@d00ti,gate-clock}7y 4ebmdpll4_m6_ck@1140ti,divider-clock}?y@b8dpll4_m6x2_mul_ckfixed-factor-clock}8*b9dpll4_m6x2_ck@d00ti,gate-clock}9y 4b:emu_per_alwon_ckfixed-factor-clock}:*bfclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock})y pb<clkout2_src_mux_ck@d70ti,composite-mux-clock})!-;y pb=clkout2_src_ckti,composite-clock}<=b>sys_clkout2@d70ti,divider-clock}>@y pxmpu_ckfixed-factor-clock}?*b@arm_fck@924ti,divider-clock}@y $emu_mpu_alwon_ckfixed-factor-clock}@*bgl3_ick@a40ti,divider-clock})y @bAl4_ick@a40ti,divider-clock}Ay @bBrm_ick@c40ti,divider-clock}By @gpt10_gate_fck@a00ti,composite-gate-clock}! y bDgpt10_mux_fck@a40ti,composite-mux-clock}C!y @bEgpt10_fckti,composite-clock}DEgpt11_gate_fck@a00ti,composite-gate-clock}! y bFgpt11_mux_fck@a40ti,composite-mux-clock}C!y @bGgpt11_fckti,composite-clock}FGcore_96m_fckfixed-factor-clock}H*bmmchs2_fck@a00ti,wait-gate-clock}y bmmchs1_fck@a00ti,wait-gate-clock}y bi2c3_fck@a00ti,wait-gate-clock}y bi2c2_fck@a00ti,wait-gate-clock}y bi2c1_fck@a00ti,wait-gate-clock}y bmcbsp5_gate_fck@a00ti,composite-gate-clock}  y b mcbsp1_gate_fck@a00ti,composite-gate-clock}  y b core_48m_fckfixed-factor-clock}3*bImcspi4_fck@a00ti,wait-gate-clock}Iy bmcspi3_fck@a00ti,wait-gate-clock}Iy bmcspi2_fck@a00ti,wait-gate-clock}Iy bmcspi1_fck@a00ti,wait-gate-clock}Iy buart2_fck@a00ti,wait-gate-clock}Iy buart1_fck@a00ti,wait-gate-clock}Iy  bcore_12m_fckfixed-factor-clock}J*bKhdq_fck@a00ti,wait-gate-clock}Ky bcore_l3_ickfixed-factor-clock}A*bLsdrc_ick@a10ti,wait-gate-clock}Ly bgpmc_fckfixed-factor-clock}L*core_l4_ickfixed-factor-clock}B*bMmmchs2_ick@a10ti,omap3-interface-clock}My bmmchs1_ick@a10ti,omap3-interface-clock}My bhdq_ick@a10ti,omap3-interface-clock}My bmcspi4_ick@a10ti,omap3-interface-clock}My bmcspi3_ick@a10ti,omap3-interface-clock}My bmcspi2_ick@a10ti,omap3-interface-clock}My bmcspi1_ick@a10ti,omap3-interface-clock}My bi2c3_ick@a10ti,omap3-interface-clock}My bi2c2_ick@a10ti,omap3-interface-clock}My bi2c1_ick@a10ti,omap3-interface-clock}My buart2_ick@a10ti,omap3-interface-clock}My buart1_ick@a10ti,omap3-interface-clock}My  bgpt11_ick@a10ti,omap3-interface-clock}My  bgpt10_ick@a10ti,omap3-interface-clock}My  bmcbsp5_ick@a10ti,omap3-interface-clock}My  bmcbsp1_ick@a10ti,omap3-interface-clock}My  bomapctrl_ick@a10ti,omap3-interface-clock}My bdss_tv_fck@e00ti,gate-clock};ybdss_96m_fck@e00ti,gate-clock}Hybdss2_alwon_fck@e00ti,gate-clock}!ybdummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock}!y bNgpt1_mux_fck@c40ti,composite-mux-clock}C!y @bOgpt1_fckti,composite-clock}NObaes2_ick@a10ti,omap3-interface-clock}My bwkup_32k_fckfixed-factor-clock}C*bPgpio1_dbck@c00ti,gate-clock}Py bsha12_ick@a10ti,omap3-interface-clock}My bwdt2_fck@c00ti,wait-gate-clock}Py bwdt2_ick@c10ti,omap3-interface-clock}Qy bwdt1_ick@c10ti,omap3-interface-clock}Qy bgpio1_ick@c10ti,omap3-interface-clock}Qy bomap_32ksync_ick@c10ti,omap3-interface-clock}Qy bgpt12_ick@c10ti,omap3-interface-clock}Qy bgpt1_ick@c10ti,omap3-interface-clock}Qy bper_96m_fckfixed-factor-clock},*bper_48m_fckfixed-factor-clock}3*bRuart3_fck@1000ti,wait-gate-clock}Ry bgpt2_gate_fck@1000ti,composite-gate-clock}!ybSgpt2_mux_fck@1040ti,composite-mux-clock}C!y@bTgpt2_fckti,composite-clock}STbgpt3_gate_fck@1000ti,composite-gate-clock}!ybUgpt3_mux_fck@1040ti,composite-mux-clock}C!y@bVgpt3_fckti,composite-clock}UVgpt4_gate_fck@1000ti,composite-gate-clock}!ybWgpt4_mux_fck@1040ti,composite-mux-clock}C!y@bXgpt4_fckti,composite-clock}WXgpt5_gate_fck@1000ti,composite-gate-clock}!ybYgpt5_mux_fck@1040ti,composite-mux-clock}C!y@bZgpt5_fckti,composite-clock}YZgpt6_gate_fck@1000ti,composite-gate-clock}!yb[gpt6_mux_fck@1040ti,composite-mux-clock}C!y@b\gpt6_fckti,composite-clock}[\gpt7_gate_fck@1000ti,composite-gate-clock}!yb]gpt7_mux_fck@1040ti,composite-mux-clock}C!y@b^gpt7_fckti,composite-clock}]^gpt8_gate_fck@1000ti,composite-gate-clock}! yb_gpt8_mux_fck@1040ti,composite-mux-clock}C!y@b`gpt8_fckti,composite-clock}_`gpt9_gate_fck@1000ti,composite-gate-clock}! ybagpt9_mux_fck@1040ti,composite-mux-clock}C!y@bbgpt9_fckti,composite-clock}abper_32k_alwon_fckfixed-factor-clock}C*bcgpio6_dbck@1000ti,gate-clock}cybgpio5_dbck@1000ti,gate-clock}cybgpio4_dbck@1000ti,gate-clock}cybgpio3_dbck@1000ti,gate-clock}cybgpio2_dbck@1000ti,gate-clock}cy bwdt3_fck@1000ti,wait-gate-clock}cy bper_l4_ickfixed-factor-clock}B*bdgpio6_ick@1010ti,omap3-interface-clock}dybgpio5_ick@1010ti,omap3-interface-clock}dybgpio4_ick@1010ti,omap3-interface-clock}dybgpio3_ick@1010ti,omap3-interface-clock}dybgpio2_ick@1010ti,omap3-interface-clock}dy bwdt3_ick@1010ti,omap3-interface-clock}dy buart3_ick@1010ti,omap3-interface-clock}dy buart4_ick@1010ti,omap3-interface-clock}dybgpt9_ick@1010ti,omap3-interface-clock}dy bgpt8_ick@1010ti,omap3-interface-clock}dy bgpt7_ick@1010ti,omap3-interface-clock}dybgpt6_ick@1010ti,omap3-interface-clock}dybgpt5_ick@1010ti,omap3-interface-clock}dybgpt4_ick@1010ti,omap3-interface-clock}dybgpt3_ick@1010ti,omap3-interface-clock}dybgpt2_ick@1010ti,omap3-interface-clock}dybmcbsp2_ick@1010ti,omap3-interface-clock}dybmcbsp3_ick@1010ti,omap3-interface-clock}dybmcbsp4_ick@1010ti,omap3-interface-clock}dybmcbsp2_gate_fck@1000ti,composite-gate-clock} ybmcbsp3_gate_fck@1000ti,composite-gate-clock} ybmcbsp4_gate_fck@1000ti,composite-gate-clock} ybemu_src_mux_ck@1140 ti,mux-clock}!efgy@bhemu_src_ckti,clkdm-gate-clock}hbipclk_fck@1140ti,divider-clock}iy@pclkx2_fck@1140ti,divider-clock}iy@atclk_fck@1140ti,divider-clock}iy@traceclk_src_fck@1140 ti,mux-clock}!efgy@bjtraceclk_fck@1140ti,divider-clock}j y@secure_32k_fck fixed-clockbkgpt12_fckfixed-factor-clock}k*bwdt1_fckfixed-factor-clock}k*security_l4_ick2fixed-factor-clock}B*blaes1_ick@a14ti,omap3-interface-clock}ly rng_ick@a14ti,omap3-interface-clock}ly bsha11_ick@a14ti,omap3-interface-clock}ly des1_ick@a14ti,omap3-interface-clock}ly cam_mclk@f00ti,gate-clock}myecam_ick@f10!ti,omap3-no-wait-interface-clock}Bybcsi2_96m_fck@f00ti,gate-clock}ybsecurity_l3_ickfixed-factor-clock}A*bnpka_ick@a14ti,omap3-interface-clock}ny icr_ick@a10ti,omap3-interface-clock}My des2_ick@a10ti,omap3-interface-clock}My mspro_ick@a10ti,omap3-interface-clock}My mailboxes_ick@a10ti,omap3-interface-clock}My ssi_l4_ickfixed-factor-clock}B*busr1_fck@c00ti,wait-gate-clock}!y bsr2_fck@c00ti,wait-gate-clock}!y bsr_l4_ickfixed-factor-clock}B*dpll2_fck@40ti,divider-clock})y@bodpll2_ck@4ti,omap3-dpll-clock}!oy$@4bpdpll2_m2_ck@44ti,divider-clock}pyDbqiva2_ck@0ti,wait-gate-clock}qybmodem_fck@a00ti,omap3-interface-clock}!y bsad2d_ick@a10ti,omap3-interface-clock}Ay bmad2d_ick@a18ti,omap3-interface-clock}Ay bmspro_fck@a00ti,wait-gate-clock}y ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock}"y brssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock}"y @$bsssi_ssr_fck_3430es2ti,composite-clock}rsbtssi_sst_fck_3430es2fixed-factor-clock}t*b hsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clock}Ly bssi_ick_3430es2@a10ti,omap3-ssi-interface-clock}uy b usim_gate_fck@c00ti,composite-gate-clock}H y bsys_d2_ckfixed-factor-clock}!*bwomap_96m_d2_fckfixed-factor-clock}H*bxomap_96m_d4_fckfixed-factor-clock}H*byomap_96m_d8_fckfixed-factor-clock}H*bzomap_96m_d10_fckfixed-factor-clock}H* b{dpll5_m2_d4_ckfixed-factor-clock}v*b|dpll5_m2_d8_ckfixed-factor-clock}v*b}dpll5_m2_d16_ckfixed-factor-clock}v*b~dpll5_m2_d20_ckfixed-factor-clock}v*busim_mux_fck@c40ti,composite-mux-clock(}!wxyz{|}~y @busim_fckti,composite-clock}usim_ick@c10ti,omap3-interface-clock}Qy  bdpll5_ck@d04ti,omap3-dpll-clock}!!y  $ L 4bdpll5_m2_ck@d50ti,divider-clock}y Pbvsgx_gate_fck@b00ti,composite-gate-clock})y bcore_d3_ckfixed-factor-clock})*bcore_d4_ckfixed-factor-clock})*bcore_d6_ckfixed-factor-clock})*bomap_192m_alwon_fckfixed-factor-clock}%*bcore_d2_ckfixed-factor-clock})*bsgx_mux_fck@b40ti,composite-mux-clock }-y @bsgx_fckti,composite-clock}bsgx_ick@b10ti,wait-gate-clock}Ay bcpefuse_fck@a08ti,gate-clock}!y bts_fck@a08ti,gate-clock}Cy busbtll_fck@a08ti,wait-gate-clock}vy busbtll_ick@a18ti,omap3-interface-clock}My bmmchs3_ick@a10ti,omap3-interface-clock}My bmmchs3_fck@a00ti,wait-gate-clock}y bdss1_alwon_fck_3430es2@e00ti,dss-gate-clock}yebdss_ick_3430es2@e10ti,omap3-dss-interface-clock}Bybusbhost_120m_fck@1400ti,gate-clock}vybusbhost_48m_fck@1400ti,dss-gate-clock}3ybusbhost_ick@1410ti,omap3-dss-interface-clock}Bybclockdomainscore_l3_clkdmti,clockdomain}dpll3_clkdmti,clockdomain}dpll1_clkdmti,clockdomain}per_clkdmti,clockdomainh}emu_clkdmti,clockdomain}idpll4_clkdmti,clockdomain}wkup_clkdmti,clockdomain$}dss_clkdmti,clockdomain}core_l4_clkdmti,clockdomain}cam_clkdmti,clockdomain}iva2_clkdmti,clockdomain}dpll2_clkdmti,clockdomain}pd2d_clkdmti,clockdomain }dpll5_clkdmti,clockdomain}sgx_clkdmti,clockdomain}usbhost_clkdmti,clockdomain }target-module@48320000ti,sysc-omap2ti,syscyH2H2 revsysc}Pfckick+ H2counter@0ti,omap-counter32ky interrupt-controller@48200000ti,omap3-intcyH btarget-module@48056000ti,sysc-omap2ti,syscyH`H`,H`(revsyscsyss#  }Lick+ H`dma-controller@0ti,omap3430-sdmati,omap-sdmay   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+,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiyH [+mcspi3 tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiyH 0+mcspi4FGtx0rx01w@480b2000 ti,omap3-1wyH :hdq1wmmc@4809c000ti,omap3-hsmmcyH Smmc1T=>txrxaSnzJdefaultXmmc@480b4000ti,omap3-hsmmcyH @Vmmc2/0txrxV.n+JdefaultXwlcore@2 ti,wl1271yN irqwakeupImmc@480ad000ti,omap3-hsmmcyH ^mmc3MNtxrx disabledmmu@480bd400ti,omap2-iommuyH mmu_ispb mmu@5d000000ti,omap2-iommuy]mmu_iva disabledwdt@48314000 ti,omap3-wdtyH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspyH@mpu ;< commontxrxmcbsp1 txrx}fck disabledtarget-module@480a0000ti,sysc-omap2ti,syscyH <H @H Drevsyscsyss}ick+ H rng@0 ti,omap2-rngy 4mcbsp@49022000ti,omap3-mcbspyI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrx}fckick disabledmcbsp@49024000ti,omap3-mcbspyI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrx}fckick disabledmcbsp@49026000ti,omap3-mcbspyI`mpu 67 commontxrxmcbsp4txrx}fck  disabledmcbsp@48096000ti,omap3-mcbspyH `mpu QR commontxrxmcbsp5txrx}fck disabledsham@480c3000ti,omap3-shamshamyH 0d1Erxtarget-module@48318000ti,sysc-omap2-timerti,syscyH1H1H1revsyscsyss' }fckick+ H1.timer@0ti,omap3430-timery}fck%9HXCtarget-module@49032000ti,sysc-omap2-timerti,syscyI I I revsyscsyss' }fckick+ I timer@0ti,omap3430-timery&timer@49034000ti,omap3430-timeryI@'timer3timer@49036000ti,omap3430-timeryI`(timer4timer@49038000ti,omap3430-timeryI)timer5otimer@4903a000ti,omap3430-timeryI*timer6otimer@4903c000ti,omap3430-timeryI+timer7otimer@4903e000ti,omap3430-timeryI,timer8|otimer@49040000ti,omap3430-timeryI-timer9|timer@48086000ti,omap3430-timeryH`.timer10|timer@48088000ti,omap3430-timeryH/timer11|target-module@48304000ti,sysc-omap2-timerti,syscyH0@H0@H0@revsyscsyss' }fckick+ H0@timer@0ti,omap3430-timery_9usbhstll@48062000 ti,usbhs-tllyH N usb_tll_hsusbhshost@48064000ti,usbhs-hostyH@ usb_host_hs+ ehci-phyohci@48064400ti,ohci-omap3yHDLehci@48064800 ti,ehci-omapyHHMgpmc@6e000000ti,omap3430-gpmcgpmcynrxtx+?O 0,bethernet@gpmcsmsc,lan9221smsc,lan91150>Pbq(--xK3KMe|  yJdefaultXnand@0,0ti,omap2-nand y micron,mt29f2g16abdhc bch8 0>,P,bq",(6@RR(|+usb_otg_hs@480ab000ti,omap3-musbyH \]mcdma usb_otg_hs & 1 9  B Q Yusb2-phy  c2dss@48050000 ti,omap3-dssyHok dss_core}fck+ i yJdefaultXdispc@48050400ti,omap3-dispcyH dss_dispc}fckencoder@4804fc00 ti,omap3-dsiyHH@H protophypll disabled dss_dsi1} fcksys_clkencoder@48050800ti,omap3-rfbiyH disabled dss_rfbi}fckickencoder@48050c00ti,omap3-vencyH  disabled dss_venc}fckportendpoint   bssi-controller@48058000 ti,omap3-ssissiokyHHsysgddGgdd_mpu+ }t   ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portyHHtxrxCDssi-port@4805b000ti,omap3-ssi-portyHHtxrxEFpinmux@480025d8 ti,omap3-padconfpinctrl-singleyH%$+-JdefaultX pinmux_ehci_phy_pinsjbpinmux_hsusb2_2_pins0j   " b isp@480bc000 ti,omap3-ispyH H |  ~l ports+bandgap@48002524yH%$ti,omap34xx-bandgap btarget-module@480cb000ti,sysc-omap3430-srti,syscsmartreflex_coreyH $sysc}fck+ H smartreflex@0ti,omap3-smartreflex-coreytarget-module@480c9000ti,sysc-omap3430-srti,syscsmartreflex_mpu_ivayH $sysc}fck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivaytarget-module@50000000ti,sysc-omap2ti,syscyPrev}fckick+ P@opp-tableoperating-points-v2-ti-cpu~bopp1-125000000 sY@  opp2-250000000 沀 g8g8g8  opp3-500000000 e OOO opp4-550000000 U txtxtx opp5-600000000 #F ppp opp6-720000000 *T ppp  thermal-zonescpu_thermal  " 0N  =regulator-vddvarioregulator-fixed vddvariobregulator-vdd33aregulator-fixedvdd33abhsusb2_power_regregulator-fixed hsusb2_vbus2Z2Z O Mp ^bhsusb2_phyusb-nop-xceiv qJdefaultXbleds gpio-ledsledb }omap3evm::ledb d default-onwl12xx_vmmcregulator-fixedvwl1271w@w@ O Mp ^ JdefaultXbbacklightgpio-backlight  dregulator-lcd-3v3regulator-fixedlcd_3v32Z2Z Mp Obdisplaysharp,ls037v7dw01 }lcd    q$ portendpoint b memory@80000000mmemoryy compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2display0device_typeregclocksclock-namesclock-latencyoperating-points-v2cpu0-supplyinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0phandlepinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersreg-namesti,sysc-sidleti,sysc-maskti,sysc-midleti,syss-mask#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsgpio-hoggpiosoutput-lowline-nameinterrupts-extendedbci3v1-supplyio-channelsio-channel-namesregulator-always-onti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cellsti,use_poweroff#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csspi-max-frequencyvcc-supplyti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,swap-xywakeup-sourcependown-gpioti,dual-voltpbias-supplyvmmc-supplyvqmmc-supplybus-widthnon-removablecap-power-off-cardinterrupt-namesref-clock-frequencystatus#iommu-cellsti,#tlb-entriesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureport2-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinsbank-widthgpmc,device-widthgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,access-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsgpmc,wr-data-mux-bus-nsgpmc,wr-access-nsvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addresslinux,mtd-namenand-bus-widthti,nand-ecc-optgpmc,sync-clk-psmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdds_dsi-supplyvdda_video-supplyremote-endpointdata-linesiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modepolling-delay-passivepolling-delaycoefficientsthermal-sensorsstartup-delay-usenable-active-highreset-gpioslabellinux,default-triggervin-supplydefault-onpower-supplyenvdd-supplyenable-gpiosmode-gpios