08( T,timll,omap3-devkit8000ti,omap3430ti,omap3 +7TimLL OMAP3 Devkit8000chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000 d/connector0 m/connector1cpus+cpu@0arm,cortex-a8vcpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+ *pinmux_twl4030_pinsGA[pinmux_dss_dpi_pinsG[scm_conf@270sysconsimple-busp0+ p0[pbias_regulator@2b0ti,pbias-omap3ti,pbias-omapcpbias_mmc_omap2430jpbias_mmc_omap2430yw@-[clocks+mcbsp5_mux_fck@68ti,composite-mux-clockh[mcbsp5_fckti,composite-clock[mcbsp1_mux_fck@4ti,composite-mux-clock[ mcbsp1_fckti,composite-clock [mcbsp2_mux_fck@4ti,composite-mux-clock [ mcbsp2_fckti,composite-clock [mcbsp3_mux_fck@68ti,composite-mux-clock h[mcbsp3_fckti,composite-clock[mcbsp4_mux_fck@68ti,composite-mux-clock h[mcbsp4_fckti,composite-clock[clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+ *pinmux_twl4030_vpins G[aes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockY[osc_sys_ck@d40 ti,mux-clock @[sys_ck@1270ti,divider-clockp[sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clockdpll3_m2x2_ckfixed-factor-clock[dpll4_x2_ckfixed-factor-clockcorex2_fckfixed-factor-clock[wkup_l4_ickfixed-factor-clock[Ncorex2_d3_fckfixed-factor-clock[corex2_d5_fckfixed-factor-clock[clockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clock[@virt_12m_ck fixed-clock[virt_13m_ck fixed-clock]@[virt_19200000_ck fixed-clock$[virt_26000000_ck fixed-clock[virt_38_4m_ck fixed-clockI[dpll4_ck@d00ti,omap3-dpll-per-clock D 0[dpll4_m2_ck@d48ti,divider-clock? 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dss_corefck+[defaulti 0dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH ok dss_vencfck@portendpointL\[ port+endpoint@0Lh[endpoint@1ssi-controller@48058000 ti,omap3-ssissiokHHsysgddGgdd_mpu+ q ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$+ *isp@480bc000 ti,omap3-ispH H |sclzports+bandgap@48002524H%$ti,omap34xx-bandgap[target-module@480cb000ti,sysc-omap3430-srti,syscsmartreflex_coreH $syscfck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3430-srti,syscsmartreflex_mpu_ivaH $syscfck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivatarget-module@50000000ti,sysc-omap2ti,syscPrevfckick+ P@opp-tableoperating-points-v2-ti-cpuc[opp1-125000000sY@ opp2-250000000沀 g8g8g8opp3-500000000e OOOopp4-550000000 U txtxtxopp5-600000000#F pppopp6-720000000*T pppthermal-zonescpu_thermalN  memory@80000000vmemoryleds gpio-ledsheartbeatdevkit8000::led1  on .heartbeatmmcdevkit8000::led2  on .noneusrdevkit8000::led3  on .usrpmu_statdevkit8000::pmu_stat soundti,omap-twl4030 Ddevkit8000 MI VExt SpkPREDRIVELExt SpkPREDRIVERMAINMICMain MicMain MicMic Bias 1gpio_keys gpio-keysuseruser  g rencoder0 ti,tfp410 ports+port@0endpointL[port@1endpointL[ connector0dvi-connectordvi  portendpointL [connector1svideo-connectortvportendpointL [ compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2display1display2device_typeregclocksclock-namesclock-latencyoperating-points-v2interruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsphandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersreg-namesti,sysc-sidlestatusti,sysc-maskti,sysc-midleti,syss-mask#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyio-channelsio-channel-namesti,use-ledsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvqmmc-supplybus-width#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsassigned-clocksassigned-clock-parentsti,no-reset-on-initti,no-idleti,timer-dspti,timer-pwmti,timer-alwonti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthdavicom,no-eepromgpmc,mux-add-datagpmc,wait-pingpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsmultipointnum-epsram-bitsvdds_dsi-supplyvdda_dac-supplyvdda-supplyremote-endpointti,channelsdata-linesiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modepolling-delay-passivepolling-delaycoefficientsthermal-sensorsgpiosdefault-statelinux,default-triggerti,modelti,mcbspti,audio-routinglinux,codewakeup-sourcepowerdown-gpiosdigitalddc-i2c-bus