8( l,timll,omap3-devkit8000ti,omap3430ti,omap3 +,7TimLL OMAP3 Devkit8000 with 7.0'' LCD panelchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000 d/display m/connector0 v/connector1cpus+cpu@0arm,cortex-a8cpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+3pinmux_twl4030_pinsPAdpinmux_dss_dpi_pinsPdscm_conf@270sysconsimple-busp0+ p0dpbias_regulator@2b0ti,pbias-omap3ti,pbias-omaplpbias_mmc_omap2430spbias_mmc_omap2430w@-dclocks+mcbsp5_mux_fck@68ti,composite-mux-clockhdmcbsp5_fckti,composite-clockdmcbsp1_mux_fck@4ti,composite-mux-clockd mcbsp1_fckti,composite-clock dmcbsp2_mux_fck@4ti,composite-mux-clock d mcbsp2_fckti,composite-clock dmcbsp3_mux_fck@68ti,composite-mux-clock hdmcbsp3_fckti,composite-clockdmcbsp4_mux_fck@68ti,composite-mux-clock hdmcbsp4_fckti,composite-clockdclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+3pinmux_twl4030_vpins Pdaes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYdosc_sys_ck@d40 ti,mux-clock @dsys_ck@1270ti,divider-clockpdsys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock dpll3_m2x2_ckfixed-factor-clock ddpll4_x2_ckfixed-factor-clock corex2_fckfixed-factor-clock dwkup_l4_ickfixed-factor-clock dNcorex2_d3_fckfixed-factor-clock dcorex2_d5_fckfixed-factor-clock dclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockd@virt_12m_ck fixed-clockdvirt_13m_ck fixed-clock]@dvirt_19200000_ck fixed-clock$dvirt_26000000_ck fixed-clockdvirt_38_4m_ck fixed-clockIddpll4_ck@d00ti,omap3-dpll-per-clock D 0ddpll4_m2_ck@d48ti,divider-clock? Hd dpll4_m2x2_mul_ckfixed-factor-clock  d!dpll4_m2x2_ck@d00ti,gate-clock! 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"Sddpll4_m5_ck@f40ti,divider-clock?@d3dpll4_m5x2_mul_ckti,fixed-factor-clock38FSd4dpll4_m5x2_ck@d00ti,gate-clock4 "Sdjdpll4_m6_ck@1140ti,divider-clock?@d5dpll4_m6x2_mul_ckfixed-factor-clock5 d6dpll4_m6x2_ck@d00ti,gate-clock6 "d7emu_per_alwon_ckfixed-factor-clock7 dcclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock& pd9clkout2_src_mux_ck@d70ti,composite-mux-clock&*8 pd:clkout2_src_ckti,composite-clock9:d;sys_clkout2@d70ti,divider-clock;@ pfmpu_ckfixed-factor-clock< d=arm_fck@924ti,divider-clock= $emu_mpu_alwon_ckfixed-factor-clock= ddl3_ick@a40ti,divider-clock& @d>l4_ick@a40ti,divider-clock> @d?rm_ick@c40ti,divider-clock? @gpt10_gate_fck@a00ti,composite-gate-clock  dAgpt10_mux_fck@a40ti,composite-mux-clock@ @dBgpt10_fckti,composite-clockABgpt11_gate_fck@a00ti,composite-gate-clock  dCgpt11_mux_fck@a40ti,composite-mux-clock@ @dDgpt11_fckti,composite-clockCDcore_96m_fckfixed-factor-clockE dmmchs2_fck@a00ti,wait-gate-clock dmmchs1_fck@a00ti,wait-gate-clock di2c3_fck@a00ti,wait-gate-clock di2c2_fck@a00ti,wait-gate-clock di2c1_fck@a00ti,wait-gate-clock dmcbsp5_gate_fck@a00ti,composite-gate-clock  dmcbsp1_gate_fck@a00ti,composite-gate-clock  d core_48m_fckfixed-factor-clock0 dFmcspi4_fck@a00ti,wait-gate-clockF dmcspi3_fck@a00ti,wait-gate-clockF dmcspi2_fck@a00ti,wait-gate-clockF dmcspi1_fck@a00ti,wait-gate-clockF duart2_fck@a00ti,wait-gate-clockF duart1_fck@a00ti,wait-gate-clockF  dcore_12m_fckfixed-factor-clockG dHhdq_fck@a00ti,wait-gate-clockH dcore_l3_ickfixed-factor-clock> dIsdrc_ick@a10ti,wait-gate-clockI dgpmc_fckfixed-factor-clockI core_l4_ickfixed-factor-clock? dJmmchs2_ick@a10ti,omap3-interface-clockJ dmmchs1_ick@a10ti,omap3-interface-clockJ dhdq_ick@a10ti,omap3-interface-clockJ dmcspi4_ick@a10ti,omap3-interface-clockJ dmcspi3_ick@a10ti,omap3-interface-clockJ dmcspi2_ick@a10ti,omap3-interface-clockJ dmcspi1_ick@a10ti,omap3-interface-clockJ di2c3_ick@a10ti,omap3-interface-clockJ di2c2_ick@a10ti,omap3-interface-clockJ di2c1_ick@a10ti,omap3-interface-clockJ duart2_ick@a10ti,omap3-interface-clockJ duart1_ick@a10ti,omap3-interface-clockJ  dgpt11_ick@a10ti,omap3-interface-clockJ  dgpt10_ick@a10ti,omap3-interface-clockJ  dmcbsp5_ick@a10ti,omap3-interface-clockJ  dmcbsp1_ick@a10ti,omap3-interface-clockJ  domapctrl_ick@a10ti,omap3-interface-clockJ ddss_tv_fck@e00ti,gate-clock8ddss_96m_fck@e00ti,gate-clockEddss2_alwon_fck@e00ti,gate-clockddummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock dKgpt1_mux_fck@c40ti,composite-mux-clock@ @dLgpt1_fckti,composite-clockKLdaes2_ick@a10ti,omap3-interface-clockJ dwkup_32k_fckfixed-factor-clock@ dMgpio1_dbck@c00ti,gate-clockM dsha12_ick@a10ti,omap3-interface-clockJ dwdt2_fck@c00ti,wait-gate-clockM dwdt2_ick@c10ti,omap3-interface-clockN dwdt1_ick@c10ti,omap3-interface-clockN dgpio1_ick@c10ti,omap3-interface-clockN domap_32ksync_ick@c10ti,omap3-interface-clockN dgpt12_ick@c10ti,omap3-interface-clockN dgpt1_ick@c10ti,omap3-interface-clockN dper_96m_fckfixed-factor-clock) d per_48m_fckfixed-factor-clock0 dOuart3_fck@1000ti,wait-gate-clockO dgpt2_gate_fck@1000ti,composite-gate-clockdPgpt2_mux_fck@1040ti,composite-mux-clock@@dQgpt2_fckti,composite-clockPQdgpt3_gate_fck@1000ti,composite-gate-clockdRgpt3_mux_fck@1040ti,composite-mux-clock@@dSgpt3_fckti,composite-clockRSgpt4_gate_fck@1000ti,composite-gate-clockdTgpt4_mux_fck@1040ti,composite-mux-clock@@dUgpt4_fckti,composite-clockTUgpt5_gate_fck@1000ti,composite-gate-clockdVgpt5_mux_fck@1040ti,composite-mux-clock@@dWgpt5_fckti,composite-clockVWgpt6_gate_fck@1000ti,composite-gate-clockdXgpt6_mux_fck@1040ti,composite-mux-clock@@dYgpt6_fckti,composite-clockXYgpt7_gate_fck@1000ti,composite-gate-clockdZgpt7_mux_fck@1040ti,composite-mux-clock@@d[gpt7_fckti,composite-clockZ[gpt8_gate_fck@1000ti,composite-gate-clock d\gpt8_mux_fck@1040ti,composite-mux-clock@@d]gpt8_fckti,composite-clock\]gpt9_gate_fck@1000ti,composite-gate-clock d^gpt9_mux_fck@1040ti,composite-mux-clock@@d_gpt9_fckti,composite-clock^_per_32k_alwon_fckfixed-factor-clock@ d`gpio6_dbck@1000ti,gate-clock`dgpio5_dbck@1000ti,gate-clock`dgpio4_dbck@1000ti,gate-clock`dgpio3_dbck@1000ti,gate-clock`dgpio2_dbck@1000ti,gate-clock` dwdt3_fck@1000ti,wait-gate-clock` dper_l4_ickfixed-factor-clock? dagpio6_ick@1010ti,omap3-interface-clockadgpio5_ick@1010ti,omap3-interface-clockadgpio4_ick@1010ti,omap3-interface-clockadgpio3_ick@1010ti,omap3-interface-clockadgpio2_ick@1010ti,omap3-interface-clocka dwdt3_ick@1010ti,omap3-interface-clocka duart3_ick@1010ti,omap3-interface-clocka duart4_ick@1010ti,omap3-interface-clockadgpt9_ick@1010ti,omap3-interface-clocka dgpt8_ick@1010ti,omap3-interface-clocka dgpt7_ick@1010ti,omap3-interface-clockadgpt6_ick@1010ti,omap3-interface-clockadgpt5_ick@1010ti,omap3-interface-clockadgpt4_ick@1010ti,omap3-interface-clockadgpt3_ick@1010ti,omap3-interface-clockadgpt2_ick@1010ti,omap3-interface-clockadmcbsp2_ick@1010ti,omap3-interface-clockadmcbsp3_ick@1010ti,omap3-interface-clockadmcbsp4_ick@1010ti,omap3-interface-clockadmcbsp2_gate_fck@1000ti,composite-gate-clockd mcbsp3_gate_fck@1000ti,composite-gate-clockdmcbsp4_gate_fck@1000ti,composite-gate-clockdemu_src_mux_ck@1140 ti,mux-clockbcd@deemu_src_ckti,clkdm-gate-clockedfpclk_fck@1140ti,divider-clockf@pclkx2_fck@1140ti,divider-clockf@atclk_fck@1140ti,divider-clockf@traceclk_src_fck@1140 ti,mux-clockbcd@dgtraceclk_fck@1140ti,divider-clockg @secure_32k_fck fixed-clockdhgpt12_fckfixed-factor-clockh dwdt1_fckfixed-factor-clockh security_l4_ick2fixed-factor-clock? diaes1_ick@a14ti,omap3-interface-clocki rng_ick@a14ti,omap3-interface-clocki dsha11_ick@a14ti,omap3-interface-clocki des1_ick@a14ti,omap3-interface-clocki cam_mclk@f00ti,gate-clockjScam_ick@f10!ti,omap3-no-wait-interface-clock?dcsi2_96m_fck@f00ti,gate-clockdsecurity_l3_ickfixed-factor-clock> dkpka_ick@a14ti,omap3-interface-clockk icr_ick@a10ti,omap3-interface-clockJ des2_ick@a10ti,omap3-interface-clockJ mspro_ick@a10ti,omap3-interface-clockJ mailboxes_ick@a10ti,omap3-interface-clockJ ssi_l4_ickfixed-factor-clock? drsr1_fck@c00ti,wait-gate-clock dsr2_fck@c00ti,wait-gate-clock dsr_l4_ickfixed-factor-clock? dpll2_fck@40ti,divider-clock&@dldpll2_ck@4ti,omap3-dpll-clockl$@4|dmdpll2_m2_ck@44ti,divider-clockmDdniva2_ck@0ti,wait-gate-clockndmodem_fck@a00ti,omap3-interface-clock dsad2d_ick@a10ti,omap3-interface-clock> dmad2d_ick@a18ti,omap3-interface-clock> dmspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock dossi_ssr_div_fck_3430es2@a40ti,composite-divider-clock @$dpssi_ssr_fck_3430es2ti,composite-clockopdqssi_sst_fck_3430es2fixed-factor-clockq dhsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockI dssi_ick_3430es2@a10ti,omap3-ssi-interface-clockr dusim_gate_fck@c00ti,composite-gate-clockE  d}sys_d2_ckfixed-factor-clock dtomap_96m_d2_fckfixed-factor-clockE duomap_96m_d4_fckfixed-factor-clockE dvomap_96m_d8_fckfixed-factor-clockE dwomap_96m_d10_fckfixed-factor-clockE  dxdpll5_m2_d4_ckfixed-factor-clocks dydpll5_m2_d8_ckfixed-factor-clocks dzdpll5_m2_d16_ckfixed-factor-clocks d{dpll5_m2_d20_ckfixed-factor-clocks d|usim_mux_fck@c40ti,composite-mux-clock(tuvwxyz{| @d~usim_fckti,composite-clock}~usim_ick@c10ti,omap3-interface-clockN  ddpll5_ck@d04ti,omap3-dpll-clock  $ L 4|ddpll5_m2_ck@d50ti,divider-clock Pdssgx_gate_fck@b00ti,composite-gate-clock& dcore_d3_ckfixed-factor-clock& dcore_d4_ckfixed-factor-clock& dcore_d6_ckfixed-factor-clock& domap_192m_alwon_fckfixed-factor-clock" dcore_d2_ckfixed-factor-clock& dsgx_mux_fck@b40ti,composite-mux-clock * @dsgx_fckti,composite-clockdsgx_ick@b10ti,wait-gate-clock> dcpefuse_fck@a08ti,gate-clock dts_fck@a08ti,gate-clock@ dusbtll_fck@a08ti,wait-gate-clocks dusbtll_ick@a18ti,omap3-interface-clockJ dmmchs3_ick@a10ti,omap3-interface-clockJ dmmchs3_fck@a00ti,wait-gate-clock ddss1_alwon_fck_3430es2@e00ti,dss-gate-clockSddss_ick_3430es2@e10ti,omap3-dss-interface-clock?dusbhost_120m_fck@1400ti,gate-clocksdusbhost_48m_fck@1400ti,dss-gate-clock0dusbhost_ick@1410ti,omap3-dss-interface-clock?dclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainhemu_clkdmti,clockdomainfdpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainmd2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain target-module@48320000ti,sysc-omap2ti,syscH2H2 revsyscMfckick+ H2counter@0ti,omap-counter32k interrupt-controller@48200000ti,omap3-intcH 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0+mcspi4FGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1p=>txrx}mmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrx Ddisabledmmc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx Ddisabledmmu@480bd400ti,omap2-iommuH mmu_ispdmmu@5d000000ti,omap2-iommu]mmu_iva Ddisabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2 Ddisabledmcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp1 txrxfck Ddisabledtarget-module@480a0000ti,sysc-omap2ti,syscH <H @H Drevsyscsyssick+ H rng@0 ti,omap2-rng 4mcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrxfckickDokaydmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrxfckick Ddisabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp4txrxfck Ddisabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp5txrxfck Ddisabledsham@480c3000ti,omap3-shamshamH 0d1Erxtarget-module@48318000ti,sysc-omap2-timerti,syscH1H1H1revsyscsyss' fckick+ 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.#2E0H6gV6Xvd~ZZusb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs dss@48050000 ti,omap3-dssHDok dss_corefck+]defaultk dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll Ddisabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH Ddisabled dss_rfbifckickencoder@48050c00ti,omap3-vencH Dok dss_vencfck portendpoint & 6d port+endpoint@0 & Bdendpoint@1 & Bd ssi-controller@48058000 ti,omap3-ssissiDokHHsysgddGgdd_mpu+ q ssi_ssr_fckssi_sst_fckssi_ickssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$+3isp@480bc000 ti,omap3-ispH H | Mll Tports+bandgap@48002524H%$ti,omap34xx-bandgap `dtarget-module@480cb000ti,sysc-omap3430-srti,syscsmartreflex_coreH $syscfck+ H smartreflex@0ti,omap3-smartreflex-coretarget-module@480c9000ti,sysc-omap3430-srti,syscsmartreflex_mpu_ivaH $syscfck+ H smartreflex@480c9000ti,omap3-smartreflex-mpu-ivatarget-module@50000000ti,sysc-omap2ti,syscPrevfckick+ P@opp-tableoperating-points-v2-ti-cpuldopp1-125000000 vsY@ } opp2-250000000 v沀 }g8g8g8  opp3-500000000 ve }OOO opp4-550000000 v U }txtxtx opp5-600000000 v#F }ppp opp6-720000000 v*T }ppp  thermal-zonescpu_thermal   N  memory@80000000memoryleds gpio-ledsheartbeatdevkit8000::led1  on heartbeatmmcdevkit8000::led2  on noneusrdevkit8000::led3  on usrpmu_statdevkit8000::pmu_stat soundti,omap-twl4030 devkit8000 'I 0Ext SpkPREDRIVELExt SpkPREDRIVERMAINMICMain MicMain MicMic Bias 1gpio_keys gpio-keysuseruser  Abencoder0 ti,tfp410 Lports+port@0endpoint &dport@1endpoint & d connector0dvi-connectordvi \ d portendpoint & d connector1svideo-connectortvportendpoint & ddisplay panel-dpilcd pportendpoint & dpanel-timingbZ }     0        compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2display0display1display2device_typeregclocksclock-namesclock-latencyoperating-points-v2interruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsphandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividersreg-namesti,sysc-sidleti,sysc-maskti,sysc-midleti,syss-mask#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0bci3v1-supplyio-channelsio-channel-namesti,use-ledsti,pulldownsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columnslinux,keymap#io-channel-cellsstatus#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repti,keep-vref-onti,settle-delay-usecwakeup-sourceti,dual-voltpbias-supplyvmmc-supplyvqmmc-supplybus-width#iommu-cellsti,#tlb-entriesinterrupt-namesti,buffer-size#sound-dai-cellsti,no-reset-on-initti,no-idleti,timer-alwonassigned-clocksassigned-clock-parentsti,timer-dspti,timer-pwmti,timer-secureremote-wakeup-connectedgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthdavicom,no-eepromgpmc,mux-add-datagpmc,wait-pingpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsengpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,wait-monitoring-nsgpmc,clk-activation-nsmultipointnum-epsram-bitsvdds_dsi-supplyvdda_dac-supplyvdda-supplyremote-endpointti,channelsdata-linesiommusti,phy-type#thermal-sensor-cellsopp-hzopp-microvoltopp-supported-hwopp-suspendturbo-modepolling-delay-passivepolling-delaycoefficientsthermal-sensorsgpiosdefault-statelinux,default-triggerti,modelti,mcbspti,audio-routinglinux,codepowerdown-gpiosdigitalddc-i2c-busenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-active