� ����8��(��x ,Google Cheza (rev3+)2google,chezaqcom,sdm845aliases!=/soc@0/geniqup@8c0000/i2c@880000!B/soc@0/geniqup@8c0000/i2c@884000!G/soc@0/geniqup@8c0000/i2c@888000!L/soc@0/geniqup@8c0000/i2c@88c000!Q/soc@0/geniqup@8c0000/i2c@890000!V/soc@0/geniqup@8c0000/i2c@894000![/soc@0/geniqup@8c0000/i2c@898000!`/soc@0/geniqup@8c0000/i2c@89c000!e/soc@0/geniqup@ac0000/i2c@a80000!j/soc@0/geniqup@ac0000/i2c@a84000!o/soc@0/geniqup@ac0000/i2c@a88000!u/soc@0/geniqup@ac0000/i2c@a8c000!{/soc@0/geniqup@ac0000/i2c@a90000!�/soc@0/geniqup@ac0000/i2c@a94000!�/soc@0/geniqup@ac0000/i2c@a98000!�/soc@0/geniqup@ac0000/i2c@a9c000!�/soc@0/geniqup@8c0000/spi@880000!�/soc@0/geniqup@8c0000/spi@884000!�/soc@0/geniqup@8c0000/spi@888000!�/soc@0/geniqup@8c0000/spi@88c000!�/soc@0/geniqup@8c0000/spi@890000!�/soc@0/geniqup@8c0000/spi@894000!�/soc@0/geniqup@8c0000/spi@898000!�/soc@0/geniqup@8c0000/spi@89c000!�/soc@0/geniqup@ac0000/spi@a80000!�/soc@0/geniqup@ac0000/spi@a84000!�/soc@0/geniqup@ac0000/spi@a88000!�/soc@0/geniqup@ac0000/spi@a8c000!�/soc@0/geniqup@ac0000/spi@a90000!�/soc@0/geniqup@ac0000/spi@a94000!�/soc@0/geniqup@ac0000/spi@a98000!�/soc@0/geniqup@ac0000/spi@a9c000.�/soc@0/geniqup@8c0000/serial@898000/bluetooth$�/soc@0/geniqup@8c0000/serial@898000$�/soc@0/geniqup@ac0000/serial@a84000/soc@0/wifi@18800000chosen serial0:115200n8clocksxo-board 2fixed-clock#I� 3xo_boardF�sleep-clk 2fixed-clock#�F+cpus cpu@0Ncpu 2qcom,kryo385Z^epscisc����(��� � Fl2-cache2cache� Fl3-cache2cacheF cpu@100Ncpu 2qcom,kryo385Z^epscisc����(���  � Fl2-cache2cache� F cpu@200Ncpu 2qcom,kryo385Z^epscisc����(���  � Fl2-cache2cache� F cpu@300Ncpu 2qcom,kryo385Z^epscisc����(��� � Fl2-cache2cache� Fcpu@400Ncpu 2qcom,kryo385Z^epscis����(��� � Fl2-cache2cache� Fcpu@500Ncpu 2qcom,kryo385Z^epscis����(��� � Fl2-cache2cache� Fcpu@600Ncpu 2qcom,kryo385Z^epscis����(��� � Fl2-cache2cache� Fcpu@700Ncpu 2qcom,kryo385Z^epscis����(��� � Fl2-cache2cache� Fcpu-mapcluster0core0core1core2core3core4core5core6core7idle-states!pscicpu-sleep-0-02arm,idle-state.little-power-down>@U^f�vb�Fcpu-sleep-1-02arm,idle-state.big-power-down>@Ufmv��Fcpu-sleep-0-12arm,idle-state.little-rail-power-down>@Uhfv^�F cpu-sleep-1-12arm,idle-state.big-rail-power-down>@U�f%v��Fcluster-sleep-02arm,idle-state.cluster-power-down>@�U �f�v'�F firmwarescm2qcom,scm-sdm845qcom,scmmemory@80000000NmemoryZ�opp-table-cpu02operating-points-v2�Fopp-300000000��� 5I>opp-403200000�X� 5I>opp-480000000��8� 5bpopp-576000000�"U� 5bpopp-652800000�&��� 5u0opp-748800000�,�������opp-825600000�15������opp-902400000�5Ɉ����`opp-979200000�:]h�����opp-1056000000�>�H�����opp-1132800000�C�(�!b��@opp-1228800000�I>�!b��opp-1324800000�N���!b�� opp-1420800000�T���.��opp-1516800000�Zh��.�'Popp-1612800000�`!`�>�'Popp-1689600000�d�@�>�>�opp-1766400000�iI �>�V0opp-table-cpu42operating-points-v2�Fopp-300000000��� 5I>opp-403200000�X� 5I>opp-480000000��8���I>opp-576000000�"U���I>opp-652800000�&�����I>opp-748800000�,�����I>opp-825600000�15��!b���opp-902400000�5Ɉ�!b���opp-979200000�:]h�!b���opp-1056000000�>�H�.���opp-1132800000�C�(�.���opp-1209600000�H�>���opp-1286400000�L���>���opp-1363200000�Q@��>��opp-1459200000�V���>��opp-1536000000�[���R���opp-1612800000�`!`�R���opp-1689600000�d�@�R��'Popp-1766400000�iI �^��'Popp-1843200000�m��^��'Popp-1920000000�rp��n�'Popp-1996800000�w��n�>�opp-2092800000�|���n�>�opp-2169600000��Qx�n�>�opp-2246400000���X�n�>�opp-2323200000��y8�n�>�opp-2400000000�� �n�V0opp-2476800000�����n�V0opp-2553600000��4��n�V0opp-2649600000�����n�V0opp-2745600000�����n��opp-2803200000��p�n��opp-table-dsi2operating-points-v2F�opp-19200000�$��opp-180000000� ���opp-275000000�d*�� opp-328580000�����!opp-358000000�V���"opp-table-qspi2operating-points-v2F�opp-19200000�$��opp-100000000����opp-150000000��р� opp-300000000���"opp-table-qup2operating-points-v2F3opp-50000000�����opp-75000000�xh��opp-100000000���� opp-128000000�� �"pmu2arm,armv8-pmuv3 �psci 2arm,psci-1.0lsmcreserved-memory �hyp-mem@85700000Z�p`�xbl-mem@85e00000Z���aop-mem@85fc0000Z���aop-cmd-db-mem@85fe0000 2qcom,cmd-dbZ���smem@86000000 2qcom,smemZ� ��#tz@86200000Z� ��rmtfs@88f000002qcom,rmtfs-memZ������qseecom@8ab00000Z��@�camera-mem@8bf00000Z��P�ipa-fw@8c400000Z�@�ipa-gsi@8c410000Z�AP�adsp@8c500000Z�P��F&wlan-msa@8df00000Z���F�mpss@8e000000Z��F�mba@96500000Z�P �F�slpi@96700000Z�p@�F�spss@97b00000Z���mpss-metadata�  @�F�fastrpc2shared-dma-pool����@ F�memory@96000000Z�P�F�remoteproc-adsp2qcom,sdm845-adsp-pas@%�$$$$#9wdogfatalreadyhandoverstop-ack^%IxoU&c'l(}stop �disabledglink-edge ���lpass��)apr 2qcom,apr-v2�apr_audio_svc� �service@3Z 2qcom,q6core�avs/audiomsm/adsp/audio_pdservice@4 2qcom,q6afeZ�avs/audiomsm/adsp/audio_pddais2qcom,q6afe-dais �service@7 2qcom,q6asmZ�avs/audiomsm/adsp/audio_pddais2qcom,q6asm-dais �  *!service@8 2qcom,q6admZ�avs/audiomsm/adsp/audio_pdrouting2qcom,q6adm-routing�fastrpc 2qcom,fastrpc�fastrpcglink-apps-dsp�adsp compute-cb@32qcom,fastrpc-compute-cbZ  *#compute-cb@42qcom,fastrpc-compute-cbZ  *$smp2p-cdsp 2qcom,smp2p*^� �@�)4�master-kernelCmaster-kernelSslave-kernel Cslave-kerneljsmp2p-lpass 2qcom,smp2p*�� ���) 4�master-kernelCmaster-kernelSF(slave-kernel Cslave-kerneljF$smp2p-mpss 2qcom,smp2p*�� ���)4�master-kernelCmaster-kernelSF�slave-kernel Cslave-kerneljF�ipa-ap-to-modemCipaSF�ipa-modem-to-apCipajF�smp2p-slpi 2qcom,smp2p*�� ���)4�master-kernelCmaster-kernelSF�slave-kernel Cslave-kerneljF�soc@0 �� 2simple-busclock-controller@1000002qcom,gcc-sdm845Z^%%+,-=Ibi_tcxobi_tcxo_aosleep_clkpcie_0_pipe_clkpcie_1_pipe_clk���.F/qfprom@7840002qcom,sdm845-qfpromqcom,qfpromZx@� hstx-trim-primary@1ebZ��F�hstx-trim-secondary@1ebZ��F�rng@793000 2qcom,prng-eeZy0^/@Icoredma-controller@800000�2qcom,sdm845-gpi-dmaZ���������������� ��  * �disabledF4geniqup@8c00002qcom,geni-se-qupZ�` Im-ahbs-ahb^/d/e  * ��0 1 �qup-core�okayi2c@8800002qcom,geni-i2cZ�@Ise^/D default2 �Y �.�3H�0 110 �qup-corequp-configqup-memory #44(txrx �disabledspi@8800002qcom,geni-spiZ�@Ise^/D default5 �Y 0�0 11�qup-corequp-config #44(txrx�okayserial@8800002qcom,geni-uartZ�@Ise^/D default6 �Y�.�30�0 11�qup-corequp-config �disabledi2c@8840002qcom,geni-i2cZ�@@Ise^/F default7 �Z �.�3H�0 110 �qup-corequp-configqup-memory #44(txrx �disabledspi@8840002qcom,geni-spiZ�@@Ise^/F default8 �Z 0�0 11�qup-corequp-config #44(txrx �disabledserial@8840002qcom,geni-uartZ�@@Ise^/F default9 �Z�.�30�0 11�qup-corequp-config �disabledi2c@8880002qcom,geni-i2cZ��@Ise^/H default: �[ �.�3H�0 110 �qup-corequp-configqup-memory #44(txrx �disabledspi@8880002qcom,geni-spiZ��@Ise^/H default; �[ 0�0 11�qup-corequp-config #44(txrx �disabledserial@8880002qcom,geni-uartZ��@Ise^/H default< �[�.�30�0 11�qup-corequp-config �disabledi2c@88c0002qcom,geni-i2cZ��@Ise^/J default= �\ �.�3H�0 110 �qup-corequp-configqup-memory #44(txrx�okay#�bridge@2d 2ti,sn65dsi86Z- default>?@�  2@f?AKAXBdB^%Irefclkoports port@0ZendpointvCF�port@1ZendpointvDFspi@88c0002qcom,geni-spiZ��@Ise^/J defaultE �\ 0�0 11�qup-corequp-config #44(txrx �disabledserial@88c0002qcom,geni-uartZ��@Ise^/J defaultF �\�.�30�0 11�qup-corequp-config �disabledi2c@8900002qcom,geni-i2cZ�@Ise^/L defaultG �] �.�3H�0 110 �qup-corequp-configqup-memory #44(txrx �disabledspi@8900002qcom,geni-spiZ�@Ise^/L defaultH �] 0�0 11�qup-corequp-config #44(txrx �disabledserial@8900002qcom,geni-uartZ�@Ise^/L defaultI �]�.�30�0 11�qup-corequp-config �disabledi2c@8940002qcom,geni-i2cZ�@@Ise^/N defaultJ �^ �.�3H�0 110 �qup-corequp-configqup-memory #44(txrx �disabledspi@8940002qcom,geni-spiZ�@@Ise^/N defaultK �^ 0�0 11�qup-corequp-config #44(txrx�okaytpm@0 2google,cr50Z defaultL� 5@��serial@8940002qcom,geni-uartZ�@@Ise^/N defaultM �^�.�30�0 11�qup-corequp-config �disabledi2c@8980002qcom,geni-i2cZ��@Ise^/P defaultN �_ �.�3H�0 110 �qup-corequp-configqup-memory #44(txrx �disabledspi@8980002qcom,geni-spiZ��@Ise^/P defaultO �_ 0�0 11�qup-corequp-config #44(txrx �disabledserial@8980002qcom,geni-uartZ��@Ise^/P defaultP �_�.�30�0 11�qup-corequp-config�okaybluetooth2qcom,wcn3990-bt�A�Q�R�S�0�i2c@89c0002qcom,geni-i2cZ��@Ise^/R defaultT �` �.�3 �disabledspi@89c0002qcom,geni-spiZ��@Ise^/R defaultU �` 0�0 11�qup-corequp-config #44(txrx �disabledserial@89c0002qcom,geni-uartZ��@Ise^/R defaultV �`�.�30�0 11�qup-corequp-config �disableddma-controller@a00000�2qcom,sdm845-gpi-dmaZ���%&'()*+� ��  *� �disabledFYgeniqup@ac00002qcom,geni-se-qupZ�` Im-ahbs-ahb^/f/g  *� ��W 1 �qup-core�okayi2c@a800002qcom,geni-i2cZ�@Ise^/T defaultX �a �.�3H�W 11W �qup-corequp-configqup-memory #YY(txrx �disabledspi@a800002qcom,geni-spiZ�@Ise^/T defaultZ �a 0�W 11�qup-corequp-config #YY(txrx �disabledserial@a800002qcom,geni-uartZ�@Ise^/T default[ �a�.�30�W 11�qup-corequp-config �disabledi2c@a840002qcom,geni-i2cZ�@@Ise^/V default\ �b �.�3H�W 11W �qup-corequp-configqup-memory #YY(txrx �disabledspi@a840002qcom,geni-spiZ�@@Ise^/V default] �b 0�W 11�qup-corequp-config #YY(txrx �disabledserial@a840002qcom,geni-debug-uartZ�@@Ise^/V default^ �b�.�30�W 11�qup-corequp-config�okayi2c@a880002qcom,geni-i2cZ��@Ise^/X default_ �c �.�3H�W 11W �qup-corequp-configqup-memory #YY(txrx �disabledspi@a880002qcom,geni-spiZ��@Ise^/X default` �c 0�W 11�qup-corequp-config #YY(txrx�okayec@02google,cros-ec-spiZ@�z defaulta�-���pwm2google,cros-ec-pwm�F�i2c-tunnel2google,cros-ec-i2c-tunnel� sbs-battery@b2sbs,sbs-batteryZ keyboard-controller2google,cros-ec-keyb+; NDh;<=>?@A B CD}0Y1 d"#(  \V |})  � + ^a !%$' & + ,./-32*5 4 9    8 l j6  g iserial@a880002qcom,geni-uartZ��@Ise^/X defaultb �c�.�30�W 11�qup-corequp-config �disabledi2c@a8c0002qcom,geni-i2cZ��@Ise^/Z defaultc �d �.�3H�W 11W �qup-corequp-configqup-memory #YY(txrx�okay#�digitizer@92wacom,w9013hid-over-i2cZ  default defug�h�d@��spi@a8c0002qcom,geni-spiZ��@Ise^/Z defaulti �d 0�W 11�qup-corequp-config #YY(txrx �disabledserial@a8c0002qcom,geni-uartZ��@Ise^/Z defaultj �d�.�30�W 11�qup-corequp-config �disabledi2c@a900002qcom,geni-i2cZ�@Ise^/\ defaultk �e �.�3H�W 11W �qup-corequp-configqup-memory #YY(txrx�okay#�spi@a900002qcom,geni-spiZ�@Ise^/\ defaultl �e 0�W 11�qup-corequp-config #YY(txrx �disabledserial@a900002qcom,geni-uartZ�@Ise^/\ defaultm �e�.�30�W 11�qup-corequp-config �disabledi2c@a940002qcom,geni-i2cZ�@@Ise^/^ defaultn �f �.�3H�W 11W �qup-corequp-configqup-memory #YY(txrx �disabledspi@a940002qcom,geni-spiZ�@@Ise^/^ defaulto �f 0�W 11�qup-corequp-config #YY(txrx �disabledserial@a940002qcom,geni-uartZ�@@Ise^/^ defaultp �f�.�30�W 11�qup-corequp-config �disabledi2c@a980002qcom,geni-i2cZ��@Ise^/` defaultq �g �.�3H�W 11W �qup-corequp-configqup-memory #YY(txrx�okay#�touchscreen@102elan,ekth3500Z defaultrs@�}�g �@vspi@a980002qcom,geni-spiZ��@Ise^/` defaultt �g 0�W 11�qup-corequp-config #YY(txrx �disabledserial@a980002qcom,geni-uartZ��@Ise^/` defaultu �g�.�30�W 11�qup-corequp-config �disabledi2c@a9c0002qcom,geni-i2cZ��@Ise^/b defaultv �h �.�3 �disabledH�W 11W �qup-corequp-configqup-memory #YY(txrxspi@a9c0002qcom,geni-spiZ��@Ise^/b defaultw �h 0�W 11�qup-corequp-config #YY(txrx �disabledserial@a9c0002qcom,geni-uartZ��@Ise^/b defaultx �h�.�30�W 11�qup-corequp-config �disabledsystem-cache-controller@11000002qcom,sdm845-llccPZP (0@�llcc0_basellcc1_basellcc2_basellcc3_basellcc_broadcast_base �Fdma@10a20002qcom,sdm845-dccqcom,dcc Z  � pmu@114a0002qcom,sdm845-llcc-bwmonZ� �D� �yopp-table2operating-points-v2Fyopp-0� 5opp-1���opp-2�.�opp-3�R��opp-4�n�pmu@1436400(2qcom,sdm845-cpu-bwmonqcom,sdm845-bwmonZCd �E� �zopp-table2operating-points-v2Fzopp-0�I>opp-1���opp-2��opp-3�>�opp-4��pcie@1c000002qcom,pcie-sdm845PZ� `` �`�p�parfdbielbiconfigmhiNpci���� 8�` `0`0� ��9msi�� ����8^/./)/+/-///0/0Ipipeauxcfgbus_masterbus_slaveslave_q2atbu********* * * * * ***%/,pci�/8,=pciephy �disabledpcie@0NpciZ�� �phy@1c060002qcom,sdm845-qmp-pcie-phyZ�`(^/9/+/,/:/.Iauxcfg_ahbrefrefgenpipe3pcie_0_pipe_clkG%/,phyR/:b�� �disabledF,pcie@1c080002qcom,pcie-sdm845PZ�� @@ �@���parfdbielbiconfigmhiNpci���� 8�@ @0@0� �39msi�� ����@^/6/1/3/5/7/8/4/4Ipipeauxcfgbus_masterbus_slaveslave_q2areftbuR/1b$�********* *  *  *  *  * **%/,pci�/8-=pciephy �disabledpcie@0NpciZ�� �phy@1c0a0002qcom,sdm845-qhp-pcie-phyZ�� (^/9/3/4/:/6Iauxcfg_ahbrefrefgenpipe3pcie_1_pipe_clkG%/,phyR/:b�� �disabledF-interconnect@13800002qcom,sdm845-mem-nocZ8rw�{Finterconnect@14e00002qcom,sdm845-dc-nocZNw�{interconnect@15000002qcom,sdm845-config-nocZPP�w�{F1interconnect@16200002qcom,sdm845-system-nocZb��w�{F�interconnect@16e00002qcom,sdm845-aggre1-nocZnP�w�{F0interconnect@17000002qcom,sdm845-aggre2-nocZp�w�{FWinterconnect@17400002qcom,sdm845-mmss-nocZt�w�{F�ufshc@1d84000+2qcom,sdm845-ufshcqcom,ufshcjedec,ufs-2.0 Z�@%���stdice � 8|=ufsphy��/�%/,rst  *{Icore_clkbus_aggr_clkiface_clkcore_clk_uniproref_clktx_lane0_sync_clkrx_lane0_sync_clkrx_lane1_sync_clkice_core_clkH^/�//�/�%/�/�/�/��}0�01(�ufs-ddrcpu-ufs�okay �@�d~� '�Fopp-table2operating-points-v2F}opp-50000000H����<4`xh��opp-200000000H� ���р��"phy@1d870002qcom,sdm845-qmp-ufs-phyZ�p^%/�/�Irefref_auxqref�/%,ufsphyG�okay����F|dma-controller@1dc4000 2qcom,bam-v1.7.4qcom,bam-v1.7.0Z�@@ �^%Ibam_clk���0 ****F�crypto@1dfa0002qcom,crypto-v5.4Zߠ`^/ / %Iifacebuscore#��(rxtx0 ****ipa@1e400002qcom,sdm845-ipa * *"0Z�p�p �@��ipa-regipa-sharedgsi8%7���(9ipagsiipa-clock-queryipa-setup-ready^% IcoreH�WW� 1�memoryimemconfigl��*}ipa-clock-enabled-validipa-clock-enabled�okaymodemhwlock@1f400002qcom,tcsr-mutexZ�F#syscon@1f600002qcom,sdm845-tcsrsysconZ�F�pinctrl@34000002qcom,sdm845-pinctrlZ@� ��/j;@�G� defaultsleep��U��_AP_SPI_FP_MISOAP_SPI_FP_MOSIAP_SPI_FP_CLKAP_SPI_FP_CS_LUART_AP_TX_DBG_RXUART_DBG_TX_AP_RXBRIJ_SUSPENDFP_RST_LFCAM_ENEDP_BRIJ_IRQEC_IN_RW_ODLRCAM_MCLKFCAM_MCLKRCAM_ENCCI0_SDACCI0_SCLCCI1_SDACCI1_SCLFCAM_RST_LFPMCU_BOOT0PEN_RST_LPEN_IRQ_LFPMCU_SEL_ODRCAM_VSYNCESIM_MISOESIM_MOSIESIM_CLKESIM_CS_LAP_PEN_1V8_SDAAP_PEN_1V8_SCLAP_TS_I2C_SDAAP_TS_I2C_SCLRCAM_RST_LAP_EDP_BKLTENAP_BRD_ID0BOOT_CONFIG_4AMP_IRQ_LEDP_BRIJ_I2C_SDAEDP_BRIJ_I2C_SCLEN_PP3300_DX_EDPSD_CD_ODLBT_UART_RTSBT_UART_CTSBT_UART_RXDBT_UART_TXDAMP_I2C_SDAAMP_I2C_SCLAP_BRD_ID2AP_EC_SPI_CLKAP_EC_SPI_CS_LAP_EC_SPI_MISOAP_EC_SPI_MOSIFORCED_USB_BOOTAMP_BCLKAMP_LRCLKAMP_DOUTAMP_DINAP_BRD_ID1PEN_PDCT_LHP_MCLKHP_BCLKHP_LRCLKHP_DOUTHP_DINBT_SLIMBUS_DATABT_SLIMBUS_CLKAMP_RESET_LFCAM_VSYNCAP_SKU_ID0EC_WOV_BCLKEC_WOV_LRCLKEC_WOV_DOUTAP_H1_SPI_MISOAP_H1_SPI_MOSIAP_H1_SPI_CLKAP_H1_SPI_CS_LAP_SPI_CS0_LAP_SPI_MOSIAP_SPI_MISOAP_SPI_CLKRFFE6_CLKRFFE6_DATABOOT_CONFIG_1BOOT_CONFIG_2BOOT_CONFIG_0EDP_BRIJ_ENUSB_HS_TX_ENUIM2_DATAUIM2_CLKUIM2_RSTUIM2_PRESENTUIM1_DATAUIM1_CLKUIM1_RSTAP_SKU_ID1SDM_GRFC_8SDM_GRFC_9AP_RST_REQHP_IRQTS_RESET_LPEN_EJECT_ODLHUB_RST_LFP_TO_AP_IRQAP_EC_INT_LTS_INT_LAP_SUSPEND_LSDM_GRFC_3AP_FLASH_WP_LH1_AP_INT_ODLQLINK_REQQLINK_ENSDM_GRFC_2BOOT_CONFIG_3WMSS_RESET_LSDM_GRFC_0SDM_GRFC_1RFFE3_DATARFFE3_CLKRFFE4_DATARFFE4_CLKRFFE5_DATARFFE5_CLKGNSS_ENWCI2_LTE_COEX_RXDWCI2_LTE_COEX_TXDAP_RAM_ID0AP_RAM_ID1RFFE1_DATARFFE1_CLKF@cci0-default-stateogpio17gpio18tcci_i2c}�F�cci0-sleep-stateogpio17gpio18tcci_i2c��F�cci1-default-stateogpio19gpio20tcci_i2c}�F�cci1-sleep-stateogpio19gpio20tcci_i2c��F�qspi-clk-stateogpio95 tqspi_clk�F�qspi-cs0-stateogpio90tqspi_cs�F�qspi-cs1-stateogpio89tqspi_csqspi-data0-stateogpio91 tqspi_data�F�qspi-data1-stateogpio92 tqspi_data�F�qspi-data23-stateogpio93gpio94 tqspi_dataqup-i2c0-default-state ogpio0gpio1tqup0F2qup-i2c1-default-stateogpio17gpio18tqup1F7qup-i2c2-default-stateogpio27gpio28tqup2F:qup-i2c3-default-stateogpio41gpio42tqup3��F=qup-i2c4-default-stateogpio89gpio90tqup4FGqup-i2c5-default-stateogpio85gpio86tqup5FJqup-i2c6-default-stateogpio45gpio46tqup6FNqup-i2c7-default-stateogpio93gpio94tqup7FTqup-i2c8-default-stateogpio65gpio66tqup8FXqup-i2c9-default-state ogpio6gpio7tqup9F\qup-i2c10-default-stateogpio55gpio56tqup10F_qup-i2c11-default-stateogpio31gpio32tqup11��Fcqup-i2c12-default-stateogpio49gpio50tqup12��Fkqup-i2c13-default-stateogpio105gpio106tqup13Fnqup-i2c14-default-stateogpio33gpio34tqup14��Fqqup-i2c15-default-stateogpio81gpio82tqup15Fvqup-spi0-default-stateogpio0gpio1gpio2gpio3tqup0��F5qup-spi1-default-stateogpio17gpio18gpio19gpio20tqup1F8qup-spi2-default-stateogpio27gpio28gpio29gpio30tqup2F;qup-spi3-default-stateogpio41gpio42gpio43gpio44tqup3FEqup-spi4-default-stateogpio89gpio90gpio91gpio92tqup4FHqup-spi5-default-stateogpio85gpio86gpio87gpio88tqup5��FKqup-spi6-default-stateogpio45gpio46gpio47gpio48tqup6FOqup-spi7-default-stateogpio93gpio94gpio95gpio96tqup7FUqup-spi8-default-stateogpio65gpio66gpio67gpio68tqup8FZqup-spi9-default-stateogpio6gpio7gpio4gpio5tqup9F]qup-spi10-default-stateogpio55gpio56gpio53gpio54tqup10��F`qup-spi11-default-stateogpio31gpio32gpio33gpio34tqup11Fiqup-spi12-default-stateogpio49gpio50gpio51gpio52tqup12Flqup-spi13-default-state ogpio105gpio106gpio107gpio108tqup13Foqup-spi14-default-stateogpio33gpio34gpio31gpio32tqup14Ftqup-spi15-default-stateogpio81gpio82gpio83gpio84tqup15Fwqup-uart0-default-stateF6tx-pinsogpio2tqup0rx-pinsogpio3tqup0qup-uart1-default-stateF9tx-pinsogpio19tqup1rx-pinsogpio20tqup1qup-uart2-default-stateF<tx-pinsogpio29tqup2rx-pinsogpio30tqup2qup-uart3-default-stateFFtx-pinsogpio43tqup3rx-pinsogpio44tqup3qup-uart3-4pin-statects-pinsogpio41tqup3rts-tx-pinsogpio42gpio43tqup3rx-pinsogpio44tqup3qup-uart4-default-stateFItx-pinsogpio91tqup4rx-pinsogpio92tqup4qup-uart5-default-stateFMtx-pinsogpio87tqup5rx-pinsogpio88tqup5qup-uart6-default-statetx-pinsogpio47tqup6rx-pinsogpio48tqup6qup-uart6-4pin-stateFPcts-pinsogpio45tqup6�rts-tx-pinsogpio46gpio47tqup6��rx-pinsogpio48tqup6}qup-uart7-default-stateFVtx-pinsogpio95tqup7rx-pinsogpio96tqup7qup-uart8-default-stateF[tx-pinsogpio67tqup8rx-pinsogpio68tqup8qup-uart9-default-stateF^tx-pinsogpio4tqup9��rx-pinsogpio5tqup9�}qup-uart10-default-stateFbtx-pinsogpio53tqup10rx-pinsogpio54tqup10qup-uart11-default-stateFjtx-pinsogpio33tqup11rx-pinsogpio34tqup11qup-uart12-default-stateFmtx-pinsogpio51tqup0rx-pinsogpio52tqup0qup-uart13-default-stateFptx-pinsogpio107tqup13rx-pinsogpio108tqup13qup-uart14-default-stateFutx-pinsogpio31tqup14rx-pinsogpio32tqup14qup-uart15-default-stateFxtx-pinsogpio83tqup15rx-pinsogpio84tqup15quat-mi2s-sleep-stateogpio58gpio59tgpio��quat-mi2s-active-stateogpio58gpio59 tqua_mi2s���quat-mi2s-sd0-sleep-stateogpio60tgpio��quat-mi2s-sd0-active-stateogpio60 tqua_mi2s��quat-mi2s-sd1-sleep-stateogpio61tgpio��quat-mi2s-sd1-active-stateogpio61 tqua_mi2s��quat-mi2s-sd2-sleep-stateogpio62tgpio��quat-mi2s-sd2-active-stateogpio62 tqua_mi2s��quat-mi2s-sd3-sleep-stateogpio63tgpio��quat-mi2s-sd3-active-stateogpio63 tqua_mi2s��ap-suspend-l-hog�9~�ap-edp-bklten-stateogpio37tgpio��Fbios-flash-wp-r-l-stateogpio128tgpio�F�ec-ap-int-l-stateogpio122tgpio}Faedp-brij-en-stateogpio102tgpio��F>edp-brij-irq-stateogpio10tgpio��F?en-pp3300-dx-edp-stateogpio43tgpio��Fh1-ap-int-odl-stateogpio129tgpio}FLpen-eject-odl-stateogpio119tgpio}Fpen-irq-l-stateogpio24tgpio�Fdpen-pdct-l-stateogpio63tgpio�Fepen-rst-l-stateogpio23tgpio���Ffqspi-sleep-stateogpio90gpio91gpio92gpio95tgpio�F�sdc2-clk-state osdc2_clk��F�sdc2-cmd-state osdc2_cmd}�F�sdc2-data-state osdc2_data}�F�sd-cd-odl-stateogpio44tgpio}F�ts-int-l-stateogpio125tgpio}Frts-reset-l-stateogpio118tgpio��Fsap-suspend-l-assert-stateogpio126tgpio���F�ap-suspend-l-deassert-stateogpio126tgpio���F�remoteproc@40800002qcom,sdm845-mss-pil ZH �qdsp6rmbL% �����09wdogfatalreadyhandoverstop-ackshutdown-ack@^/$/'//%/(/&/@%2Iifacebusmemgpll0_msssnoc_aximnoc_axiprngxoc'l�}stop%�� ,mss_restartpdc_reset��0P@�... �cxmxmss�okay *�*$mbaU�mpssU�metadataU�glink-edge ���modem��) clock-controller@50900002qcom,sdm845-gpuccZ ���^%// 8Ibi_tcxogcc_gpu_gpll0_clk_srcgcc_gpu_gpll0_div_clk_srcF�remoteproc@5c000002qcom,sdm845-slpi-pasZ�@@%�����#9wdogfatalreadyhandoverstop-ack^%Ixoc'�..�lcxlmxU�l�}stop �disabledglink-edge ���dsps��)fastrpc 2qcom,fastrpc�fastrpcglink-apps-dsp�sdsp U� compute-cb@02qcom,fastrpc-compute-cbZstm@6002000 2arm,coresight-stmarm,primecell Z (�stm-basestm-stimulus-base^' Iapb_pclkout-portsportendpointv�F�funnel@6041000+2arm,coresight-dynamic-funnelarm,primecellZ^' Iapb_pclkout-portsportendpointv�F�in-ports port@7Zendpointv�F�funnel@6043000+2arm,coresight-dynamic-funnelarm,primecellZ0^' Iapb_pclkout-portsportendpointv�F�in-ports port@5Zendpointv�F�funnel@6045000+2arm,coresight-dynamic-funnelarm,primecellZP^' Iapb_pclkout-portsportendpointv�F�in-ports port@0Zendpointv�F�port@2Zendpointv�F�replicator@6046000/2arm,coresight-dynamic-replicatorarm,primecellZ`^' Iapb_pclkout-portsportendpointv�F�in-portsportendpointv�F�etf@6047000 2arm,coresight-tmcarm,primecellZp^' Iapb_pclkout-portsportendpointv�F�in-portsportendpointv�F�etr@6048000 2arm,coresight-tmcarm,primecellZ�^' Iapb_pclk in-portsportendpointv�F�etm@7040000"2arm,coresight-etm4xarm,primecellZ^' Iapb_pclk $out-portsportendpointv�F�etm@7140000"2arm,coresight-etm4xarm,primecellZ^' Iapb_pclk $out-portsportendpointv�F�etm@7240000"2arm,coresight-etm4xarm,primecellZ$^' Iapb_pclk $out-portsportendpointv�F�etm@7340000"2arm,coresight-etm4xarm,primecellZ4^' Iapb_pclk $out-portsportendpointv�F�etm@7440000"2arm,coresight-etm4xarm,primecellZD^' Iapb_pclk $out-portsportendpointv�F�etm@7540000"2arm,coresight-etm4xarm,primecellZT^' Iapb_pclk $out-portsportendpointv�F�etm@7640000"2arm,coresight-etm4xarm,primecellZd^' Iapb_pclk $out-portsportendpointv�F�etm@7740000"2arm,coresight-etm4xarm,primecellZt^' Iapb_pclk $out-portsportendpointv�F�funnel@7800000+2arm,coresight-dynamic-funnelarm,primecellZ�^' Iapb_pclkout-portsportendpointv�F�in-ports port@0Zendpointv�F�port@1Zendpointv�F�port@2Zendpointv�F�port@3Zendpointv�F�port@4Zendpointv�F�port@5Zendpointv�F�port@6Zendpointv�F�port@7Zendpointv�F�funnel@7810000+2arm,coresight-dynamic-funnelarm,primecellZ�^' Iapb_pclkout-portsportendpointv�F�in-portsportendpointv�F�mmc@8804000$2qcom,sdm845-sdhciqcom,sdhci-msm-v5Z�@���9hc_irqpwr_irq^/h/i%Iifacecorexo  *��.���okay default���� I� U� b@,opp-table2operating-points-v2F�opp-9600000��|�opp-19200000�$��opp-100000000���� opp-201500000� �`�!spi@88df0002qcom,sdm845-qspiqcom,qspi-v1Z��  *`  �R^/�/� Iifacecore�.���okay defaultsleep����U�flash@02jedec,spi-norZ�}x@ k |slim-ngd@171c00002qcom,slim-ngd-v2.1.0Z� ��#��(rxtx  *  �disabledlmh@17d708002qcom,sdm845-lmhZ� �! � ��� �q$ �sj �disabledlmh@17d788002qcom,sdm845-lmhZ׈ �  � ��� �q$ �sj �disabledphy@88e2000(2qcom,sdm845-qusb2-phyqcom,qusb2-v2-phyZ� �okayG^/�% Icfg_ahbref%/ ��u��� ��  + @ WF�phy@88e3000(2qcom,sdm845-qusb2-phyqcom,qusb2-v2-phyZ�0�okayG^/�% Icfg_ahbref%/  ��u��� ��  +F�phy@88e80002qcom,sdm845-qmp-usb3-dp-phyZ��0 �disabled(^/�/�/�/�/�"Iauxrefcom_auxusb3_pipecfg_ahb%// ,phycommonG nF�ports port@0Zendpointport@1Zendpointv�F�port@2Zendpointv�F�phy@88eb0002qcom,sdm845-qmp-usb3-uni-phyZ��(^/�/�/�/�/�Iauxcfg_ahbrefcom_auxpipe3usb3_uni_phy_pipe_clk_srcG%// ,phyphy_phy�okay����F�usb@a6f88002qcom,sdm845-dwc3qcom,dwc3Z o��okay ��(^/ /�//�/�#Icfg_noccoreifacesleepmock_utmiR/�/�b$��рD%��� ��<9pwr_evenths_phy_irqdp_hs_phy_irqdm_hs_phy_irqss_phy_irq�/%/0�W1)�usb-ddrapps-usb �usb@a600000 2snps,dwc3Z `� ��  *@ � � �8� =usb2-phy �peripheral �high-speedports port@0Zendpointport@1Zendpointv�F�usb@a8f88002qcom,sdm845-dwc3qcom,dwc3Z ���okay ��(^/ /�//�/�#Icfg_noccoreifacesleepmock_utmiR/�/�b$��рD%��� � �<9pwr_evenths_phy_irqdp_hs_phy_irqdm_hs_phy_irqss_phy_irq�/%/0�W1*�usb-ddrapps-usbusb@a800000 2snps,dwc3Z �� ��  *` � � �8��=usb2-phyusb3-phy �hostvideo-codec@aa000002qcom,sdm845-venus-v2Z �� �� ����.�venusvcodec0vcodec1cx��8^� �� ����AIcoreifacebusvcodec0_corevcodec0_busvcodec1_corevcodec1_bus *�*�U�0��1+�video-memcpu-cfg�okayvideo-core02venus-decodervideo-core12venus-encoderopp-table2operating-points-v2F�opp-100000000����opp-200000000� ���opp-320000000��� opp-380000000��W�!opp-444000000�v��"opp-533000097�����video-firmware  *�clock-controller@ab000002qcom,sdm845-videoccZ �^%Ibi_tcxo��F�camss@acb30002qcom,sdm845-camss�Z �0 ˠ ̀ �P �` �p ƀ ��@ �`@ �@@E�csid0csid1csid2csiphy0csiphy1csiphy2csiphy3vfe0vfe1vfe_litex�����������E9csid0csid1csid2csiphy0csiphy1csiphy2csiphy3vfe0vfe1vfe_lite���� ^�� � �%�&�,�-�2�3�� � �� �������//�R�S�!�"�$�#�(�)�+�*�/�1�0�Icamnoc_axicpas_ahbcphy_rx_srccsi0csi0_srccsi1csi1_srccsi2csi2_srccsiphy0csiphy0_timercsiphy0_timer_srccsiphy1csiphy1_timercsiphy1_timer_srccsiphy2csiphy2_timercsiphy2_timer_srccsiphy3csiphy3_timercsiphy3_timer_srcgcc_camera_ahbgcc_camera_axislow_ahb_srcsoc_ahbvfe0_axivfe0vfe0_cphy_rxvfe0_srcvfe1_axivfe1vfe1_cphy_rxvfe1_srcvfe_litevfe_lite_cphy_rxvfe_lite_src0 *** *  �disabledports port@0Zport@1Zport@2Zport@3Zcci@ac4a000!2qcom,sdm845-cciqcom,msm8996-cci Z Ġ@ ����0^��S�R� ��5Icamnoc_axisoc_ahbslow_ahb_srccpas_ahbccicci_srcR��bĴ<4` defaultsleep��U�� �disabledi2c-bus@0Z#B@ i2c-bus@1Z#B@ clock-controller@ad000002qcom,sdm845-camccZ ���^%Ibi_tcxoF�display-subsystem@ae000002qcom,sdm845-mdssZ ��mdss��^��  Iifacecore �Sj0����mdp0-memmdp1-mem *�* ��okay �F�display-controller@ae010002qcom,sdm845-dpu Z �� �  �mdpvbif(^/��� �Igcc-busifacebuscorevsyncR�b$����.��ports port@0Zendpointv�F�port@1Zendpointv�F�port@2Zendpointv�F�opp-table2operating-points-v2F�opp-19200000�$��opp-171428571� 7���opp-344000000���!opp-430000000��G��"displayport-controller@ae90000 �disabled2qcom,sdm845-dpPZ � � � �  ��� (^��� �"�%;Icore_ifacecore_auxctrl_linkctrl_link_ifacestream_pixelR�!�& ��8�=dp���.ports port@0Zendpointv�F�port@1Zendpointv�F�opp-table2operating-points-v2F�opp-162000000� ���opp-270000000�߀� opp-540000000� /��!opp-810000000�0G���"dsi@ae94000(2qcom,sdm845-dsi-ctrlqcom,mdss-dsi-ctrlZ �@ �dsi_ctrl��0^������$Ibytebyte_intfpixelcoreifacebusR�� �����.8��okay  �ports port@0Zendpointv�F�port@1Zendpointv� 'FCphy@ae944002qcom,dsi-phy-10nm0Z �D �F� �J��dsi_phydsi_phy_lanedsi_pllG^�% Iifaceref�okay 2�F�dsi@ae96000(2qcom,sdm845-dsi-ctrlqcom,mdss-dsi-ctrlZ �` �dsi_ctrl��0^���� ��$Ibytebyte_intfpixelcoreifacebusR�� �����.8� �disabled ports port@0Zendpointv�F�port@1Zendpointphy@ae964002qcom,dsi-phy-10nm0Z �d �f� �j�dsi_phydsi_phy_lanedsi_pllG^�% Iifaceref �disabledF�gpu@50000002qcom,adreno-630.2qcom,adreno Z ��kgsl_3d0_reg_memorycx_mem �, ��� >����gfx-mem�okayF�opp-table2operating-points-v2F�opp-710000000�*Q�� G��n�opp-675000000�(;�� G��n�opp-596000000�#�= G@�^��opp-520000000��� G�^��opp-414000000��#� G��>�opp-342000000�b�� G��)��opp-257000000�Q�@ G@�%�iommu@5040000!2qcom,sdm845-smmu-v2qcom,smmu-v2Z Q ^x���lmnopqrs^/!/ Ibusiface��F�gmu@506a000&2qcom,adreno-gmu-630.2qcom,adreno-gmu0Z� ( H�gmugmu_pdcgmu_pdc_seq�019hfigmu ^��//!Igmucxoaximemnoc����cxgx ����okayF�opp-table2operating-points-v2F�opp-400000000�ׄ G�opp-200000000� �� G0clock-controller@af000002qcom,sdm845-dispccZ �H^%//�������Ibi_tcxogcc_disp_gpll0_clk_srcgcc_disp_gpll0_div_clk_srcdsi0_phy_pll_out_byteclkdsi0_phy_pll_out_dsiclkdsi1_phy_pll_out_byteclkdsi1_phy_pll_out_dsiclkdp_link_clk_divsel_tendp_vco_divided_clk_src_mux��F�interrupt-controller@b2200002qcom,sdm845-pdcqcom,pdcZ "$ q�^^asvjF�reset-controller@b2e00002qcom,sdm845-pdc-globalZ .�F�thermal-sensor@c263000 2qcom,sdm845-tsensqcom,tsens-v2 Z &0� " � � ���9uplowcritical �F�thermal-sensor@c265000 2qcom,sdm845-tsensqcom,tsens-v2 Z &P� "0� ����9uplowcritical �F�reset-controller@c2a00002qcom,sdm845-aoss-ccZ *�F�power-management@c300000#2qcom,sdm845-aoss-qmpqcom,aoss-qmpZ 0 ���)F'cx�ebi�sram@c3f00002qcom,sdm845-rpmh-statsZ ?spmi@c4400002qcom,spmi-pmic-arbPZ D ``p @�`�corechnlsobsrvrintrcnfg 9periph_irq ��� � jpmic@42qcom,pm8005qcom,spmi-pmicZ gpio@c000 2qcom,pm8005-gpioqcom,spmi-gpioZ�;�/j_SLBF�pmic@52qcom,pm8005qcom,spmi-pmicZ regulators2qcom,pm8005-regulatorspmic@02qcom,pm8998qcom,spmi-pmicZ pon@8002qcom,pm8998-ponZ � �pwrkey2qcom,pm8941-pwrkey� �= } �t �disabledresin2qcom,pm8941-resin� �= } �disabledtemp-alarm@24002qcom,spmi-temp-alarmZ$�$ �� �thermal �F�charger@2800*2qcom,pm8998-coincellqcom,pm8941-coincellZ( �disabledadc@31002qcom,spmi-adc-rev2Z1�1  F�channel@6Z �die_tempchannel@4dZM �sdm_tempchannel@4eZN �quiet_tempchannel@4fZO �lte_temp_1channel@50ZP �lte_temp_2channel@51ZQ �charger_tempadc-tm@34002qcom,spmi-adc-tm-hcZ4�4 �  �disabledrtc@60002qcom,pm8941-rtcZ`a �rtcalarm�agpio@c000 2qcom,pm8998-gpioqcom,spmi-gpioZ�;�/j@_SW_CTRLCFG_OPT1WCSS_PWR_REQCFG_OPT2SLBF�pmic@12qcom,pm8998qcom,spmi-pmicZ sram@146bf000#2qcom,sdm845-imemsysconsimple-mfdZk� �k�pil-reloc@94c2qcom,pil-reloc-infoZ L�iommu@15000000!2qcom,sdm845-smmu-500arm,mmu-500Z Q ^ �A`abcdefghijklmnopqrstuv������������;<=>?@ABCDEFGHIJKLMNOPQRSTUVWF*tbu@150c50002qcom,sdm845-tbuZ P��1�/ *tbu@150c90002qcom,sdm845-tbuZ ���1�/  *tbu@150cd0002qcom,sdm845-tbuZ ���� �/  *tbu@150d10002qcom,sdm845-tbuZ ��� �/  * tbu@150d50002qcom,sdm845-tbuZ P��� �/  *tbu@150d90002qcom,sdm845-tbuZ ���1 *tbu@150dd0002qcom,sdm845-tbuZ ���1�/ *tbu@150e10002qcom,sdm845-tbuZ^/��1�/ *clock-controller@170140002qcom,sdm845-lpasscc Z@�0 �ccqdsp6ss�okayinterconnect@179000002qcom,sdm845-gladiator-nocZ�Ѐw�{Fwatchdog@17980000#2qcom,apss-wdt-sdm845qcom,kpss-wdtZ�^+ �mailbox@179900002qcom,sdm845-apss-sharedZ� (F)rsc@179c0000 �apps_rsc2qcom,rpmh-rsc0Z����drv-0drv-1drv-2$� 4  D Pbcm-voter2qcom,bcm-voterF{clock-controller2qcom,sdm845-rpmh-clkIxo^�F%power-controller2qcom,sdm845-rpmhpd���F.opp-table2operating-points-v2F�opp1 Gopp2 G0Fopp3 G@Fopp4 G�F opp5 G�F!opp6 GF"opp7 G@opp8 GPopp9 G�F�opp10 G�regulators-02qcom,pm8998-rpmh-regulators `a m� {� �� �� �� �� �� �� �� �� �� � � '� 9� N� `� q� � �� �� �� �� �� ���Asmps20��H��smps30�@H�@F�smps50 �H �F�smps70 ��H��F�ldo10 m�H m�`F�ldo20O�HO�`wFBldo30B@HB@`ldo50 5H 5`F�ldo60RHR`ldo70w@Hw@`FQldo80O�H `ldo90w@Hw@`Fhldo100w@Hw@`ldo110B@H��`ldo120w@Hw@`F�ldo130w@H-*�`F�ldo140w@Hw@`ldo150w@Hw@`ldo160)B�H)B�`ldo170��H��`FRldo180)B�H-*�`ldo1902j@H2j@`ldo200)B�H-*�`F~ldo210)B�H-*�`F�ldo2202j@H2j@`�wldo230-��H2��`ldo240/�H/�`F�ldo2502j@H2j@`FSldo260O�HO�`F�ldo2802j@H2j@`Fglvs10w@Hw@lvs20w@Hw@regulators-12qcom,pm8005-rpmh-regulators `c m� {� �� ��smps30 '�H '�interrupt-controller@17a00000 2arm,gic-v3 �j Z�� � Fmsi-controller@17a400002arm,gic-v3-its��Z� �disableddma-controller@17184000 2qcom,bam-v1.7.4qcom,bam-v1.7.0�Z@�� �����  *F�timer@17c90000 � 2arm,armv7-timer-memZ�frame@17ca0000��Z��frame@17cc0000� �Z� �disabledframe@17cd0000� � Z� �disabledframe@17ce0000� � Z� �disabledframe@17cf0000� � Z� �disabledframe@17d00000� � Z� �disabledframe@17d10000� � Z� �disabledinterconnect@17d410002qcom,sdm845-osm-l3qcom,osm-l3Z�^%/� IxoalternatewFcpufreq@17d43000'2qcom,sdm845-cpufreq-hwqcom,cpufreq-hw Z�0�X�freq-domain0freq-domain1^%/� Ixoalternate�Fwifi@188000002qcom,wcn3990-wifi�okayZ���membaseU�Icxo_ref_clk_pin^%��������������  *@��QR+Ssoundthermal-zonescpu0-thermal>�T�tripstrip-point0d_�p�Upassivetrip-point1dsp�Upassivecpu-critd��p� Ucriticalcpu1-thermal>�T�tripstrip-point0d_�p�Upassivetrip-point1dsp�Upassivecpu-critd��p� Ucriticalcpu2-thermal>�T�tripstrip-point0d_�p�Upassivetrip-point1dsp�Upassivecpu-critd��p� Ucriticalcpu3-thermal>�T�tripstrip-point0d_�p�Upassivetrip-point1dsp�Upassivecpu-critd��p� Ucriticalcpu4-thermal>�T�tripstrip-point0d_�p�Upassivetrip-point1dsp�Upassivecpu-critd��p� Ucriticalcpu5-thermal>�T�tripstrip-point0d_�p�Upassivetrip-point1dsp�Upassivecpu-critd��p� Ucriticalcpu6-thermal>�T� tripstrip-point0d_�p�Upassivetrip-point1dsp�Upassivecpu-critd��p� Ucriticalcpu7-thermal>�T� tripstrip-point0d_�p�Upassivetrip-point1dsp�Upassivecpu-critd��p� Ucriticalaoss0-thermal>�T�tripstrip-point0d_�p�Uhotcluster0-thermal>�T�tripstrip-point0d_�p�Uhotcluster0-critd��p� Ucriticalcluster1-thermal>�T�tripstrip-point0d_�p�Uhotcluster1-critd��p� Ucriticalgpu-top-thermal>�T� cooling-mapsmap0{� ����������tripstrip-point0dLp�UpassiveF�trip-point1d_�p�Uhottrip-point2d��p� Ucriticalgpu-bottom-thermal>�T� cooling-mapsmap0{� ����������tripstrip-point0dLp�UpassiveF�trip-point1d_�p�Uhottrip-point2d��p� Ucriticalaoss1-thermal>�T�tripstrip-point0d_�p�Uhotq6-modem-thermal>�T�tripstrip-point0d_�p�Uhotmem-thermal>�T�tripstrip-point0d_�p�Uhotwlan-thermal>�T�tripstrip-point0d_�p�Uhotq6-hvx-thermal>�T�tripstrip-point0d_�p�Uhotcamera-thermal>�T�tripstrip-point0d_�p�Uhotvideo-thermal>�T�tripstrip-point0d_�p�Uhotmodem-thermal>�T�tripstrip-point0d_�p�Uhotpm8998-thermal>�T�tripspm8998-alert0d�(p�Upassivepm8998-critd�Hp� Ucriticaltimer2arm,armv8-timer0�backlight2pwm-backlight�� 2@%� defaultFppvar-sys-regulator2regulator-fixed �ppvar_sysw�Fsrc-vph-pwr-regulator2regulator-fixed �src_vph_pwrw��F�pp5000-a-regulator2regulator-fixed �pp5000_aw�0LK@HLK@�src-vreg-bob-regulator2regulator-fixed �src_vreg_bobw�06�H6��F�pp3300-dx-edp-regulator2regulator-fixed�pp3300_dx_edp02Z�H2Z� �@+� defaultFpm8998-smps42regulator-fixed�src_pp1800_s4a0w@Hw@w���FAgpio-keys 2gpio-keys defaultswitch-pen-insert �Pen Insert 9@w ���panel2innolux,p120zdg-bf1��oportendpointvFD interrupt-parent#address-cells#size-cellsmodelcompatiblei2c0i2c1i2c2i2c3i2c4i2c5i2c6i2c7i2c8i2c9i2c10i2c11i2c12i2c13i2c14i2c15spi0spi1spi2spi3spi4spi5spi6spi7spi8spi9spi10spi11spi12spi13spi14spi15bluetooth0serial1serial0wifi0stdout-path#clock-cellsclock-frequencyclock-output-namesphandledevice_typeregclocksenable-methodcapacity-dmips-mhzdynamic-power-coefficientqcom,freq-domainoperating-points-v2interconnects#cooling-cellsnext-level-cachecpu-idle-statescache-levelcache-unifiedcpuentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopopp-sharedopp-hzopp-peak-kBpsrequired-oppsinterruptsrangesno-maphwlocksqcom,client-idqcom,vmidalloc-rangessizealignmentreusableinterrupts-extendedinterrupt-namesclock-namesmemory-regionqcom,qmpqcom,smem-statesqcom,smem-state-namesstatuslabelqcom,remote-pidmboxesqcom,glink-channelsqcom,domainqcom,intentsqcom,protection-domain#sound-dai-cellsiommusqcom,non-secure-domainqcom,smemqcom,local-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsdma-ranges#reset-cells#power-domain-cellspower-domainsbits#dma-cellsdma-channelsdma-channel-maskinterconnect-namespinctrl-namespinctrl-0dmasdma-namesenable-gpiosvpll-supplyvccio-supplyvcca-supplyvcc-supplyno-hpdremote-endpointspi-max-frequencyvddio-supplyvddxo-supplyvddrf-supplyvddch0-supplymax-speedwakeup-source#pwm-cellsgoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymapvdd-supplyvddl-supplypost-power-on-delay-mshid-descr-addrvcc33-supplyreset-gpiosreg-nameslinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapiommu-mapresetsreset-namesphysphy-names#phy-cellsassigned-clocksassigned-clock-rates#interconnect-cellsqcom,bcm-voterslanes-per-directionvcc-max-microampvdda-phy-supplyvdda-pll-supplyqcom,eeqcom,controlled-remotelyqcom,gsi-loader#hwlock-cellsgpio-controller#gpio-cellsgpio-rangeswakeup-parentpinctrl-1gpio-line-namespinsfunctionbias-pull-updrive-strengthbias-pull-downbias-disableoutput-highgpio-hogoutput-lowoutput-disableqcom,halt-regspower-domain-namesqcom,vmidsarm,scatter-gatherarm,coresight-loses-context-with-cpuvmmc-supplyvqmmc-supplycd-gpiosspi-tx-bus-widthspi-rx-bus-widthcpusqcom,lmh-temp-arm-millicelsiusqcom,lmh-temp-low-millicelsiusqcom,lmh-temp-high-millicelsiusnvmem-cellsvdda-phy-dpdm-supplyqcom,imp-res-offset-valueqcom,hstx-trim-valueqcom,preemphasis-levelqcom,preemphasis-widthorientation-switchqcom,select-utmi-as-pipe-clksnps,dis_u2_susphy_quirksnps,dis_enblslpm_quirksnps,parkmode-disable-ss-quirkdr_modemaximum-speedassigned-clock-parentsvdda-supplydata-lanesvdds-supplyqcom,gmuopp-level#iommu-cells#global-interruptsqcom,pdc-ranges#qcom,sensors#thermal-sensor-cellsqcom,channelmode-bootloadermode-recoverydebouncelinux,codeio-channelsio-channel-names#io-channel-cellsqcom,stream-id-range#mbox-cellsqcom,tcs-offsetqcom,drv-idqcom,tcs-configqcom,pmic-idvdd-s1-supplyvdd-s2-supplyvdd-s3-supplyvdd-s4-supplyvdd-s5-supplyvdd-s6-supplyvdd-s7-supplyvdd-s8-supplyvdd-s9-supplyvdd-s10-supplyvdd-s11-supplyvdd-s12-supplyvdd-s13-supplyvdd-l1-l27-supplyvdd-l2-l8-l17-supplyvdd-l3-l11-supplyvdd-l4-l5-supplyvdd-l6-supplyvdd-l7-l12-l14-l15-supplyvdd-l9-supplyvdd-l10-l23-l25-supplyvdd-l13-l19-l21-supplyvdd-l16-l28-supplyvdd-l18-l22-supplyvdd-l20-l24-supplyvdd-l26-supplyvin-lvs-1-2-supplyregulator-min-microvoltregulator-max-microvoltregulator-initial-moderegulator-always-onregulator-boot-onmsi-controller#msi-cellsnum-channelsqcom,num-eesframe-number#freq-domain-cellsvdd-0.8-cx-mx-supplyvdd-1.8-xo-supplyvdd-1.3-rfa-supplyvdd-3.3-ch0-supplypolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-devicepwmspower-supplyregulator-namevin-supplygpioenable-active-highlinux,input-typebacklight