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MSM 8916 MTP2qcom,msm8916-mtpqcom,msm8916=handsetchosenJserial0memory@80000000Vmemoryb�reserved-memory ftz-apps@86000000b�0msmem@86300000 2qcom,smemb�0mt|hypervisor@86400000b�@mtz@86500000b�Pmreserved@86680000b�hmrmtfs@867000002qcom,rmtfs-memb�pm�rfsa@867e0000b�~mmpss@86800000b��m �disabled�`wcnss�`����m �disabled��venus�P����m �disabled�Smba�����m �disabled�_clocksxo-board 2fixed-clock��$��sleep-clk 2fixed-clock����Hcpus cpu@0Vcpu2arm,cortex-a53b��psci -;psciNW �;cpu@1Vcpu2arm,cortex-a53b��psci - ;psciN W �<cpu@2Vcpu2arm,cortex-a53b��psci - ;psciNW�=cpu@3Vcpu2arm,cortex-a53b��psci -;psciNW�>l2-cache2cache`l�idle-stateszpscicpu-sleep-02arm,idle-state�standalone-power-collapse�@��������domain-idle-statescluster-retention2domain-idle-state�A�������cluster-gdhs2domain-idle-state�A2�����p�opp-table-cpu2operating-points-v2��opp-200000000� ��opp-400000000�ׄopp-800000000�/�opp-998400000�;�`firmwarescm2qcom,scm-msm8916qcom,scmhgfcorebusifacea�]pmu2arm,cortex-a53-pmu ,psci 2arm,psci-1.0�smcpower-domain-cpu07-K�power-domain-cpu17-K� power-domain-cpu27-K� power-domain-cpu37-K�power-domain-cluster7K�remoteproc$2qcom,msm8916-rpm-procqcom,rpm-procsmd-edge ,�^erpm-requests2qcom,rpm-msm8916qcom,smd-rpm srpm_requestsclock-controller2qcom,rpmcc-msm8916qcom,rpmcc�xo�*power-controller2qcom,msm8916-rpmpd7 �[opp-table2operating-points-v2�opp1�opp2�opp3�opp4�opp5�opp6�regulators2qcom,rpm-pm8916-regulators���s3����p��s4�:�� �p��l1l2�O��O���Ml4l5�w@�w@��Xl6�w@�w@�Nl7�w@�w@��^l8�,@ �,@ �fl9�2Z��2Z���l10l11�-p�-p " @�il12�w@�-p�jl13�.��.��Yl14l15l16l17l18smp2p-hexagon 2qcom,smp2p8�� ,^BQmaster-kernelamaster-kernelq�\slave-kernel aslave-kernel���Zsmp2p-wcnss 2qcom,smp2p8�� ,�^BQmaster-kernelamaster-kernelq��slave-kernel aslave-kernel����smsm 2qcom,smsm ^ apps@0bq�bhexagon@1b ,���awcnss@6b ,���soc@0 f���� 2simple-busrng@22000 2qcom,prngb ycorerestart@4ab000 2qcom,psholdbJ�qfprom@5c000 2qcom,msm8916-qfpromqcom,qfpromb� base1@d0b���s0-p1@d0b��� s0-p2@d1b���!s1-p1@d2b���"s1-p2@d2b���#s2-p1@d3b���$s2-p2@d4b���%s4-p1@d4b���&s4-p2@d5b���'s5-p1@d5b���(s5-p2@d6b���)base2@d7b���mode@efb���sram@600002qcom,rpm-msg-ramb��sram@2900002qcom,msm8916-rpm-statsb)interconnect@4000002qcom,msm8916-bimcb@ �thermal-sensor@4a9000#2qcom,msm8916-tsensqcom,tsens-v0_1bJ�J�4� !"#$%&'()M�modebase1base2s0_p1s0_p2s1_p1s1_p2s2_p1s2_p2s4_p1s4_p2s5_p1s5_p2� ,��uplow��interconnect@5000002qcom,msm8916-pcnocbP�interconnect@5800002qcom,msm8916-snocbX@�stm@802000 2arm,coresight-stmarm,primecellb�  (stm-basestm-stimulus-base** apb_pclkatclk �disabledout-portsportendpoint"+�.cti@810000 2arm,coresight-ctiarm,primecellb�* apb_pclk �disabledcti@811000 2arm,coresight-ctiarm,primecellb�* apb_pclk �disabledtpiu@820000!2arm,coresight-tpiuarm,primecellb�** apb_pclkatclk �disabledin-portsportendpoint",�1funnel@821000+2arm,coresight-dynamic-funnelarm,primecellb�** apb_pclkatclk �disabledin-ports port@4bendpoint"-�:port@7bendpoint".�+out-portsportendpoint"/�3replicator@824000/2arm,coresight-dynamic-replicatorarm,primecellb�@** apb_pclkatclk �disabledout-ports port@0bendpoint"0�5port@1bendpoint"1�,in-portsportendpoint"2�4etf@825000 2arm,coresight-tmcarm,primecellb�P** apb_pclkatclk �disabledin-portsportendpoint"3�/out-portsportendpoint"4�2etr@826000 2arm,coresight-tmcarm,primecellb�`** apb_pclkatclk �disabledin-portsportendpoint"5�0funnel@841000+2arm,coresight-dynamic-funnelarm,primecellb�** apb_pclkatclk �disabledin-ports port@0bendpoint"6�Cport@1bendpoint"7�Dport@2bendpoint"8�Eport@3bendpoint"9�Fout-portsportendpoint":�-debug@850000&2arm,coresight-cpu-debugarm,primecellb�* apb_pclk2; �disableddebug@852000&2arm,coresight-cpu-debugarm,primecellb� * apb_pclk2< �disableddebug@854000&2arm,coresight-cpu-debugarm,primecellb�@* apb_pclk2= �disableddebug@856000&2arm,coresight-cpu-debugarm,primecellb�`* apb_pclk2> �disabledcti@858000:2arm,coresight-cti-v8-archarm,coresight-ctiarm,primecellb��* apb_pclk2;6? �disabledcti@859000:2arm,coresight-cti-v8-archarm,coresight-ctiarm,primecellb��* apb_pclk2<6@ �disabledcti@85a000:2arm,coresight-cti-v8-archarm,coresight-ctiarm,primecellb��* apb_pclk2=6A �disabledcti@85b000:2arm,coresight-cti-v8-archarm,coresight-ctiarm,primecellb��* apb_pclk2>6B �disabledetm@85c000"2arm,coresight-etm4xarm,primecellb��** apb_pclkatclkG2; �disabled�?out-portsportendpoint"C�6etm@85d000"2arm,coresight-etm4xarm,primecellb��** apb_pclkatclkG2< �disabled�@out-portsportendpoint"D�7etm@85e000"2arm,coresight-etm4xarm,primecellb��** apb_pclkatclkG2= �disabled�Aout-portsportendpoint"E�8etm@85f000"2arm,coresight-etm4xarm,primecellb��** apb_pclkatclkG2> �disabled�Bout-portsportendpoint"F�9pinctrl@10000002qcom,msm8916-pinctrlb0 ,�l|Gz����Gblsp-i2c1-default-state �gpio2gpio3 �blsp_i2c1���pblsp-i2c1-sleep-state �gpio2gpio3�gpio���qblsp-i2c2-default-state �gpio6gpio7 �blsp_i2c2���tblsp-i2c2-sleep-state �gpio6gpio7�gpio���ublsp-i2c3-default-state�gpio10gpio11 �blsp_i2c3���xblsp-i2c3-sleep-state�gpio10gpio11�gpio���yblsp-i2c4-default-state�gpio14gpio15 �blsp_i2c4���|blsp-i2c4-sleep-state�gpio14gpio15�gpio���}blsp-i2c5-default-state�gpio18gpio19 �blsp_i2c5����blsp-i2c5-sleep-state�gpio18gpio19�gpio����blsp-i2c6-default-state�gpio22gpio23 �blsp_i2c6����blsp-i2c6-sleep-state�gpio22gpio23�gpio����blsp-spi1-default-state�rspi-pins�gpio0gpio1gpio3 �blsp_spi1� �cs-pins�gpio2�gpio���blsp-spi1-sleep-state�gpio0gpio1gpio2gpio3�gpio���sblsp-spi2-default-state�vspi-pins�gpio4gpio5gpio7 �blsp_spi2� �cs-pins�gpio6�gpio���blsp-spi2-sleep-state�gpio4gpio5gpio6gpio7�gpio���wblsp-spi3-default-state�zspi-pins�gpio8gpio9gpio11 �blsp_spi3� �cs-pins�gpio10�gpio���blsp-spi3-sleep-state�gpio8gpio9gpio10gpio11�gpio���{blsp-spi4-default-state�~spi-pins�gpio12gpio13gpio15 �blsp_spi4� �cs-pins�gpio14�gpio���blsp-spi4-sleep-state�gpio12gpio13gpio14gpio15�gpio���blsp-spi5-default-state��spi-pins�gpio16gpio17gpio19 �blsp_spi5� �cs-pins�gpio18�gpio���blsp-spi5-sleep-state�gpio16gpio17gpio18gpio19�gpio����blsp-spi6-default-state��spi-pins�gpio20gpio21gpio23 �blsp_spi6� �cs-pins�gpio22�gpio���blsp-spi6-sleep-state�gpio20gpio21gpio22gpio23�gpio����blsp-uart1-default-state�gpio0gpio1gpio2gpio3 �blsp_uart1���lblsp-uart1-sleep-state�gpio0gpio1gpio2gpio3�gpio���mblsp-uart2-default-state �gpio4gpio5 �blsp_uart2���nblsp-uart2-sleep-state �gpio4gpio5�gpio���ocamera-front-default-statepwdn-pins�gpio33�gpio��rst-pins�gpio28�gpio��mclk1-pins�gpio27 �cam_mclk1��camera-rear-default-statepwdn-pins�gpio34�gpio��rst-pins�gpio35�gpio��mclk0-pins�gpio26 �cam_mclk0��cci0-default-state�gpio29gpio30�cci_i2c���Pcdc-dmic-default-stateclk-pins�gpio0 �dmic0_clk�data-pins�gpio1 �dmic0_data�cdc-dmic-sleep-stateclk-pins�gpio0 �dmic0_clk��data-pins�gpio1 �dmic0_data��cdc-pdm-default-state*�gpio63gpio64gpio65gpio66gpio67gpio68 �cdc_pdm0��cdc-pdm-sleep-state*�gpio63gpio64gpio65gpio66gpio67gpio68 �cdc_pdm0��mi2s-pri-default-state �gpio113gpio114gpio115gpio116 �pri_mi2s��mi2s-pri-sleep-state �gpio113gpio114gpio115gpio116 �pri_mi2s��mi2s-pri-mclk-default-state�gpio116 �pri_mi2s��mi2s-pri-mclk-sleep-state�gpio116 �pri_mi2s��mi2s-pri-ws-default-state�gpio110 �pri_mi2s_ws��mi2s-pri-ws-sleep-state�gpio110 �pri_mi2s_ws��mi2s-sec-default-state �gpio112gpio117gpio118gpio119 �sec_mi2s��mi2s-sec-sleep-state �gpio112gpio117gpio118gpio119 �sec_mi2s��sdc1-default-state�dclk-pins �sdc1_clk��cmd-pins �sdc1_cmd�� data-pins �sdc1_data�� sdc1-sleep-state�eclk-pins �sdc1_clk��cmd-pins �sdc1_cmd��data-pins �sdc1_data��sdc2-default-state�gclk-pins �sdc2_clk��cmd-pins �sdc2_cmd�� data-pins �sdc2_data�� sdc2-sleep-state�hclk-pins �sdc2_clk��cmd-pins �sdc2_cmd��data-pins �sdc2_data��wcss-wlan-default-state#�gpio40gpio41gpio42gpio43gpio44 �wcss_wlan����clock-controller@18000002qcom,gcc-msm8916�7b�$HIIBxosleep_clkdsi0plldsi0pllbyteext_mclkext_pri_i2sext_sec_i2s�hwlock@19050002qcom,tcsr-mutexb�P��syscon@19370002qcom,tcsr-msm8916sysconb�p�display-subsystem@1a00000 �disabled 2qcom,mdssb���0mdss_physvbif_phys-mnsifacebusvsync ,H�� f�Jdisplay-controller@1a010002qcom,msm8916-mdp5qcom,mdp5b�� mdp_physJ, mnqsifacebuscorevsync�Kports port@0bendpoint"L�Odsi@1a98000)2qcom,msm8916-dsi-ctrlqcom,mdss-dsi-ctrlb��\ dsi_ctrlJ,�+. II0qmnorp#mdp_coreifacebusbytepixelcore"I 'M3Nports port@0bendpoint"O�Lport@1bendpointphy@1a983002qcom,dsi-phy-28nm-lpb���������0"dsi_plldsi_phydsi_phy_regulator�@ m ifaceref3N�Icamss@1b0ac002qcom,msm8916-camssHb���0���8������� �Scsiphy0csiphy0_clk_muxcsiphy1csiphy1_clk_muxcsid0csid1ispifcsi_clk_muxvfe0H,NO3479'�csiphy0csiphy1csid0csid1ispifvfe0-�`V]^IJKLMNOPQR_cSde�top_ahbispif_ahbcsiphy0_timercsiphy1_timercsi0_ahbcsi0csi0_phycsi0_pixcsi0_rdicsi1_ahbcsi1csi1_phycsi1_pixcsi1_rdiahbvfe0csi_vfe0vfe_ahbvfe_axi�K �disabled'Mports port@0bport@1bcci@1b0c000"2qcom,msm8916-cciqcom,msm8226-cci b�� ,2 `GH_$camss_top_ahbcci_ahbccicamss_ahb�GHKĴ$�`defaultnP �disabledi2c-bus@0b�� gpu@1c000002qcom,adreno-306.0qcom,adrenob�kgsl_3d0_reg_memory ,! �kgsl_3d0_irq-coreifacememmem_ifacealt_mem_ifacegfx3d0vui��- Q�RR �disabled��opp-table2operating-points-v2�Qopp-400000000�ׄopp-19200000�$�video-codec@1d000002qcom,msm8916-venusb�� ,,-���coreifacebus�KxS �disabledvideo-decoder2venus-decodervideo-encoder2venus-encoderiommu@1ef0000 �%2qcom,msm8916-iommuqcom,msm-iommu-v1 f�b�0�� ifacebus��Kiommu-ctx@30002qcom,msm-iommu-v1-secb0 ,Fiommu-ctx@40002qcom,msm-iommu-v1-nsb@ ,Fiommu-ctx@50002qcom,msm-iommu-v1-secbP ,Fiommu@1f08000 �%2qcom,msm8916-iommuqcom,msm-iommu-v1 f���� ifacebus��Riommu-ctx@10002qcom,msm-iommu-v1-nsb ,�iommu-ctx@20002qcom,msm-iommu-v1-nsb  ,�spmi@200f0002qcom,spmi-pmic-arb(b�@@�@� �!corechnlsobsrvrintrcnfg �periph_irq ,��� ���Wpmic@02qcom,pm8916qcom,spmi-pmicb pon@8002qcom,pm8916-ponb��pwrkey2qcom,pm8941-pwrkey,�= ��tresin2qcom,pm8941-resin,�= � �disabledwatchdog2qcom,pm8916-wdt,�<charger@10002qcom,pm8916-lbcbchgrbat_ifusbmisc�,[�vbat_detfast_chgchg_failchg_donebat_prestemp_okcoarse_detusb_vbuschg_goneovertemp �disabledusb-detect@13002qcom,pm8941-miscb, �usb_vbus �disabledtemp-alarm@24002qcom,spmi-temp-alarmb$,$�Tthermal��adc@31002qcom,spmi-vadcb1,1 �Tchannel@0b* channel@7b*channel@8bchannel@9b channel@ab channel@ebchannel@fbbattery@40002qcom,pm8916-bms-vmb@`,@@@@@@2�cv_leavecv_enterocv_goodocv_thrfifostate_chg �disabledrtc@60002qcom,pm8941-rtcb`a rtcalarm,ampps@a0002qcom,pm8916-mppqcom,spmi-mppb�l�|U���Ugpio@c000 2qcom,pm8916-gpioqcom,spmi-gpiob�l|V����Vpmic@12qcom,pm8916qcom,spmi-pmicb pwm2qcom,pm8916-pwm; �disabledvibrator@c0002qcom,pm8916-vibb� �disabledaudio-codec@f0002qcom,pm8916-wcd-analog-codecb�W�,����������������cdc_spk_cnp_intcdc_spk_clip_intcdc_spk_ocp_intmbhc_ins_rem_det1mbhc_but_rel_detmbhc_but_press_detmbhc_ins_rem_detmbhc_switch_intcdc_ear_ocp_intcdc_hphr_ocp_intcdc_hphl_ocp_detcdc_ear_cnp_intcdc_hphr_cnp_intcdc_hphl_cnp_intF �disabledWXiX�Ydma-controller@40440002qcom,bam-v1.7.0b@� ,����� �disabled�cremoteproc@40800002qcom,msm8916-mss-pilb@ qdsp6rmb@�ZZZZ#�wdogfatalreadyhandoverstop-ack-[[;cxmxt�Fifacebusmemxo�\�stop ] mss_restart��� �disabled,^mbax_mpssx`bam-dmux2qcom,bam-dmuxa,  �pcpc-ack�bb  �pcpc-ack7cc6 coreiface7k k ��������cpu2-3-thermal����tripstrip-point0�$���Epassive��cpu-crit����� Ecriticalcooling-mapsmap0��0�;��������<��������=��������>��������gpu-thermal����cooling-mapsmap0�� ����������tripstrip-point0�$���Epassive��gpu-crit�s�� Ecriticalcamera-thermal����tripstrip-point0�$���Ehotmodem-thermal����tripstrip-point0�L��Ehotpm8916-thermal�d��tripstrip0��(�Epassivetrip1��H�Ehottrip2�6h� Ecriticaltimer2arm,armv8-timer0,aliases�/soc@0/serial@78b0000 /soc@0/spmi@200f000/pmic@0 interrupt-parent#address-cells#size-cellsmodelcompatiblechassis-typestdout-pathdevice_typeregrangesno-maphwlocksqcom,rpm-msg-ramqcom,client-idstatusphandlesizealignmentalloc-ranges#clock-cellsclock-frequencynext-level-cacheenable-methodclocksoperating-points-v2#cooling-cellspower-domainspower-domain-namesqcom,accqcom,sawcache-levelcache-unifiedentry-methodidle-state-namearm,psci-suspend-paramentry-latency-usexit-latency-usmin-residency-uslocal-timer-stopopp-sharedopp-hzclock-names#reset-cellsqcom,dload-modeinterrupts#power-domain-cellsdomain-idle-statesmboxesqcom,smd-edgeqcom,smd-channelsopp-levelvdd_l1_l2_l3-supplyvdd_l4_l5_l6-supplyvdd_l7-supplyregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-allow-set-loadregulator-system-loadqcom,smemqcom,local-pidqcom,remote-pidqcom,entry-name#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsbits#interconnect-cellsnvmem-cellsnvmem-cell-names#qcom,sensorsinterrupt-names#thermal-sensor-cellsreg-namesremote-endpointcpuarm,cs-dev-assocarm,coresight-loses-context-with-cpugpio-controllergpio-ranges#gpio-cellspinsfunctiondrive-strengthbias-disableoutput-highbias-pull-downbias-pull-up#hwlock-cellsiommusassigned-clocksassigned-clock-parentsphysvdda-supplyvddio-supply#phy-cellsassigned-clock-ratespinctrl-namespinctrl-0memory-region#iommu-cellsqcom,iommu-secure-idqcom,eeqcom,channelmode-bootloadermode-recoverydebouncelinux,codetimeout-secio-channelsio-channel-names#io-channel-cellsqcom,pre-scaling#pwm-cells#sound-dai-cellsvdd-cdc-io-supplyvdd-cdc-tx-rx-cx-supplyvdd-micbias-supply#dma-cellsnum-channelsqcom,num-eesqcom,powered-remotelyinterrupts-extendedqcom,smem-statesqcom,smem-state-namesresetsreset-namesqcom,halt-regspll-supplydmasdma-nameslabelqcom,domainqcom,non-secure-domainpinctrl-1mmc-ddr-1_8vbus-widthnon-removablevmmc-supplyvqmmc-supplyqcom,controlled-remotelyphy_typedr_modehnp-disablesrp-disableadp-disableahb-burst-configphy-namesqcom,init-seqv1p8-supplyv3p3-supplyvddpx-supplyvddxo-supplyvddrfa-supplyvddpa-supplyvdddig-supplyqcom,mmio#mbox-cellsframe-numberpolling-delay-passivethermal-sensorstemperaturehysteresistripcooling-deviceserial0usid0