� ��&�8"�("� +,Qualcomm Technologies, Inc. IPQ5332 MI01.9$2qcom,ipq5332-ap-mi01.9qcom,ipq5332clockssleep-clk 2fixed-clock=J}Z xo-board-clk 2fixed-clock=Jn6Z cpus cpu@0bcpu2arm,cortex-a53nrpsci���cpu@1bcpu2arm,cortex-a53nrpsci���cpu@2bcpu2arm,cortex-a53nrpsci���cpu@3bcpu2arm,cortex-a53nrpsci���l2-cache2cache��Zfirmwarescm2qcom,scm-ipq5332qcom,scm�amemory@40000000bmemoryn@opp-table-cpu2operating-points-v2-kryo-cpu��Zopp-1100000000�A��� @opp-1500000000�Yh/� @pmu2arm,cortex-a53-pmu psci 2arm,psci-1.0ysmcreserved-memory !bootloader@4a100000nJ@(sbl@4a500000nJP(tz@4a600000nJ` (smem@4a800000 2qcom,smemnJ�(/soc@0 2simple-bus !����phy@7b0002qcom,ipq5332-usb-hsphyn�,��7n> IdisabledZefuse@a4000 2qcom,ipq5332-qfpromqcom,qfpromn @! cpu-speed-bin@1dnPZrng@e3000 2qcom,prng-een0�YUcorepinctrl@10000002qcom,ipq5332-tlmmn0 �aq} 5��Z serial0-state�gpio18gpio19 �blsp0_uart0��Z gpio-keys-default-state�gpio35�gpio��Zgpio-leds-default-state�gpio36�gpio��Zi2c-1-state�gpio29gpio30 �blsp1_i2c0��Zsdc-default-stateZ clk-pins�gpio13�sdc_clk��cmd-pins�gpio12�sdc_cmd��data-pins�gpio8gpio9gpio10gpio11 �sdc_data��clock-controller@18000002qcom,ipq5332-gccn�=�� Zhwlock@19050002qcom,tcsr-mutexn�PZsyscon@19370002qcom,tcsr-ipq5332sysconn�pZmmc@7804000%2qcom,ipq5332-sdhciqcom,sdhci-msm-v5n�@�P9<$hc_irqpwr_irq�qr UifacecorexoIokay4> q�LYhv �defaultdma-controller@78840002qcom,bam-v1.7.0n�@� !� Ubam_clk��Zserial@78af000%2qcom,msm-uartdm-v1.4qcom,msm-uartdmn�� "�  UcoreifaceIokayv �defaultserial@78b0000%2qcom,msm-uartdm-v1.4qcom,msm-uartdmn� #�  Ucoreiface��txrx Idisabledspi@78b50002qcom,spi-qup-v2.2.1n�P  $�   Ucoreiface��txrx Idisabledi2c@78b60002qcom,i2c-qup-v2.2.1n�`  %�  Ucoreiface��txrxIokayJ�v�defaultspi@78b70002qcom,spi-qup-v2.2.1n�p  &�  Ucoreiface� �txrx Idisabledusb@8af88002qcom,ipq5332-dwc3qcom,dwc3n��$>54&$pwr_eventdp_hs_phy_irqdm_hs_phy_irq����Ucoresleepmock_utmi7�� ! �  �usb-ddrapps-usb Idisabledusb@8a00000 2snps,dwc3n����Uref @ �usb2-phy�� $8Qinterrupt-controller@b0000002qcom,msm-qgic2 n    @  ��  ! �0Zv2m@02arm,gic-v2m-framen�jv2m@10002arm,gic-v2m-framen�jv2m@20002arm,gic-v2m-framen �jwatchdog@b017000$2qcom,apss-wdt-ipq5332qcom,kpss-wdtn p � ymailbox@b111000<2qcom,ipq5332-apcs-apps-globalqcom,ipq6018-apcs-apps-globaln =�  Upllxogpll0�Zclock@b1160002qcom,ipq5332-a53plln `@=� UxoZtimer@b1200002arm,armv7-timer-memn  !frame@b120000n   �frame@b123000n 0  � Idisabledframe@b124000n @  � Idisabledframe@b125000n P  � Idisabledframe@b126000n `  � Idisabledframe@b127000n p  � Idisabledframe@b128000n � � Idisabledtimer2arm,armv8-timer0aliases�/soc@0/serial@78af000chosen�serial0gpio-keys 2gpio-keysv�defaultbutton-wps�wps� � #�<leds 2gpio-ledsv�defaultled-0��wlan � $�phy0tx�off interrupt-parent#address-cells#size-cellsmodelcompatible#clock-cellsclock-frequencyphandledevice_typeregenable-methodnext-level-cacheclocksoperating-points-v2cache-levelcache-unifiedqcom,dload-modeopp-sharednvmem-cellsopp-hzopp-supported-hwclock-latency-nsinterruptsrangesno-maphwlocksresets#phy-cellsstatusbitsclock-namesgpio-controller#gpio-cellsgpio-rangesinterrupt-controller#interrupt-cellspinsfunctiondrive-strengthbias-pull-upbias-pull-downbias-disable#reset-cells#interconnect-cells#hwlock-cellsinterrupt-namesbus-widthmax-frequencymmc-ddr-1_8vmmc-hs200-1_8vnon-removablepinctrl-0pinctrl-names#dma-cellsqcom,eedmasdma-namesqcom,select-utmi-as-pipe-clkinterconnectsinterconnect-namesphy-namesphystx-fifo-resizesnps,is-utmi-l1-suspendsnps,hird-thresholdsnps,dis_u2_susphy_quirksnps,dis_u3_susphy_quirkmsi-controllertimeout-sec#mbox-cellsframe-numberserial0stdout-pathlabellinux,codegpiosdebounce-intervalcolorlinux,default-triggerdefault-state