� ���C8�l( ��4,friendlyarm,nanopi-r2c-plusrockchip,rk3328 +7FriendlyElec NanoPi R2C Plusaliases=/serial@ff110000E/serial@ff120000M/serial@ff130000U/i2c@ff150000Z/i2c@ff160000_/i2c@ff170000d/i2c@ff180000i/ethernet@ff540000s/usb@ff600000/device@2}/mmc@ff500000�/mmc@ff520000cpus+cpu@0�cpuarm,cortex-a53�����x�psci��  cpu@1�cpuarm,cortex-a53�����x�psci��  cpu@2�cpuarm,cortex-a53�����x�psci��  cpu@3�cpuarm,cortex-a53�����x�psci��  idle-statespscicpu-sleeparm,idle-state*;Rxc�s�l2-cache0cache��opp-table-0operating-points-v2�opp-408000000�Q��~���@�opp-600000000�#�F�~���@opp-816000000�0�,�B@��@opp-1008000000�<������@opp-1200000000�G����(��@opp-1296000000�M?d�� ��@analog-soundsimple-audio-card�i2s�Analog %disabledsimple-audio-card,cpu,simple-audio-card,codec,arm-pmuarm,cortex-a53-pmu06defgA display-subsystemrockchip,display-subsystemT  %disabledhdmi-soundsimple-audio-card�i2s��HDMI %disabledsimple-audio-card,cpu,simple-audio-card,codec,psciarm,psci-1.0arm,psci-0.2�smctimerarm,armv8-timer06   xin24m fixed-clockZgn6wxin24mEi2s@ff000000(rockchip,rk3328-i2srockchip,rk3066-i2s�� 6�)7�i2s_clki2s_hclk�  �txrx� %disabledi2s@ff010000(rockchip,rk3328-i2srockchip,rk3066-i2s�� 6�*8�i2s_clki2s_hclk��txrx� %disabledi2s@ff020000(rockchip,rk3328-i2srockchip,rk3066-i2s�� 6�+9�i2s_clki2s_hclk��txrx� %disabledspdif@ff030000rockchip,rk3328-spdif�� 6�.: �mclkhclk� �tx�default�� %disabledpdm@ff040000 rockchip,pdm���=R�pdm_clkpdm_hclk��rx�defaultsleep�� %disabledsyscon@ff100000&rockchip,rk3328-grfsysconsimple-mfd��:io-domains"rockchip,rk3328-io-voltage-domain%okay���+gpiorockchip,rk3328-grf-gpio9Ipower-controller!rockchip,rk3328-power-controllerU+<power-domain@6�Upower-domain@5� ��BABUpower-domain@8���FUreboot-modesyscon-reboot-modei�pRB�|RB��RB� �RB�serial@ff110000&rockchip,rk3328-uartsnps,dw-apb-uart�� 67�&��baudclkapb_pclk��txrx�default � !"�� %disabledserial@ff120000&rockchip,rk3328-uartsnps,dw-apb-uart�� 68�'��baudclkapb_pclk��txrx�default �#$%�� %disabledserial@ff130000&rockchip,rk3328-uartsnps,dw-apb-uart�� 69�(��baudclkapb_pclk��txrx�default�&��%okayi2c@ff150000(rockchip,rk3328-i2crockchip,rk3399-i2c�� 6$+�7� �i2cpclk�default�' %disabledi2c@ff160000(rockchip,rk3328-i2crockchip,rk3399-i2c�� 6%+�8� �i2cpclk�default�(%okaypmic@18rockchip,rk805� )6Zwxin32krk805-clkout29I�*�default���+�+++(+regulatorsDCDC_REG14vdd_logCWi �4� �0�regulator-state-mem��B@DCDC_REG24vdd_armCWi �4� �0�regulator-state-mem��~�DCDC_REG34vcc_ddrCWregulator-state-mem�DCDC_REG4 4vcc_io_33CWi2Z��2Z�regulator-state-mem��2Z�LDO_REG14vcc_18CWiw@�w@regulator-state-mem��w@LDO_REG2 4vcc18_emmcCWiw@�w@regulator-state-mem��w@LDO_REG34vdd_10CWiB@�B@regulator-state-mem��B@i2c@ff170000(rockchip,rk3328-i2crockchip,rk3399-i2c�� 6&+�9� �i2cpclk�default�, %disabledi2c@ff180000(rockchip,rk3328-i2crockchip,rk3399-i2c�� 6'+�:� �i2cpclk�default�- %disabledspi@ff190000(rockchip,rk3328-spirockchip,rk3066-spi�� 61+� ��spiclkapb_pclk� �txrx�default�./01 %disabledwatchdog@ff1a0000 rockchip,rk3328-wdtsnps,dw-wdt�� 6(��pwm@ff1b0000rockchip,rk3328-pwm���<� �pwmpclk�default�2� %disabledpwm@ff1b0010rockchip,rk3328-pwm���<� �pwmpclk�default�3� %disabledpwm@ff1b0020rockchip,rk3328-pwm�� �<� �pwmpclk�default�4�%okaypwm@ff1b0030rockchip,rk3328-pwm��0 62�<� �pwmpclk�default�5� %disableddma-controller@ff1f0000arm,pl330arm,primecell��@6��� �apb_pclkthermal-zonessoc-thermal%�3�E6tripstrip-point0Upa��passivetrip-point1ULa��passive7soc-critUsa� �criticalcooling-mapsmap0l70q �������� �������� �������� ���������tsadc@ff250000rockchip,rk3328-tsadc��% 6:�$��P�$��tsadcapb_pclk�initdefaultsleep�8�9�8�B �tsadc-apb�:����%okay  6efuse@ff260000rockchip,rk3328-efuse��&P+�> �pclk_efuse; id@7�cpu-leakage@17�logic-leakage@19�cpu-version@1a�OFadc@ff280000.rockchip,rk3328-saradcrockchip,rk3399-saradc��( 6PT�%��saradcapb_pclk�V �saradc-apb %disabledgpu@ff300000"rockchip,rk3328-maliarm,mali-450��0T6ZW]XY[\"fgpgpmmupppp0ppmmu0pp1ppmmu1��� �buscore�fiommu@ff330200rockchip,iommu��3 6`��� �aclkifacev %disablediommu@ff340800rockchip,iommu��4@ 6b��F �aclkifacev %disabledvideo-codec@ff350000rockchip,rk3328-vpu��5 6 fvdpu��F �aclkhclk�;�<iommu@ff350800rockchip,iommu��5@ 6 ��F �aclkifacev�<;video-codec@ff360000*rockchip,rk3328-vdecrockchip,rk3399-vdec��6� 6 ��BAB�axiahbcabaccore��AB �ׄׄ��=�<iommu@ff360480rockchip,iommu ��6�@�6�@ 6J��B �aclkifacev�<=vop@ff370000rockchip,rk3328-vop��7>� 6 ��x;�aclk_vopdclk_vophclk_vop���� �axiahbdclk�> %disabledport+ endpoint@0��?Diommu@ff373f00rockchip,iommu��7? 6 ��; �aclkifacev %disabled>hdmi@ff3c0000rockchip,rk3328-dw-hdmi��<�6#G��F�iahbisfrcec�@�hdmi�default �ABC�:� %disabledports+port@0�endpoint�D?port@1�codec@ff410000rockchip,rk3328-codec��A��* �pclkmclk�:� %disabledphy@ff430000rockchip,rk3328-hdmi-phy��C 6S��Ey�sysclkrefoclkrefpclk whdmi_phyZ�F �cpu-version� %disabled@clock-controller@ff440000(rockchip,rk3328-crurockchip,crusyscon��D�:Z���x=&'(��������ABDC"\5�H��4�$�zEEE|���n6n6n6�����������������������������������n6#�FLG���рxh�xh��рxh�xh��syscon@ff450000.rockchip,rk3328-usb2phy-grfsysconsimple-mfd��E+usb2phy@100rockchip,rk3328-usb2phy��E�phyclk wusb480m_phyZ�{�G%okayGotg-port�$6;<=fotg-bvalidotg-idlinestate%okayWhost-port� 6> flinestate%okayXmmc@ff5000000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshc��P@ 6  �=!JN�biuciuciu-driveciu-sample�р%okay&7�HIJK�defaultBO\iwL�mmc@ff5100000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshc��Q@ 6  �>"KO�biuciuciu-driveciu-sample�р %disabledmmc@ff5200000rockchip,rk3328-dw-mshcrockchip,rk3288-dw-mshc��R@ 6 �?#LP�biuciuciu-driveciu-sample�р%okay�����default �MNOw�ethernet@ff540000rockchip,rk3328-gmac��T 6fmacirq8�dWXZY��M�stmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_mac�c �stmmaceth�:�%okay�df�PP�input�Q�rgmii��R�default "mdiosnps,dwmac-mdio+ethernet-phy@3ethernet-phy-ieee802.3-c22�sY@=X�S�defaultv'��P �)Qethernet@ff550000rockchip,rk3328-gmac��U�: 6fmacirq8�TSSU��VI�stmmacethmac_clk_rxmac_clk_txclk_mac_refaclk_macpclk_macclk_macphy�b �stmmaceth�rmii�T��output %disabledmdiosnps,dwmac-mdio+ethernet-phy@04ethernet-phy-id1234.d400ethernet-phy-ieee802.3-c22��V�d�default�UV�Tusb@ff5800002rockchip,rk3328-usbrockchip,rk3066-usbsnps,dwc2��X 6�M�otg�host�����@ �W �usb2-phy%okayusb@ff5c0000 generic-ehci��\ 6 �NG�X�usb%okayusb@ff5d0000 generic-ohci��] 6 �NG�X�usb%okayusb@ff600000rockchip,rk3328-dwc3snps,dwc3��` 6C�`a��ref_clksuspend_clkbus_clk�host �utmi_wide�  0 R s �%okay+device@2 usbbda,8153�interrupt-controller@ff811000 arm,gic-400 � �@����� ��@ ��`  6 crypto@ff060000rockchip,rk3328-crypto��@ 6�PQ;�hclk_masterhclk_slavesclk�D �crypto-rstpinctrlrockchip,rk3328-pinctrl�:+ �gpio@ff210000rockchip,gpio-bank��! 63��9I � �egpio@ff220000rockchip,gpio-bank��" 64��9I � �)gpio@ff230000rockchip,gpio-bank��# 65��9I � �igpio@ff240000rockchip,gpio-bank��$ 66��9I � �pcfg-pull-up �[pcfg-pull-down �cpcfg-pull-none �Ypcfg-pull-none-2ma � �bpcfg-pull-up-2ma � �pcfg-pull-up-4ma � �\pcfg-pull-none-4ma � �_pcfg-pull-down-4ma � �pcfg-pull-none-8ma � �]pcfg-pull-up-8ma � �^pcfg-pull-none-12ma � � `pcfg-pull-up-12ma � � apcfg-output-high pcfg-output-low pcfg-input-high � !Zpcfg-input !i2c0i2c0-xfer .YY'i2c1i2c1-xfer .YY(i2c2i2c2-xfer . YY,i2c3i2c3-xfer .YY-i2c3-pins .YYhdmi_i2chdmii2c-xfer .YYBpdm-0pdmm0-clk .Ypdmm0-fsync .Ypdmm0-sdi0 .Ypdmm0-sdi1 .Ypdmm0-sdi2 .Ypdmm0-sdi3 .Ypdmm0-clk-sleep .Zpdmm0-sdi0-sleep .Zpdmm0-sdi1-sleep .Zpdmm0-sdi2-sleep .Zpdmm0-sdi3-sleep .Zpdmm0-fsync-sleep .Ztsadcotp-pin . Y8otp-out . Y9uart0uart0-xfer . Y[ uart0-cts . Y!uart0-rts . Y"uart0-rts-pin . Yuart1uart1-xfer .Y[#uart1-cts .Y$uart1-rts .Y%uart1-rts-pin .Yuart2-0uart2m0-xfer .Y[uart2-1uart2m1-xfer .Y[&spi0-0spi0m0-clk .[spi0m0-cs0 . [spi0m0-tx . [spi0m0-rx . [spi0m0-cs1 . [spi0-1spi0m1-clk .[spi0m1-cs0 .[spi0m1-tx .[spi0m1-rx .[spi0m1-cs1 .[spi0-2spi0m2-clk .[.spi0m2-cs0 .[1spi0m2-tx .[/spi0m2-rx .[0i2s1i2s1-mclk .Yi2s1-sclk .Yi2s1-lrckrx .Yi2s1-lrcktx .Yi2s1-sdi .Yi2s1-sdo .Yi2s1-sdio1 .Yi2s1-sdio2 .Yi2s1-sdio3 .Yi2s1-sleep� .ZZZZZZZZZi2s2-0i2s2m0-mclk .Yi2s2m0-sclk .Yi2s2m0-lrckrx .Yi2s2m0-lrcktx .Yi2s2m0-sdi .Yi2s2m0-sdo .Yi2s2m0-sleep` .ZZZZZZi2s2-1i2s2m1-mclk .Yi2s2m1-sclk .Yi2sm1-lrckrx .Yi2s2m1-lrcktx .Yi2s2m1-sdi .Yi2s2m1-sdo .Yi2s2m1-sleepP .ZZZZZspdif-0spdifm0-tx .Yspdif-1spdifm1-tx .Yspdif-2spdifm2-tx .Ysdmmc0-0sdmmc0m0-pwren .\sdmmc0m0-pin .\sdmmc0-1sdmmc0m1-pwren .\sdmmc0m1-pin .\ksdmmc0sdmmc0-clk .]Hsdmmc0-cmd .^Isdmmc0-dectn .\Jsdmmc0-wrprt .\sdmmc0-bus1 .^sdmmc0-bus4@ .^^^^Ksdmmc0-pins� .\\\\\\\\sdmmc0extsdmmc0ext-clk ._sdmmc0ext-cmd .\sdmmc0ext-wrprt .\sdmmc0ext-dectn .\sdmmc0ext-bus1 .\sdmmc0ext-bus4@ .\\\\sdmmc0ext-pins� .\\\\\\\\sdmmc1sdmmc1-clk . ]sdmmc1-cmd . ^sdmmc1-pwren .^sdmmc1-wrprt .^sdmmc1-dectn .^sdmmc1-bus1 .^sdmmc1-bus4@ .^^^^sdmmc1-pins� . \ \\\\\\\\emmcemmc-clk .`Memmc-cmd .aNemmc-pwren .Yemmc-rstnout .Yemmc-bus1 .aemmc-bus4@ .aaaaemmc-bus8� .aaaaaaaaOpwm0pwm0-pin .Y2pwm1pwm1-pin .Y3pwm2pwm2-pin .Y4pwmirpwmir-pin .Y5gmac-1rgmiim1-pins` . ] __]___ _ _] ]__]]] ]_]]]]Rrmiim1-pins .b`bbbb b b` ` Y YYYYYgmac2phyfephyled-speed10 .Yfephyled-duplex .Yfephyled-rxm1 .YUfephyled-txm1 .Yfephyled-linkm1 .YVtsadc_pintsadc-int . Ytsadc-pin . Yhdmi_pinhdmi-cec .YAhdmi-hpd .cCcif-0dvp-d2d9-m0� .YYYYY Y Y YYYYYcif-1dvp-d2d9-m1� .YYYYYYYYYYYYbuttonreset-button-pin .Ydgmac2ioeth-phy-reset-pin .cSledslan-led-pin .Yfsys-led-pin .Ygwan-led-pin .Yhlanlan-vdd-pin .Ylpmicpmic-int-l .[*sdsdio-vcc-pin .[jchosen