Ð þíEê8Aì(þA´,MangoPi MQ-R-T113/2widora,mangopi-mq-r-t113allwinner,sun8i-t113sdcxo-clk 2fixed-clock=dcxoP]n6mdisplay-engine#2allwinner,sun20i-d1-display-engineu ‰disabledsoc 2simple-bus—pinctrl@20000002allwinner,sun20i-d1-pinctrl§H«EGIKMO¶½apbhoscloscÉÙîú '5Cmcan0-pinsQPB2PB3Vcan0m can1-pinsQPB4PB5Vcan1m mmc0-pinsQPF0PF1PF2PF3PF4PF5Vmmc0m mmc1-pinsQPG0PG1PG2PG3PG4PG5Vmmc1muart3-pb-pinsQPB6PB7Vuart3m clock-controller@20010002allwinner,sun20i-d1-ccu§¶½hoscloscioscP_madc@20090002allwinner,sun20i-d1-gpadc§¶Pl  «9 ‰disabledsdmic@203100022allwinner,sun20i-d1-dmicallwinner,sun50i-h6-dmic§ «¶]\½busmodl&… Šrx ‰disabled”i2s@203300022allwinner,sun20i-d1-i2sallwinner,sun50i-r329-i2s§0 «¶WS½apbmodl#…  Šrxtx ‰disabled”i2s@203400022allwinner,sun20i-d1-i2sallwinner,sun50i-r329-i2s§@ «¶XT½apbmodl$…  Šrxtx ‰disabled”timer@205000042allwinner,sun20i-d1-timerallwinner,sun8i-a23-timer§ «;<¶watchdog@20500a062allwinner,sun20i-d1-wdt-resetallwinner,sun20i-d1-wdt§   «? ¶ ½hosclosc ‰reservedserial@25000002snps,dw-apb-uart§P¥² «¶>l…  Štxrx ‰disabledserial@25004002snps,dw-apb-uart§P¥² «¶?l…  Štxrx ‰disabledserial@25008002snps,dw-apb-uart§P¥² «¶@l…  Štxrx ‰disabledserial@2500c002snps,dw-apb-uart§P ¥² «¶Al…  Štxrx‰okay¼defaultÊ serial@25010002snps,dw-apb-uart§P¥² «¶Bl…  Štxrx ‰disabledserial@25014002snps,dw-apb-uart§P¥² «¶Cl…  Štxrx ‰disabledi2c@2502000I2allwinner,sun20i-d1-i2callwinner,sun8i-v536-i2callwinner,sun6i-a31-i2c§P  « ¶Dl… + +Šrxtx ‰disabledi2c@2502400I2allwinner,sun20i-d1-i2callwinner,sun8i-v536-i2callwinner,sun6i-a31-i2c§P$ « ¶El… , ,Šrxtx ‰disabledi2c@2502800I2allwinner,sun20i-d1-i2callwinner,sun8i-v536-i2callwinner,sun6i-a31-i2c§P( « ¶Fl… - -Šrxtx ‰disabledi2c@2502c00I2allwinner,sun20i-d1-i2callwinner,sun8i-v536-i2callwinner,sun6i-a31-i2c§P, « ¶Gl… . .Šrxtx ‰disabledcan@25040002allwinner,sun20i-d1-can§P@ «¶‘lB¼defaultÊ  ‰disabledcan@25044002allwinner,sun20i-d1-can§PD «¶’lC¼defaultÊ  ‰disabledsyscon@3000000#2allwinner,sun20i-d1-system-control§mregulators@3000150 2allwinner,sun20i-d1-system-ldos§Pldoaldobdma-controller@30020002allwinner,sun20i-d1-dma§  «2¶%0 ½busmbuslÔá0îm efuse@30060002allwinner,sun20i-d1-sid§`crypto@30400002allwinner,sun20i-d1-crypto§ «4 ¶"!2½busmodramtrngldram-controller@31020002allwinner,sun20i-d1-mbus§ 0 ùmbusdram «+¶/7½mbusdrambus @€mmc@40200002allwinner,sun20i-d1-mmc§ «(¶;8½ahbmmcl"ahb.?ðÑ€M‰okayÊ ¼defaultT`itmmc@40210002allwinner,sun20i-d1-mmc§ «)¶<9½ahbmmcl"ahb.?ðÑ€M‰okayʼdefaultT~tŒwifi@1§ «  —host-wakemmc@402200042allwinner,sun20i-d1-emmcallwinner,sun50i-a100-emmc§  «*¶=:½ahbmmcl"ahb§?ðÑ€¹ÆÓÙ ‰disabledspi@402500022allwinner,sun20i-d1-spiallwinner,sun50i-r329-spi§P «¶JH½ahbmod…  Šrxtxl ‰disabledspi@4026000T2allwinner,sun20i-d1-spi-dbiallwinner,sun50i-r329-spi-dbiallwinner,sun50i-r329-spi§` «¶KI½ahbmod…  Šrxtxl ‰disabledusb@410000022allwinner,sun20i-d1-musballwinner,sun8i-a33-musb§ «—mc¶gl.áèíusb‰okay ÷peripheralphy@41004002allwinner,sun20i-d1-usb-phy§ ùphy_ctrlpmu0pmu1¶½usb0_phyusb1_phyl()"usb0_resetusb1_reset‰okayÿ musb@4101000&2allwinner,sun20i-d1-ehcigeneric-ehci§ «¶ceal*,èíusb ‰disabledusb@4101400&2allwinner,sun20i-d1-ohcigeneric-ohci§ «¶cal*èíusb ‰disabledusb@4200000&2allwinner,sun20i-d1-ehcigeneric-ehci§  «!¶dfbl+-èíusb‰okayusb@4200400&2allwinner,sun20i-d1-ohcigeneric-ohci§  «"¶dbl+èíusb‰okayethernet@450000032allwinner,sun20i-d1-emacallwinner,sun50i-a64-emac§P «.—macirq¶M ½stmmacethl "stmmaceth ‰disabledmdio2snps,dwmac-mdioclock-controller@500000082allwinner,sun20i-d1-de2-clkallwinner,sun50i-h5-de2-clk§¶½busmodlP_mmixer@5100000 2allwinner,sun20i-d1-de2-mixer-0§¶½busmodlmportsport@1§endpoint"mmixer@5200000 2allwinner,sun20i-d1-de2-mixer-1§ ¶½busmodlmportsport@1§endpoint"mdsi@5450000<2allwinner,sun20i-d1-mipi-dsiallwinner,sun50i-a100-mipi-dsi§E «\¶o½busmodl3èídphy ‰disabledportendpoint"m#phy@5451000>2allwinner,sun20i-d1-mipi-dphyallwinner,sun50i-a100-mipi-dphy§E «\¶on½busmodl3ÿmtcon-top@54600002allwinner,sun20i-d1-tcon-top§F ¶irtp½bustcon-tv0tve0dsi=tcon-top-tv0tcon-top-dsil0Pmportsport@0§endpoint"mport@1§endpoint@0§"m!endpoint@2§"m$port@2§endpoint@1§"mport@3§endpoint@0§"m"endpoint@2§"m%port@4§endpoint" m&port@5§lcd-controller@54610002allwinner,sun20i-d1-tcon-lcd§F «Z¶qp ½ahbtcon-ch0=tcon-pixel-clockl46 "lcdlvdsPportsport@0§endpoint@0§"!mendpoint@1§""mport@1§endpoint@1§"#mlcd-controller@54700002allwinner,sun20i-d1-tcon-tv§G «[¶s ½ahbtcon-ch1l5"lcdportsport@0§endpoint@0§"$mendpoint@1§"%mport@1§endpoint"&m power-controller@70010002allwinner,sun20i-d1-ppu§¶'l'2clock-controller@70100002allwinner,sun20i-d1-r-ccu§¶½hoscloscioscpll-periphP_m'rtc@709000022allwinner,sun20i-d1-rtcallwinner,sun50i-r329-rtc§  «¶'' ½bushoscahbPmwatchdog@17004002allwinner,sun20i-d1-wdt§p  «z ¶ ½hosclosc ‰reservedcpuscpu@02arm,cortex-a7Fcpu§¶½cpuR(m)cpu@12arm,cortex-a7Fcpu§¶½cpuR(m*interrupt-controller@1c81000 2arm,gic-400 § @ `  « Ùúmtimer2arm,armv7-timer0«   pmu2arm,cortex-a7-pmu«¬­])*aliasesp/soc/serial@2500c00x/soc/mmc@4021000/wifi@1chosen‚serial3:115200n8leds 2gpio-ledsled-0ŽVstatuscregulator-5v2regulator-fixed”vcc-5v£LK@»LK@Ómregulator-3v32regulator-fixed”vcc-3v3£2Z »2Z çmregulator-core2regulator-fixed ”vcc-core£ m€» m€çm(regulator-avdd2regulator-fixed”avdd2v8£*¹€»*¹€çmwifi-pwrseq2mmc-pwrseq-simpleò m #address-cells#size-cellsinterrupt-parentmodelcompatibleclock-output-names#clock-cellsclock-frequencyphandleallwinner,pipelinesstatusrangesdma-noncoherentreginterruptsclocksclock-namesgpio-controllerinterrupt-controller#gpio-cells#interrupt-cellsvcc-pb-supplyvcc-pd-supplyvcc-pe-supplyvcc-pf-supplyvcc-pg-supplypinsfunction#reset-cellsresets#io-channel-cellsdmasdma-names#sound-dai-cellsreg-io-widthreg-shiftpinctrl-namespinctrl-0dma-channelsdma-requests#dma-cellsreg-namesdma-ranges#interconnect-cellsreset-namescap-sd-highspeedmax-frequencyno-mmcvmmc-supplycd-gpiosdisable-wpbus-widthnon-removablemmc-pwrseqinterrupt-namescap-mmc-highspeedmmc-ddr-1_8vmmc-ddr-3_3vno-sdno-sdioextconphysphy-namesdr_mode#phy-cellsusb1_vbus-supplysysconremote-endpoint#power-domain-cellsdevice_typecpu-supplyinterrupt-affinityserial3ethernet0stdout-pathcolorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onvin-supplyreset-gpios