8(6STMicroelectronics STM32MP157C-ED1 SCMI eval daughter&!st,stm32mp157c-ed1-scmist,stm32mp157cpuscpu@0!arm,cortex-a7,&6Ssyscon@50020000!st,stm32mp157-syscfgsysconHPL3Sthermal@50028000!st,stm32-thermalHP [L5pclk#okaySdma-controller@58000000!st,stm32h7-mdmaHX [zLd ' 40S.mmc@58005000(!st,stm32-sdmmc2arm,pl18xarm,primecellA%1HXP [1Lv apb_pclk Xi{'#okaydefaultopendrainsleep   )6mmc@58007000(!st,stm32-sdmmc2arm,pl18xarm,primecellA%1HXp [|Lw apb_pclk Xi{'#okaydefaultopendrainsleepCQW _crc@58009000!st,stm32f7-crcHXLn#okayusb@5800c000 !generic-ohciHX Lo  [Jlqusb #disabledSusb@5800d000 !generic-ehciHX Lo  [K{lqusb #disableddisplay-controller@5a001000!st,stm32-ltdcHZ[XYLlcd  #disabledwatchdog@5a002000!st,stm32mp1-iwdgHZ L: pclklsi#okay usbphyc@5a006000z!st,stm32mp1-usbphycHZ`L  #disabledSusb-phy@0H Susb-phy@1H rtc@5c004000!st,stm32mp1-rtcH\@L pclkrtc_ck H#okayefuse@5c005000!st,stm32mp15-bsecH\Ppart-number-otp@4Hvrefin-cal@52HRS+calib@5cH\calib@5eH^bus@5c007000!st,stm32-etzpcsimple-busH\p*S timer@40000000!st,stm32-timersH@ [\globalLintPch1ch2ch3ch4up  #disabledpwm !st,stm32-pwm #disabledtimer@1!st,stm32h7-timer-triggerH #disabledcounter!st,stm32-timer-counter #disabledtimer@40001000!st,stm32-timersH@ [\globalLint`ch1ch2ch3ch4uptrig  #disabledpwm !st,stm32-pwm #disabledtimer@2!st,stm32h7-timer-triggerH #disabledcounter!st,stm32-timer-counter #disabledtimer@40002000!st,stm32-timersH@  [\globalLint@ ch1ch2ch3ch4  #disabledpwm !st,stm32-pwm #disabledtimer@3!st,stm32h7-timer-triggerH #disabledcounter!st,stm32-timer-counter #disabledtimer@40003000!st,stm32-timersH@0 [2\globalLint`789:;<ch1ch2ch3ch4uptrig  #disabledpwm !st,stm32-pwm #disabledtimer@4!st,stm32h7-timer-triggerH #disabledcounter!st,stm32-timer-counter #disabledtimer@40004000!st,stm32-timersH@@ [6\globalLint #okaytimer@5!st,stm32h7-timer-triggerH#okaytimer@40005000!st,stm32-timersH@P [7\globalLintFup  #disabledtimer@6!st,stm32h7-timer-triggerH #disabledtimer@40006000!st,stm32-timersH@` [w\globalLint  #disabledpwm !st,stm32-pwm #disabledtimer@11!st,stm32h7-timer-triggerH  #disabledtimer@40007000!st,stm32-timersH@p [\globalLint  #disabledpwm !st,stm32-pwm #disabledtimer@12!st,stm32h7-timer-triggerH  #disabledtimer@40008000!st,stm32-timersH@ [\globalLint  #disabledpwm !st,stm32-pwm #disabledtimer@13!st,stm32h7-timer-triggerH  #disabledtimer@40009000!st,stm32-lptimerH@ H/Lmuxl  #disabledpwm!st,stm32-pwm-lp #disabledtrigger@0!st,stm32-lptimer-triggerH #disabledcounter!st,stm32-lptimer-counter #disabledaudio-controller@4000b000!st,stm32h7-i2s H@ [$ '(rxtx  #disabledspi@4000b000!st,stm32h7-spiH@ [$LL  '(rxtx  #disabledaudio-controller@4000c000!st,stm32h7-i2s H@ [3 =>rxtx  #disabledspi@4000c000!st,stm32h7-spiH@ [3LL  =>rxtx  #disabledaudio-controller@4000d000!st,stm32h7-spdifrx H@Lkclk [a ]^ rxrx-ctrl  #disabledserial@4000e000!st,stm32h7-uartH@ HLl +,rxtx  #disabledserial@4000f000!st,stm32h7-uartH@ HLl -.rxtx  #disabledserial@40010000!st,stm32h7-uartH@ HLl #okaydefaultsleepidle!"#serial@40011000!st,stm32h7-uartH@ HLl ABrxtx ! #disabledi2c@40012000!st,stm32mp15-i2cH@  \eventerror[ LL l* " #disabledi2c@40013000!st,stm32mp15-i2cH@0 \eventerror[!"LL l* # #disabledi2c@40014000!st,stm32mp15-i2cH@@ \eventerror[HILL l* $ #disabledi2c@40015000!st,stm32mp15-i2cH@P \eventerror[klLL l* % #disabledcec@40016000 !st,stm32-cecH@` [^L cechdmi-cec & #disableddac@40017000!st,stm32h7-dac-coreH@pLpclk ' #disableddefault$%<&dac@1 !st,stm32-dacHH#okaydac@2 !st,stm32-dacHH#okayserial@40018000!st,stm32h7-uartH@ H Ll OPrxtx ( #disabledserial@40019000!st,stm32h7-uartH@ H!Ll QRrxtx ) #disabledtimer@44000000!st,stm32-timersHD0[\brkuptrg-comccLintp   ch1ch2ch3ch4uptrigcom 0 #disabledpwm !st,stm32-pwm #disabledtimer@0!st,stm32h7-timer-triggerH #disabledcounter!st,stm32-timer-counter #disabledtimer@44001000!st,stm32-timersHD0[+,-.\brkuptrg-comccLintp/012345ch1ch2ch3ch4uptrigcom 1 #disabledpwm !st,stm32-pwm #disabledtimer@7!st,stm32h7-timer-triggerH #disabledcounter!st,stm32-timer-counter #disabledserial@44003000!st,stm32h7-uartHD0 HLl GHrxtx 3 #disabledaudio-controller@44004000!st,stm32h7-i2s HD@ [# %&rxtx 4 #disabledspi@44004000!st,stm32h7-spiHD@ [#LLH %&rxtx 4 #disabledspi@44005000!st,stm32h7-spiHDP [TLLI STrxtx 5 #disabledtimer@44006000!st,stm32-timersHD` [t\globalLint@ijklch1uptrigcom 6 #disabledpwm !st,stm32-pwm #disabledtimer@14!st,stm32h7-timer-triggerH #disabledtimer@44007000!st,stm32-timersHDp [u\globalLint mnch1up 7 #disabledpwm !st,stm32-pwm #disabledtimer@15!st,stm32h7-timer-triggerH #disabledtimer@44008000!st,stm32-timersHD [v\globalLint opch1up 8 #disabledpwm !st,stm32-pwm #disabledtimer@16!st,stm32h7-timer-triggerH #disabledspi@44009000!st,stm32h7-spiHD [ULLJ UVrxtx 9 #disabledsai@4400a000!st,stm32h7-sai *DHDD [WLP : #disabledaudio-controller@4400a004 !st,stm32-sai-sub-aH Lsai_ckW #disabledaudio-controller@4400a024 !st,stm32-sai-sub-bH$ Lsai_ckX #disabledsai@4400b000!st,stm32h7-sai *DHDD [[LQ ; #disabledaudio-controller@4400b004 !st,stm32-sai-sub-aH Lsai_ckY #disabledaudio-controller@4400b024 !st,stm32-sai-sub-bH$ Lsai_ckZ #disabledsai@4400c000!st,stm32h7-sai *DHDD [rLR < #disabledaudio-controller@4400c004 !st,stm32-sai-sub-aH Lsai_ckq #disabledaudio-controller@4400c024 !st,stm32-sai-sub-bH$ Lsai_ckr #disableddfsdm@4400d000!st,stm32mp1-dfsdmHDLdfsdm = #disabledfilter@0!st,stm32-dfsdm-adcHH [nerx #disabledfilter@1!st,stm32-dfsdm-adcHH [ofrx #disabledfilter@2!st,stm32-dfsdm-adcHH [pgrx #disabledfilter@3!st,stm32-dfsdm-adcHH [qhrx #disabledfilter@4!st,stm32-dfsdm-adcHH [s[rx #disabledfilter@5!st,stm32-dfsdm-adcHH [~\rx #disableddma-controller@48000000 !st,stm32-dmaHH`[   /LGLZ4 XS'dma-controller@48001000 !st,stm32-dmaHH`[89:;<DEFLHLZ4 YS(dma-router@48002000!st,stm32h7-dmamuxHH @4e'('LIL ZSadc@48003000!st,stm32mp1-adc-coreHH0[ZLJbusadc H #disabled)default q&<&S*adc@0!st,stm32mp1-adcHHy*[ rx#okaychannel@0H}channel@1H}channel@6H}adc@100!st,stm32mp1-adcHHy*[ rx+vrefint #disabledchannel@13H vrefintchannel@14Hvddcoremmc@48004000(!st,stm32-sdmmc2arm,pl18xarm,primecellA%1HH@ [Lx apb_pclkLXi{' V #disabledusb-otg@49000000!st,stm32mp15-hsotgsnps,dwc2HI L otgutmiLdwc2 [b  otg, U #disabled-dcmi@4c006000!st,stm32-dcmiHL` [NMLMmclkKtx F #disabledtimer@50021000!st,stm32-lptimerHP H0Lmuxl @ #disabledpwm!st,stm32-pwm-lp #disabledtrigger@1!st,stm32-lptimer-triggerH #disabledcounter!st,stm32-lptimer-counter #disabledtimer@50022000!st,stm32-lptimerHP  H2Lmuxl A #disabledpwm!st,stm32-pwm-lp #disabledtrigger@2!st,stm32-lptimer-triggerH #disabledtimer@50023000!st,stm32-lptimerHP0 H4Lmuxl B #disabledpwm!st,stm32-pwm-lp #disabledtimer@50024000!st,stm32-lptimerHP@ H5Lmuxl C #disabledpwm!st,stm32-pwm-lp #disabledvrefbuf@50025000!st,stm32-vrefbufHPP`&%L4 E #disabledsai@50027000!st,stm32h7-sai *PpHPpPs [L D #disabledaudio-controller@50027004 !st,stm32-sai-sub-aH Lsai_ckc #disabledaudio-controller@50027024 !st,stm32-sai-sub-bH$ Lsai_ckd #disabledhash@54002000!st,stm32f756-hashHT  [PL  . in #okayrng@54003000 !st,stm32-rngHT0L  #okaymemory-controller@58002000!st,stm32mp1-fmc2-ebiHX Ly  [ #disabledP*`dhlnand-controller@4,0!st,stm32mp1-fmc2-nfcHH   [0H. . .  txrxecc #disabledspi@58003000!st,stm32f469-qspiHX0p )qspiqspi_mm [\0..txrxLz  \ #disabledethernet@5800a000#!st,stm32mp1-dwmacsnps,dwmac-4.20aHX  )stmmacethH=\macirq6stmmacethmac-clk-txmac-clk-rxeth-ckptp_refethstp0Ligh{p3=NWr/ ^ #disabledstmmac-axi-configS/serial@5c000000!st,stm32h7-uartH\ HLl  #disabledspi@5c001000!st,stm32h7-spiH\ [VL @0.".# rxtx #disabledi2c@5c002000!st,stm32mp15-i2cH\  \eventerror[_`L   l* #okaydefaultsleep01,stpmic@33 !st,stpmic1H3 H2#okayregulators!st,stpmic1-regulators333 3$04<3HT`3p3}55buck1vddcoreOpbuck2vdd_ddrppS4buck3vdd2Z2ZS buck4v3v32Z2ZSldo1vdda,@ ,@ [S&ldo2v2v8**[ldo3vtt_ddr  qldo4vdd_usb[S ldo5vdd_sd,@ ,@ [Sldo6v1v8w@w@[vref_ddr vref_ddrboostbst_out[S5pwr_sw1 vbus_otg[ S-pwr_sw2vbus_sw[ onkey!st,stpmic1-onkey[\onkey-fallingonkey-rising# #okaywatchdog!st,stpmic1-wdt #disabledi2c@5c009000!st,stm32mp15-i2cH\ \eventerror[L C  l*  #disabledcan@4400e000 !bosch,m_canHDD)m_canmessage_ram[ \int0int1L hclkcclk 6  > #disabledcan@4400f000 !bosch,m_canHDD()m_canmessage_ram[ \int0int1L hclkcclk 6  > #disabledcryp@54001000!st,stm32mp1-crypHT [OL   #okaytamp@5c00a000 !st,stm32-tampsysconsimple-mfdH\S:pinctrl@50002000!st,stm32mp157-pinctrl *P y `ES6gpio@50002000P`HLTlGPIOA#okayy6S2gpio@50003000P`HLUlGPIOB#okayy6gpio@50004000P`H LVlGPIOC#okayy6 gpio@50005000P`H0LWlGPIOD#okayy60SBgpio@50006000P`H@LXlGPIOE#okayy6@gpio@50007000P`HPLYlGPIOF#okayy6PSCgpio@50008000P`H`LZlGPIOG#okayy6`Sgpio@50009000P`HpL[lGPIOH#okayy6pgpio@5000a000P`HL\lGPIOI#okayy6gpio@5000b000P`HL]lGPIOJ#okayy6gpio@5000c000P`HL^lGPIOK#okayy6adc1-in6-0S)pins\dac-ch1-0S$pinsdac-ch2-0S%pinssdmmc1-b4-0S pins1( ) * + 2 pins2, sdmmc1-b4-od-0Spins1( ) * + pins2, pins32 sdmmc1-b4-sleep-0Spins()*+,2sdmmc1-dir-0S pins1 R '  pins2D sdmmc1-dir-sleep-0SpinsR'Dsdmmc2-b4-0Spins1    f pins2C sdmmc2-b4-od-0Spins1    pins2C pins3f sdmmc2-b4-sleep-0SpinsCfsdmmc2-d47-0Spins E 3 sdmmc2-d47-sleep-0Spins E3uart4-0S!pins1kpins2 uart4-idle-0S#pins1kpins2 uart4-sleep-0S"pinskpinctrl@54004000!st,stm32mp157-z-pinctrl *T@y `ES7gpio@54004000P`HL lGPIOZ #okayy7i2c4-0S0pinsi2c4-sleep-0S1pinsgpu@59000000 !vivante,gcHY [mLe~ buscore dsi@5a000000 !st,stm32-dsiHZL9pclkrefpx_clk8 apb #disabledportsport@0Hendpointport@1Hendpointahb!st,mlahbsimple-bus*$800m4@10000000!st,stm32mp1-m4H08 mcu_rsthold_boot 9 :D ":H#okay5;<=>?@ CAAAAJvq0vq1shutdowndetachy[Daliases"U/soc/bus@5c007000/serial@40010000chosen]serial0:115200n8memory@c0000000vdev0vring1@10041000!shared-dma-poolHiS?vdev0buffer@10042000!shared-dma-poolH @iS@mcuram@30000000!shared-dma-poolH0iS<retram@38000000!shared-dma-poolH8iS;optee@fe000000Hiled !gpio-ledsled-blue B  pheartbeatoff heartbeatregulator-sd_switch!regulator-gpio sd_switchw@,@ voltage Cw@,@ Svin!regulator-fixedvinLK@LK@S3firmwareoptee!linaro,optee-tzsmcy [scmi!linaro,scmi-opteeprotocol@14HzSprotocol@16HS protocol@17Hregulatorsregulator@0Hreg11Sregulator@1Hreg18w@w@Sregulator@2Husb332Z2ZS, #address-cells#size-cellsmodelcompatibleclock-frequencydevice_typeregclocksphandleinterruptsinterrupt-affinityinterrupt-parentmethod#interrupt-cellsinterrupt-controllerarm,no-tick-in-suspendpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisst,syscfgstatusranges#mbox-cellsst,proc-idinterrupts-extendedinterrupt-nameswakeup-source#clock-cells#reset-cellsclock-namesvdd-supplyvdd_3v3_usbfs-supplyregulator-nameregulator-min-microvoltregulator-max-microvolt#thermal-sensor-cellsresets#dma-cellsdma-channelsdma-requestsarm,primecell-periphidcap-sd-highspeedcap-mmc-highspeedmax-frequencypinctrl-namespinctrl-0pinctrl-1pinctrl-2cd-gpiosdisable-wpst,sig-dirst,neg-edgest,use-ckinbus-widthvmmc-supplyvqmmc-supplysd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-ddr50non-removableno-sdno-sdiommc-ddr-3_3vphysphy-namescompaniontimeout-secvdda1v1-supplyvdda1v8-supply#phy-cellsphy-supply#access-controller-cellsdmasdma-namesaccess-controllers#pwm-cells#sound-dai-cellsst,syscfg-fmpi2c-analog-filtervref-supply#io-channel-cellsst,mem2memdma-mastersvdda-supplyst,min-sample-time-nsnvmem-cellsnvmem-cell-nameslabelreset-namesg-rx-fifo-sizeg-np-tx-fifo-sizeg-tx-fifo-sizedr_modeotg-revusb33d-supplyvbus-supplydma-maxburstreg-namesst,sysconsnps,mixed-burstsnps,pblsnps,en-tx-lpi-clockgatingsnps,axi-configsnps,tsosnps,wr_osr_lmtsnps,rd_osr_lmtsnps,bleni2c-scl-rising-time-nsi2c-scl-falling-time-nsbuck1-supplybuck2-supplybuck3-supplybuck4-supplyldo1-supplyldo2-supplyldo3-supplyldo4-supplyldo5-supplyldo6-supplyvref_ddr-supplyboost-supplypwr_sw1-supplypwr_sw2-supplyregulator-always-onregulator-initial-moderegulator-over-current-protectionst,mask-resetregulator-boot-onregulator-active-dischargepower-off-time-secbosch,mram-cfgst,packagegpio-controller#gpio-cellsst,bank-namengpiosgpio-rangespinmuxslew-ratedrive-push-pullbias-disabledrive-open-drainbias-pull-upst,bank-ioportphy-dsi-supplydma-rangesst,syscfg-pddsst,syscfg-rsc-tblst,syscfg-m4-statememory-regionmboxesmbox-namesserial0stdout-pathno-maplinux,default-triggerdefault-statefunctioncolorregulator-typegpios-stateslinaro,optee-channel-id