M18Ix(I@*STMicroelectronics STM32F469i-DISCO board!!st,stm32f469i-discost,stm32f469interrupt-controller@e000e100!arm,armv7m-nvic,AR Vtimer@e000e010!arm,armv7m-systickR^okay esoc !simple-busl} efuse@1fff7800!st,stm32f4-otpRxcalib@22cR,calib@22eR.timers@40000000!st,stm32-timersR@ eint ^disabledpwm !st,stm32-pwm ^disabledtimer@1!st,stm32-timer-triggerR ^disabledtimers@40000400!st,stm32-timersR@ eint^okaypwm !st,stm32-pwm^okaydefaulttimer@2!st,stm32-timer-triggerR^okaytimers@40000800!st,stm32-timersR@ eint ^disabledpwm !st,stm32-pwm ^disabledtimer@3!st,stm32-timer-triggerR ^disabledtimers@40000c00!st,stm32-timerR@  e^okay2timers@40001000!st,stm32-timersR@ eint ^disabledtimer@5!st,stm32-timer-triggerR ^disabledtimers@40001400!st,stm32-timersR@ eint ^disabledtimer@6!st,stm32-timer-triggerR ^disabledtimers@40001800!st,stm32-timersR@ eint ^disabledpwm !st,stm32-pwm ^disabledtimer@11!st,stm32-timer-triggerR  ^disabledtimers@40001c00!st,stm32-timersR@ eint ^disabledpwm !st,stm32-pwm ^disabledtimers@40002000!st,stm32-timersR@  eint ^disabledpwm !st,stm32-pwm ^disabledrtc@40002800 !st,stm32-rtcR@( e  l ^okaywatchdog@40003000!st,stm32-iwdgR@0elsi ^disabledspi@40003800!st,stm32f4-spiR@8$ e ^disabledspi@40003c00!st,stm32f4-spiR@<3 e ^disabledserial@40004400!st,stm32-uartR@D& e ^disabledserial@40004800!st,stm32-uartR@H' e^okay(rxtxdefaultserial@40004c00!st,stm32-uartR@L4 e ^disabledserial@40005000!st,stm32-uartR@P5 e ^disabledi2c@40005400!st,stm32f4-i2cR@T   e ^disabledi2c@40005c00!st,stm32f4-i2cR@\HI  e ^disabledcan@40006400!st,stm32f4-bxcanR@dtxrx0rx1sce  e /  ^disabledgcan@40006600!st,stm32f4-gcansysconR@f eV can@40006800!st,stm32f4-bxcanR@h?@ABtxrx0rx1sce  e7/  ^disableddac@40007400!st,stm32f4-dac-coreR@t  epclk ^disableddac@1 !st,stm32-dacHR ^disableddac@2 !st,stm32-dacHR ^disabledserial@40007800!st,stm32-uartR@xR e ^disabledserial@40007c00!st,stm32-uartR@|S e ^disabledtimers@40010000!st,stm32-timersR@ eint^okaypwm !st,stm32-pwm^okay defaulttimer@0!st,stm32-timer-triggerR^okaytimers@40010400!st,stm32-timersR@ eint ^disabledpwm !st,stm32-pwm ^disabledtimer@7!st,stm32-timer-triggerR ^disabledserial@40011000!st,stm32-uartR@% e ^disabled(  rxtxserial@40011400!st,stm32-uartR@G e ^disabledadc@40012000!st,stm32f4-adc-coreR@  eadc,A ^disabledV adc@0!st,stm32f4-adcHR el  rx ^disabledadc@100!st,stm32f4-adcHR el  rx ^disabledadc@200!st,stm32f4-adcHR el  rx ^disabledmmc@40012c00!arm,pl180arm,primecellZR@, e apb_pclk1ql^okay  defaultopendrainspi@40013000!st,stm32f4-spiR@0# e ^disabledspi@40013400!st,stm32f4-spiR@4T e ^disabledsyscon@40013800!st,stm32-syscfgsysconR@8 eVinterrupt-controller@40013c00!st,stm32-exti,AR@<8 ()*>LVtimers@40014000!st,stm32-timersR@@ eint ^disabledpwm !st,stm32-pwm ^disabledtimer@8!st,stm32-timer-triggerR ^disabledtimers@40014400!st,stm32-timersR@D eint ^disabledpwm !st,stm32-pwm ^disabledtimers@40014800!st,stm32-timersR@H eint ^disabledpwm !st,stm32-pwm ^disabledspi@40015000!st,stm32f4-spiR@PU e(  rxtx ^disabledspi@40015400!st,stm32f4-spiR@TV e ^disabledpower-config@40007000!st,stm32-power-configsysconR@pVdisplay-controller@40016800!st,stm32-ltdcR@hXY : elcd^okayportendpointVcrc@40023000!st,stm32f4-crcR@0 e  ^disabledrcc@400238000!st,stm32f469-rccst,stm32f42xx-rccst,stm32-rccR@8e B@Vdma-controller@40026000 !st,stm32-dmaR@` / eVdma-controller@40026400 !st,stm32-dmaR@d 89:;<DEF eV ethernet@40028000 !st,stm32-dwmacsnps,dwmac-3.50aR@ stmmaceth=macirq stmmacethmac-clk-txmac-clk-rx$e$ ^disableddma2d@4002b000!st,stm32-dma2dR@ Z  edma2d^okayusb@40040000 !snps,dwc2R@M eotg ^disabledusb@50000000!st,stm32f4x9-fsotgRPC e'otg^okay5hostdefaultdcmi@50050000!st,stm32-dcmiRPN  e mclkdefault tx ^disabledrng@50060800 !st,stm32-rngRP e&dsi@40016c00 !st,stm32-dsiR@l ;=apbe pclkref^okayportsport@0RendpointVport@1RendpointVpanel@0!orisetech,otm8009aR IU ^okayportendpointVpinctrl@40020000 }@0l!st,stm32f469-pinctrlVgpio@40020000br,AR e~GPIOAVgpio@40020400br,AR e~GPIOBVgpio@40020800br,AR e~GPIOC gpio@40020c00br,AR  e~GPIOD0Vgpio@40021000br,AR e~GPIOE@gpio@40021400br,AR e~GPIOFPgpio@40021800br,AR e~GPIOG`Vgpio@40021c00br,AR e~GPIOHpVgpio@40022000br,AR  e~GPIOIgpio@40022400br,AR$ e ~GPIOJ  gpio@40022800br,AR( e ~GPIOKVusart1-0pins1 pins2 usart3-0Vpins1pins2usbotg-fs-0Vpins  usbotg-fs-1pins    usbotg-hs-0pins0t          mii-0pins8m n "  # k  !   $ % v w adc-200pinsZpwm1-0V pins pwm3-0Vpinsi2c1-0pinsltdc-0pinspltdc-1pinsX&g*   fj 6k'3l Zspi5-0pins1WYpins2Xi2c3-0pins)dcmi-0Vpins<&'()+3F*,62sdio-pins-0Vpins( ) * + , 2 sdio-pins-od-0Vpins1( ) * + , pins22 can1-0pins1 pins2 can2-0pins1 pins2 can2-1pins1 pins2 clocksclk-hse !fixed-clockzVclk-lse !fixed-clockclk-lsi !fixed-clock}Vi2s-ckin !fixed-clockVchosenroot=/dev/ramserial0:115200n8memory@0memoryRaliases/soc/serial@40004800vcc-3v3!regulator-fixedvcc_3v3+2ZC2ZV leds !gpio-ledsled-green  [heartbeatled-orange led-red led-blue gpio-keys !gpio-keysqbutton-0|User vcc5v-otg-regulator!regulator-fixed  vcc5_host1 #address-cells#size-cellsmodelcompatibleinterrupt-controller#interrupt-cellsregphandlestatusclocksinterrupt-parentrangesdma-rangesclock-names#pwm-cellspinctrl-0pinctrl-namesinterruptsassigned-clocksassigned-clock-parentsst,syscfgdmasdma-namesresetsinterrupt-namesst,can-primaryst,gcanst,can-secondary#io-channel-cellsarm,primecell-periphidmax-frequencyvmmc-supplycd-gpiosbroken-cdpinctrl-1bus-widthremote-endpoint#reset-cells#clock-cellsassigned-clock-rates#dma-cellsst,mem2memreg-namesst,sysconsnps,pblsnps,mixed-burstdr_modereset-namesreset-gpiospower-supplygpio-controller#gpio-cellsst,bank-namegpio-rangespinmuxbias-disabledrive-push-pullslew-ratedrive-open-drainbias-pull-upclock-frequencybootargsstdout-pathdevice_typeserial0regulator-nameregulator-min-microvoltregulator-max-microvoltlinux,default-triggerautorepeatlabellinux,codeenable-active-highgpioregulator-always-on