a 8[X([ (,haoyu,marsboard-rk3066rockchip,rk3066a7MarsBoard RK3066aliases=/ethernet@10204000G/pinctrl/gpio@20034000M/pinctrl/gpio@2003c000S/pinctrl/gpio@2003e000Y/pinctrl/gpio@20080000_/i2c@2002d000d/i2c@2002f000i/i2c@20056000n/i2c@2005a000s/i2c@2005e000x/serial@10124000/serial@10126000/serial@20064000/serial@20068000/spi@20070000/spi@20074000/pinctrl/gpio@20084000/pinctrl/gpio@2000a000/mmc@10214000oscillator ,fixed-clockn6xin24mGgpu@10090000",rockchip,rk3066-maliarm,mali-400  buscore'x .disabledx55@gpgpmmupp0ppmmu0pp1ppmmu1pp2ppmmu2pp3ppmmu3Pvideo-codec@10104000,rockchip,rk3066-vpu@5   @vepuvdpu (aclk_vdpuhclk_vdpuaclk_vepuhclk_vepuPcache-controller@10138000,arm,pl310-cache^l8scu@1013c000,arm,cortex-a9-scuglobal-timer@1013c200,arm,cortex-a9-global-timer  5  .disabledlocal-timer@1013c600,arm,cortex-a9-twd-timer  5 interrupt-controller@1013d000,arm,cortex-a9-gicxserial@10124000&,rockchip,rk3066-uartsnps,dw-apb-uart@ 5"baudclkapb_pclk@L.okaytxrxdefaultserial@10126000&,rockchip,rk3066-uartsnps,dw-apb-uart` 5#baudclkapb_pclkAM.okaytxrxdefaultqos@1012d000,rockchip,rk3066-qossyscon !qos@1012e000,rockchip,rk3066-qossyscon  qos@1012f000,rockchip,rk3066-qossyscon qos@1012f080,rockchip,rk3066-qossyscon qos@1012f100,rockchip,rk3066-qossyscon qos@1012f180,rockchip,rk3066-qossyscon qos@1012f200,rockchip,rk3066-qossyscon qos@1012f280,rockchip,rk3066-qossyscon usb@10180000,rockchip,rk3066-usbsnps,dwc2 5otgotg@@  usb2-phy.okayusb@101c0000 ,snps,dwc2 5otghost usb2-phy.okayethernet@10204000,rockchip,rk3066-emac @< 5D hclkmacref#d-rmii6 .okayC G default  mdioethernet-phy@05 mmc@10214000,rockchip,rk2928-dw-mshc!@ 5Hbiuciurx-txR'Q]reset.okayidefaultwmmc@10218000,rockchip,rk2928-dw-mshc! 5Ibiuciurx-txR'R]reset .disableddefaultmmc@1021c000,rockchip,rk2928-dw-mshc! 5Jbiuciurx-txR'S]reset .disablednand-controller@10500000,rockchip,rk2928-nfcP@ 5ahb .disabledpmu@20004000&,rockchip,rk3066-pmusysconsimple-mfd @reboot-mode,syscon-reboot-mode@RBRBRB RBpower-controller!,rockchip,rk3066-power-controllerpower-domain@7POpower-domain@6  power-domain@8!grf@20008000&,rockchip,rk3066-grfsysconsimple-mfd  usbphy,rockchip,rk3066a-usb-phy.okayusb-phy@17c|Qphyclkusb-phy@188Rphyclkdma-controller@20018000,arm,pl330arm,primecell @5  apb_pclkdma-controller@2001c000,arm,pl330arm,primecell @5  apb_pclk .disabledi2c@2002d000,rockchip,rk3066-i2c  5(6 i2cP .disableddefault"i2c@2002f000,rockchip,rk3066-i2c  5)6 Qi2c.okaydefault#tps@2d-$5#%/%;%G%S&_&k%w% ,ti,tps65910regulatorsregulator@0vcc_rtcvrtcregulator@1vcc_iovio&regulator@2vdd_arm '`vdd19regulator@3vcc_ddr '`vdd2regulator@5 vcc18_cifvdig1regulator@6vdd_11vdig2regulator@7vcc_25vpllregulator@8vcc_18vdacregulator@9 vcc25_hdmi vaux1regulator@10vcca_33 vaux2regulator@11 vcc_rmii vaux33 regulator@12 vcc28_cif vmmcregulator@4vdd3regulator@13 vbbpwm@20030000,rockchip,rk2928-pwm F .disableddefault'pwm@20030010,rockchip,rk2928-pwm F .disableddefault(watchdog@2004c000 ,rockchip,rk3066-wdtsnps,dw-wdt K 53.okaypwm@20050020,rockchip,rk2928-pwm  G .disableddefault)pwm@20050030,rockchip,rk2928-pwm 0G.okaydefault*Ji2c@20056000,rockchip,rk3066-i2c ` 5*6 Ri2c .disableddefault+i2c@2005a000,rockchip,rk3066-i2c  5+6 Si2c .disableddefault,i2c@2005e000,rockchip,rk3066-i2c  546 Ti2c .disableddefault-serial@20064000&,rockchip,rk3066-uartsnps,dw-apb-uart @ 5$baudclkapb_pclkBN.okaytxrxdefault.serial@20068000&,rockchip,rk3066-uartsnps,dw-apb-uart  5%baudclkapb_pclkCO.okay txrxdefault/saradc@2006c000,rockchip,saradc  5 GJsaradcapb_pclk'W ]saradc-apb .disabledspi@20070000,rockchip,rk3066-spiEHspiclkapb_pclk 5&   txrx .disableddefault0123spi@20074000,rockchip,rk3066-spiFIspiclkapb_pclk 5' @  txrx .disableddefault4567dma-controller@20078000,arm,pl330arm,primecell @5  apb_pclkcpusrockchip,rk3066-smpcpu@0)cpu,arm,cortex-a9588F@ Oa* s* 'g8W@e9cpu@1)cpu,arm,cortex-a958e9display-subsystem,rockchip,display-subsystemp:;hdmi-sound,simple-audio-cardvHDMIi2s .disabledsimple-audio-card,codec<simple-audio-card,cpu=sram@10080000 ,mmio-sram smp-sram@0,rockchip,rk3066-smp-sramPvop@1010c000,rockchip,rk3066-vop 5 aclk_vopdclk_vophclk_vopP'def ]axiahbdclk .disabledport:endpoint@0>Bvop@1010e000,rockchip,rk3066-vop 5aclk_vopdclk_vophclk_vopP'ghi ]axiahbdclk .disabledport;endpoint@0?Chdmi@10116000,rockchip,rk3066-hdmi`  5@hclkdefault@AP6  .disabled<portsport@0endpoint@0B>endpoint@1C?port@1i2s@10118000,rockchip,rk3066-i2s  5defaultDKi2s_clki2s_hclktxrx  .disabled=i2s@1011a000,rockchip,rk3066-i2s  5 defaultELi2s_clki2s_hclktxrx  .disabledi2s@1011c000,rockchip,rk3066-i2s  5defaultFMi2s_clki2s_hclk  txrx  .disabledclock-controller@20000000,rockchip,rk3066a-cru Gxin24m6 '@^_ ׄ#gрxhрxhtimer@2000e000,snps,dw-apb-timer  5.VD timerpclkefuse@20010000,rockchip,rk3066a-efuse @[ pclk_efusecpu_leakage@17timer@20038000,snps,dw-apb-timer  5,TB timerpclktimer@2003a000,snps,dw-apb-timer  5-UC timerpclktsadc@20060000,rockchip,rk3066-tsadc ]]saradcapb_pclk 5 '\ ]saradc-apb .disabledpinctrl,rockchip,rk3066a-pinctrl6 gpio@20034000,rockchip,gpio-bank @ 56U4Dxgpio@2003c000,rockchip,gpio-bank  57V4Dxgpio@2003e000,rockchip,gpio-bank  58W4Dxgpio@20080000,rockchip,gpio-bank  59X4DxKgpio@20084000,rockchip,gpio-bank @ 5:Y4Dxgpio@2000a000,rockchip,gpio-bank  5<Z4Dx$pcfg-pull-defaultPIpcfg-pull-nonefHemacemac-xfersHHHHHHHH emac-mdio sHH emmcemmc-clksIemmc-cmds Iemmc-rsts Ihdmihdmi-hpdsIAhdmii2c-xfer sHH@i2c0i2c0-xfer sHH"i2c1i2c1-xfer sHH#i2c2i2c2-xfer sHH+i2c3i2c3-xfer sHH,i2c4i2c4-xfer sHH-pwm0pwm0-outsH'pwm1pwm1-outsH(pwm2pwm2-outsH)pwm3pwm3-outsH*spi0spi0-clksI0spi0-cs0sI3spi0-txsI1spi0-rxsI2spi0-cs1sIspi1spi1-clksI4spi1-cs0sI7spi1-rxsI6spi1-txsI5spi1-cs1sIuart0uart0-xfer sIIuart0-ctssIuart0-rtssIuart1uart1-xfer sIIuart1-ctssIuart1-rtssIuart2uart2-xfer sI I.uart3uart3-xfer sII/uart3-ctssIuart3-rtssIsd0sd0-clksIsd0-cmds Isd0-cdsIsd0-wpsIsd0-bus-width1s Isd0-bus-width4@s I I I Isd1sd1-clksIsd1-cmdsIsd1-cdsIsd1-wpsIsd1-bus-width1sIsd1-bus-width4@sIIIIi2s0i2s0-bussII I I I I IIIDi2s1i2s1-bus`sIIIIIIEi2s2i2s2-bus`sIIIIIIFlan8720aphy-intsHmemory@60000000)memory`@vdd-log,pwm-regulator Jvdd_logOOB@dO*.okaysdmmc-regulator,regulator-fixed sdmmc-supply-- K&vsys-regulator,regulator-fixedvsysLK@LK@% #address-cells#size-cellsinterrupt-parentcompatiblemodelethernet0gpio0gpio1gpio2gpio3i2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3spi0spi1gpio4gpio6mmc0clock-frequency#clock-cellsclock-output-namesphandleregclocksclock-namesassigned-clocksassigned-clock-ratesresetsstatusinterruptsinterrupt-namespower-domainscache-unifiedcache-levelinterrupt-controller#interrupt-cellsreg-shiftreg-io-widthdmasdma-namespinctrl-namespinctrl-0dr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizephysphy-namesmax-speedphy-moderockchip,grfphyphy-supplyfifo-depthreset-namesmax-frequencyvmmc-supplyoffsetmode-normalmode-recoverymode-bootloadermode-loader#power-domain-cellspm_qos#phy-cells#dma-cellsarm,pl330-broken-no-flushparm,pl330-periph-burstvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-nameregulator-always-onregulator-compatibleregulator-min-microvoltregulator-max-microvoltregulator-boot-on#pwm-cells#io-channel-cellsenable-methoddevice_typenext-level-cacheoperating-pointsclock-latencycpu-supplyportssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fssound-dairangesremote-endpoint#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#reset-cellsgpio-controller#gpio-cellsbias-pull-pin-defaultbias-disablerockchip,pinspwmsvoltage-tablegpiostartup-delay-usvin-supply