8(  ),rockchip,rk3566-box-demorockchip,rk35667Rockchip RK3566 BOX DEMO Boardaliases=/pinctrl/gpio@fdd60000C/pinctrl/gpio@fe740000I/pinctrl/gpio@fe750000O/pinctrl/gpio@fe760000U/pinctrl/gpio@fe770000[/i2c@fdd40000`/i2c@fe5a0000e/i2c@fe5b0000j/i2c@fe5c0000o/i2c@fe5d0000t/i2c@fe5e0000y/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/ethernet@fe010000/mmc@fe2b0000/mmc@fe2c0000/mmc@fe310000cpus cpu@0cpu,arm,cortex-a55 psci*>K@]jw@ cpu@100cpu,arm,cortex-a55 psci*>K@]jw@ cpu@200cpu,arm,cortex-a55 psci*>K@]jw@ cpu@300cpu,arm,cortex-a55 psci*>K@]jw@ l3-cache,cache@M@_opp-table-0,operating-points-v2opp-408000000Q  0@opp-600000000#F  0opp-8160000000,  0opp-1104000000Aʹ  0opp-1416000000Tfr  0opp-1608000000_" 0opp-1800000000kI 0display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc" protocol@14(opp-table-1,operating-points-v2;opp-200000000   P PB@opp-300000000  P PB@opp-400000000ׄ  P PB@opp-600000000#F  B@opp-700000000)' ~~B@opp-800000000/ B@B@B@hdmi-sound,simple-audio-card5HDMILi2seokaysimple-audio-card,codecsimple-audio-card,cpu pmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0#smctimer,arm,armv8-timer0   xin24m ,fixed-clockn6xin24m(xin32k ,fixed-clockxin32kdefault(sram@10f000 ,mmio-sram sram@0,arm,scmi-shmemsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@satapmaliverxoob _ sata-phy"4 disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahcisatapmaliverxoob ` sata-phy"4 disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clkBotg Jutmi_wide4SZ disabled usb2-phys zhigh-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@ ref_clksuspend_clkbus_clkBhost usb2-phyusb3-phy Jutmi_wide4SZokayinterrupt-controller@fd400000 ,arm,gic-v3 @F  A(usb@fd800000 ,generic-ehci usbokayusb@fd840000 ,generic-ohci usbokayusb@fd880000 ,generic-ehci usbokayusb@fd8c0000 ,generic-ohci usbokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdTio-domains&,rockchip,rk3568-pmu-io-voltage-domainokay &syscon@fdc50000 ,rockchip,rk3566-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru(4clock-controller@fdd20000,rockchip,rk3568-cruxin24m(4A QG f}i2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c .- i2cpclkdefault  disabledserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t ,baudclkapb_pclkdefault disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk defaultokaypwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm 0 pwmpclk!defaultokaypwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0 pwmpclk"default disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0 0 pwmpclk#default disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller power-domain@7$power-domain@8 %&'power-domain@9  ()*power-domain@10 +,-./0power-domain@11 1power-domain@13 2power-domain@14 345power-domain@156789:gpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' jobmmugpugpubus *;4okayvideo-codec@fdea0400,rockchip,rk3568-vpu vdpu aclkhclk<4 okayiommu@fdea0800,rockchip,rk3568-iommu@  aclkiface4 okay<rga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga ZaclkhclksclkS&$% coreaxiahb4 video-codec@fdee0000,rockchip,rk3568-vepu @ aclkhclk=4 iommu@fdee0800,rockchip,rk3568-iommu@ ? aclkiface4 =mmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d biuciuciu-driveciu-sampleрSreset disabledethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a macirqeth_wake_irq@Wstmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refS stmmaceth}>%6?I@\okayA fAergmiininputdefaultBCDEFG {H N O-Imdio,snps,dwmac-mdio ethernet-phy@1,ethernet-phy-ieee802.3-c22Istmmac-axi-config>rx-queues-config?queue0tx-queues-config@queue0vop@fe040000 0@)vopgamma-lut (%aclkhclkdclk_vp0dclk_vp1dclk_vp2J4 }okay,rockchip,rk3566-vopAfports port@0 endpoint@23KRport@1 port@2 iommu@fe043e00,rockchip,rk3568-iommu >?  aclkiface4 okayJdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi DpclkdphyL4 apbS} disabledports port@0port@1dsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi EpclkdphyM4 apbS} disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -((iahbisfrcecrefdefault NOP4 }CokayAQTQdports port@0endpoint3RKport@1endpoint3Sqos@fe128000,rockchip,rk3568-qossyscon $qos@fe138080,rockchip,rk3568-qossyscon 3qos@fe138100,rockchip,rk3568-qossyscon 4qos@fe138180,rockchip,rk3568-qossyscon 5qos@fe148000,rockchip,rk3568-qossyscon %qos@fe148080,rockchip,rk3568-qossyscon &qos@fe148100,rockchip,rk3568-qossyscon 'qos@fe150000,rockchip,rk3568-qossyscon 1qos@fe158000,rockchip,rk3568-qossyscon +qos@fe158100,rockchip,rk3568-qossyscon ,qos@fe158180,rockchip,rk3568-qossyscon -qos@fe158200,rockchip,rk3568-qossyscon .qos@fe158280,rockchip,rk3568-qossyscon /qos@fe158300,rockchip,rk3568-qossyscon 0qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon 6qos@fe190280,rockchip,rk3568-qossyscon 7qos@fe190300,rockchip,rk3568-qossyscon 8qos@fe190380,rockchip,rk3568-qossyscon 9qos@fe190400,rockchip,rk3568-qossyscon :qos@fe198000,rockchip,rk3568-qossyscon 2qos@fe1a8000,rockchip,rk3568-qossyscon (qos@fe1a8080,rockchip,rk3568-qossyscon )qos@fe1a8100,rockchip,rk3568-qossyscon *dfi@fe230000,rockchip,rk3568-dfi#  tTpcie@fe260000,rockchip,rk3568-pcie0@&)dbiapbconfig<KJIHGsyspmcmsglegacyerr($aclk_mstaclk_slvaclk_dbipclkauxpci`UUUU pcie-phy4T @@Spipe  disabledlegacy-interrupt-controller HUmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b biuciuciu-driveciu-sampleрSresetokay V defaultWXYZ+mmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c biuciuciu-driveciu-sampleрSresetokay р7DRh[sdefault \]^+wifi@1,brcm,bcm4329-fmac_  host-wakedefault`spi@fe300000 ,rockchip,sfc0@ exvclk_sfchclk_sfcadefault disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 A{}Q n6(|zy{}corebusaxiblocktimerokaysi2s@fe400000,rockchip,rk3568-i2s-tdm@ 4A=AQFqFq?C9mclk_txmclk_rxhclkbtxSPQ tx-mrx-m}Cokay i2s@fe410000,rockchip,rk3568-i2s-tdmA 5AEIQFqFqGK:mclk_txmclk_rxhclkbbrxtxSRS tx-mrx-m}default0cdefghijklmnCokayi2s@fe420000,rockchip,rk3568-i2s-tdmB 6AMQFqOO;mclk_txmclk_rxhclkbbtxrxSTtx-m}defaultopqrC disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC 7SW<mclk_txmclk_rxhclkbbtxrxSUV tx-mrx-m}C disabledpdm@fe440000,rockchip,rk3568-pdmD LZYpdm_clkpdm_hclkb rxstuvwxdefaultSXpdm-mC disabledspdif@fe460000,rockchip,rk3568-spdifF f mclkhclk_\btxdefaultyCokaydma-controller@fe530000,arm,pl330arm,primecellS@   apb_pclkdma-controller@fe550000,arm,pl330arm,primecellU@  apb_pclkbi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ /HG i2cpclkzdefault  disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0JI i2cpclk{default  disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1LK i2cpclk|default  disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2NM i2cpclk}default  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3PO i2cpclk~default  disabledwatchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`  tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia gRQspiclkapb_pclktxrxdefault   disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib hTSspiclkapb_pclktxrxdefault  disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic iVUspiclkapb_pclktxrxdefault   disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid jXWspiclkapb_pclktxrxdefault   disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte ubaudclkapb_pclkdefaultokaybluetooth,brcm,bcm43438-bt ext_clock _ _ _default %1serial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v# baudclkapb_pclkdefaultokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w'$baudclkapb_pclkdefault disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x+(baudclkapb_pclk default disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y/,baudclkapb_pclk  default disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z30baudclkapb_pclk  default disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk {74baudclkapb_pclkdefault disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl |;8baudclkapb_pclkdefault disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm }?<baudclkapb_pclkdefault disabledthermal-zonescpu-thermal>dTbtripscpu_alert0rp~passivecpu_alert1r$~passivecpu_critrs~ criticalcooling-mapsmap00 gpu-thermal>Tbtripsgpu-thresholdrp~passivegpu-targetr$~passivegpu-critrs~ criticalcooling-mapsmap0 tsadc@fe710000,rockchip,rk3568-tsadcq sAQf@ `tsadcapb_pclkS}sdefaultsleepokaysaradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]saradcapb_pclkS saradc-apb  disabledpwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault disabledpwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmnZY pwmpclkdefault disabledpwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY pwmpclkdefault disabledpwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0ZY pwmpclkdefault disabledpwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo]\ pwmpclkdefault disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\ pwmpclkdefault disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0]\ pwmpclkdefault disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp`_ pwmpclkdefault disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_ pwmpclkdefault disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0`_ pwmpclkdefault disabledphy@fe830000,rockchip,rk3568-naneng-combphy"} refapbpipeA"QS  * @okayphy@fe840000,rockchip,rk3568-naneng-combphy%~ refapbpipeA%QS  * @okayphy@fe870000,rockchip,rk3568-csi-dphyypclk @Sapb} disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy refpclkz @4 apbS disabledLmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy refpclk{ @4 apbS disabledMusb2phy@fe8a0000,rockchip,rk3568-usb2phyphyclkclk_usbphy0_480m  K( disabledhost-port @okay [otg-port @okay [usb2phy@fe8b0000,rockchip,rk3568-usb2phyphyclkclk_usbphy1_480m  K(okayhost-port @okay [otg-port @okay [pinctrl,rockchip,rk3568-pinctrl}tT gpio@fdd60000,rockchip,gpio-bank !.  f v  Vgpio@fe740000,rockchip,gpio-bankt "cd f v  gpio@fe750000,rockchip,gpio-banku #ef f v@  _gpio@fe760000,rockchip,gpio-bankv $gh f v`  gpio@fe770000,rockchip,gpio-bankw %ij f v  Hpcfg-pull-up pcfg-pull-down pcfg-pull-none pcfg-pull-none-drv-level-1  pcfg-pull-none-drv-level-2  pcfg-pull-none-drv-level-3  pcfg-pull-up-drv-level-1  pcfg-pull-up-drv-level-2  pcfg-pull-none-smt  acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 cpuebcedpdpemmceth0eth1flashfspifspi-pins` agmac0gmac1gmac1m1-miim Bgmac1m1-clkinout Ggmac1m1-rx-bus20  Dgmac1m1-tx-bus20 Cgmac1m1-rgmii-clk Egmac1m1-rgmii-bus@ Fgpuhdmitxhdmitxm0-cec Phdmitx-scl Nhdmitx-sda Oi2c0i2c0-xfer  i2c1i2c1-xfer  zi2c2i2c2m0-xfer {i2c3i2c3m0-xfer |i2c4i2c4m0-xfer   }i2c5i2c5m0-xfer   ~i2s1i2s1m0-lrckrx fi2s1m0-lrcktx ei2s1m0-sclkrx di2s1m0-sclktx ci2s1m0-sdi0  gi2s1m0-sdi1  hi2s1m0-sdi2  ii2s1m0-sdi3 ji2s1m0-sdo0 ki2s1m0-sdo1 li2s1m0-sdo2  mi2s1m0-sdo3  ni2s2i2s2m0-lrcktx pi2s2m0-sclktx oi2s2m0-sdi qi2s2m0-sdo ri2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk spdmm0-clk1 tpdmm0-sdi0  updmm0-sdi1  vpdmm0-sdi2  wpdmm0-sdi3 xpmicpmupwm0pwm0m0-pins  pwm1pwm1m0-pins !pwm2pwm2m0-pins "pwm3pwm3-pins #pwm4pwm4-pins pwm5pwm5-pins pwm6pwm6-pins pwm7pwm7-pins pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins pwm12pwm12m0-pins pwm13pwm13m0-pins pwm14pwm14m0-pins pwm15pwm15m0-pins refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ Wsdmmc0-clk Xsdmmc0-cmd Ysdmmc0-det Zsdmmc1sdmmc1-bus4@ \sdmmc1-clk ^sdmmc1-cmd ]sdmmc2spdifspdifm0-tx yspi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m1-pins0 spi1m1-cs0 spi2spi2m0-pins0 spi2m0-cs0 spi2m0-cs1 spi3spi3m0-pins0   spi3m0-cs0 spi3m0-cs1 tsadctsadc-shutorg tsadc-pin uart0uart0-xfer uart1uart1m0-xfer   uart1m0-ctsn uart2uart2m0-xfer uart3uart3m0-xfer uart4uart4m0-xfer uart5uart5m0-xfer uart6uart6m0-xfer uart7uart7m0-xfer uart8uart8m0-xfer uart9uart9m0-xfer vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2btbt-enable-h bt-host-wake-l bt-wake-l sdio-pwrseqwifi-enable-h  wifi-host-wake-l  `wifi-32k usbvcc5v0_usb_host_en vcc5v0_usb2_otg_en irir-int ledled_work_en chosen serial2:1500000n8external-gmac1-clock ,fixed-clocksY@ gmac1_clkin(Ahdmi-con,hdmi-connectoraportendpoint3Sir-receiver,gpio-ir-receiver H rc-beelink-gs1okayleds ,gpio-ledsled-0 V heartbeat  heartbeatdefaultsdio-pwrseqokay,mmc-pwrseq-simple ext_clockdefault ,_ [spdif-dit,linux,spdif-ditCspdif-sound,simple-audio-card5SPDIFsimple-audio-card,cpusimple-audio-card,codecregulator-vcc12v0-dcin,regulator-fixed 8vcc12v0_dcin G [ m regulator-vcc5v0-sys,regulator-fixed 8vcc5v0_sys G [ mLK@ LK@ regulator-vcc3v3-sys,regulator-fixed 8vcc3v3_sys G [ m2Z 2Z regulator-vcc-3v3,regulator-fixed 8vcc_3v3 G [ m2Z 2Z regulator-vcc5v0-usb-host,regulator-fixed  Vdefault 8vcc5v0_usb_host mLK@ LK@ regulator-vcc5v0-usb2-otg,regulator-fixed  Vdefault 8vcc5v0_usb_otg mLK@ LK@ regulator-vcca-1v8,regulator-fixed 8vcca_1v8 G [ mw@ w@ regulator-vdda-0v9,regulator-fixed 8vdda_0v9 G [ m   Qregulator-vdd-fixed,regulator-fixed 8vdd_fixed m~ ~ G [ regulator-vdd-cpu,pwm-regulator  8vdd_cpu m 5 O G [  regulator-vdd-logic,pwm-regulator  8vdd_logic m 5  G [   interrupt-parent#address-cells#size-cellscompatiblemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3ethernet0mmc0mmc1mmc2device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grfdmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesiommus#iommu-cellsreset-namesfifo-depthmax-frequencysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsophy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphy-handlesnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpoint#sound-dai-cellsavdd-0v9-supplyavdd-1v8-supplyrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanesbus-widthcap-sd-highspeedcd-gpiosdisable-wpvmmc-supplycap-sdio-irqsd-uhs-sdr104keep-power-in-suspendmmc-pwrseqnon-removablevqmmc-supplymmc-hs200-1_8vdma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctsdevice-wake-gpioshost-wake-gpiosshutdown-gpiosvbat-supplyvddio-supplypolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfphy-supplygpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-pull-downbias-disabledrive-strengthinput-schmitt-enablerockchip,pinsstdout-pathlinux,rc-map-namefunctioncolorlinux,default-triggerreset-gpiosregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltvin-supplyenable-active-highpwmsregulator-settling-time-up-uspwm-supply