L8(P ",anbernic,rg-arc-srockchip,rk35667handsetDAnbernic RG ARC-SaliasesJ/pinctrl/gpio@fdd60000P/pinctrl/gpio@fe740000V/pinctrl/gpio@fe750000\/pinctrl/gpio@fe760000b/pinctrl/gpio@fe770000h/i2c@fdd40000m/i2c@fe5a0000r/i2c@fe5b0000w/i2c@fe5c0000|/i2c@fe5d0000/i2c@fe5e0000/serial@fdd50000/serial@fe650000/serial@fe660000/serial@fe670000/serial@fe680000/serial@fe690000/serial@fe6a0000/serial@fe6b0000/serial@fe6c0000/serial@fe6d0000/spi@fe610000/spi@fe620000/spi@fe630000/spi@fe640000/mmc@fe2b0000/mmc@fe2c0000/mmc@fe000000cpus cpu@0cpu,arm,cortex-a55 psci-AN@`mz@ cpu@100cpu,arm,cortex-a55psci-AN@`mz@ cpu@200cpu,arm,cortex-a55psci-AN@`mz@ cpu@300cpu,arm,cortex-a55psci-AN@`mz@ l3-cache,cacheCP@bopp-table-0,operating-points-v2opp-408000000Q  0@opp-600000000#F  0opp-8160000000,  0opp-1104000000Aʹ  0opp-1416000000Tfr  0opp-1608000000_" 0opp-1800000000kI 0display-subsystem,rockchip,display-subsystemfirmwarescmi ,arm,scmi-smc% protocol@14+opp-table-1,operating-points-v2Dopp-200000000   P PB@opp-300000000  P PB@opp-400000000ׄ  P PB@opp-600000000#F  B@opp-700000000)' ~~B@opp-800000000/ B@B@B@hdmi-sound,simple-audio-card8HDMIOi2shokaysimple-audio-card,codecsimple-audio-card,cpu pmu,arm,cortex-a55-pmu0 psci ,arm,psci-1.0&smctimer,arm,armv8-timer0   xin24m ,fixed-clockn6xin24m+xin32k ,fixed-clockxin32kdefault+sram@10f000 ,mmio-sram sram@0,arm,scmi-shmemsata@fc400000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci@  satapmaliverxoob _ sata-phy%7 disabledsata@fc800000',rockchip,rk3568-dwc-ahcisnps,dwc-ahci  satapmaliverxoob ` sata-phy%7 disabledusb@fcc00000,rockchip,rk3568-dwc3snps,dwc3@   ref_clksuspend_clkbus_clk Eperipheral Mutmi_wide7V]okay usb2-phyv }high-speedusb@fd000000,rockchip,rk3568-dwc3snps,dwc3@   ref_clksuspend_clkbus_clkEhost usb2-phyusb3-phy Mutmi_wide7V]okayinterrupt-controller@fd400000 ,arm,gic-v3 @F  A(usb@fd800000 ,generic-ehci  usb disabledusb@fd840000 ,generic-ohci  usb disabledusb@fd880000 ,generic-ehci  usbokayusb@fd8c0000 ,generic-ohci  usbokaysyscon@fdc20000),rockchip,rk3568-pmugrfsysconsimple-mfdaio-domains&,rockchip,rk3568-pmu-io-voltage-domainokay )7syscon@fdc50000 ,rockchip,rk3566-pipe-grfsysconsyscon@fdc60000&,rockchip,rk3568-grfsysconsimple-mfdsyscon@fdc80000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdc90000$,rockchip,rk3568-pipe-phy-grfsysconsyscon@fdca0000#,rockchip,rk3568-usb2phy-grfsysconsyscon@fdca8000#,rockchip,rk3568-usb2phy-grfsysconʀclock-controller@fdd00000,rockchip,rk3568-pmucru+Eclock-controller@fdd20000,rockchip,rk3568-cru  xin24m+E RbG  wi2c@fdd40000(,rockchip,rk3568-i2crockchip,rk3399-i2c . -  i2cpclk default okaypmic@20,rockchip,rk817 !rk808-clkout1rk808-clkout2 mclk HRHw+default"#$$$$$$$$%regulatorsDCDC_REG1&:L dp|q vdd_logicregulator-state-mem DCDC_REG2&:L dp|qvdd_gpuEregulator-state-memDCDC_REG3&:vcc_ddrregulator-state-memDCDC_REG4&:L2Zd2Zvcc_3v3regulator-state-mem2ZLDO_REG1&:Lw@dw@ vcca1v8_pmuMregulator-state-memw@LDO_REG2&:L d  vdda_0v9regulator-state-memLDO_REG3&:L d  vdda0v9_pmuregulator-state-mem LDO_REG4&:L2Zd2Z vccio_acodecregulator-state-memLDO_REG5&:Lw@d2Z vccio_sdregulator-state-memLDO_REG6&:L2Zd2Z vcc3v3_pmuregulator-state-mem2ZLDO_REG7&:Lw@dw@vcc_1v8regulator-state-memLDO_REG8&:Lw@d2Z vcc1v8_dvpregulator-state-memLDO_REG9&:L*d* vcc2v8_dvpregulator-state-memBOOST&:LG`dReboost%regulator-state-memOTG_SWITCH otg_switchregulator-state-memcharger&'9_regulator@40 ,fcs,fan53555@&:L 4d5vdd_cpu|$regulator-state-memserial@fdd50000&,rockchip,rk3568-uartsnps,dw-apb-uart t  , baudclkapb_pclk''(default disabledpwm@fdd70000(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0  pwmpclk)defaultokaypwm@fdd70010(,rockchip,rk3568-pwmrockchip,rk3328-pwm  0  pwmpclk*default disabledpwm@fdd70020(,rockchip,rk3568-pwmrockchip,rk3328-pwm   0  pwmpclk+default disabledpwm@fdd70030(,rockchip,rk3568-pwmrockchip,rk3328-pwm0  0  pwmpclk,default disabledpower-management@fdd90000&,rockchip,rk3568-pmusysconsimple-mfdpower-controller!,rockchip,rk3568-power-controller power-domain@7 -power-domain@8  ./0power-domain@9   123power-domain@10  456789power-domain@11  :power-domain@13  ;power-domain@14  <=>power-domain@15 ?@ABCgpu@fde60000&,rockchip,rk3568-maliarm,mali-bifrost@$()' jobmmugpu  gpubus-D7okayEvideo-codec@fdea0400,rockchip,rk3568-vpu vdpu   aclkhclk F7 iommu@fdea0800,rockchip,rk3568-iommu@   aclkiface 7 Frga@fdeb0000(,rockchip,rk3568-rgarockchip,rk3288-rga Z  aclkhclksclkV&$%  coreaxiahb7 video-codec@fdee0000,rockchip,rk3568-vepu @   aclkhclk G7 iommu@fdee0800,rockchip,rk3568-iommu@ ?   aclkiface7 Gmmc@fe0000000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc@ d   biuciuciu-driveciu-sample,7рV resetokayEO`mH IJKdefaultLMethernet@fe010000&,rockchip,rk3568-gmacsnps,dwmac-4.20a macirqeth_wake_irq@ W stmmacethmac_clk_rxmac_clk_txclk_mac_refoutaclk_macpclk_macclk_mac_speedptp_refV  stmmacethNOP disabledmdio,snps,dwmac-mdio stmmac-axi-config)9Nrx-queues-configIOqueue0tx-queues-config_Pqueue0vop@fe040000 0@uvopgamma-lut ( % aclkhclkdclk_vp0dclk_vp1dclk_vp2 Q7 okay,rockchip,rk3566-vopRwports port@0 endpoint@2R_port@1 endpoint@4SUport@2 iommu@fe043e00,rockchip,rk3568-iommu >?    aclkiface7 okayQdsi@fe060000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi D pclk dphyT7  apbVokay ports port@0endpointUSport@1endpointV[panel@0&,anbernic,rg-arc-panelsitronix,st7701WXdefaultY ZZXportendpoint[Vdsi@fe070000*,rockchip,rk3568-mipi-dsisnps,dw-mipi-dsi E pclk dphy\7  apbV disabledports port@0port@1hdmi@fe0a0000,rockchip,rk3568-dw-hdmi  -( ( iahbisfrcecrefdefault]7 okay^ports port@0endpoint_Rport@1endpoint`qos@fe128000,rockchip,rk3568-qossyscon -qos@fe138080,rockchip,rk3568-qossyscon <qos@fe138100,rockchip,rk3568-qossyscon =qos@fe138180,rockchip,rk3568-qossyscon >qos@fe148000,rockchip,rk3568-qossyscon .qos@fe148080,rockchip,rk3568-qossyscon /qos@fe148100,rockchip,rk3568-qossyscon 0qos@fe150000,rockchip,rk3568-qossyscon :qos@fe158000,rockchip,rk3568-qossyscon 4qos@fe158100,rockchip,rk3568-qossyscon 5qos@fe158180,rockchip,rk3568-qossyscon 6qos@fe158200,rockchip,rk3568-qossyscon 7qos@fe158280,rockchip,rk3568-qossyscon 8qos@fe158300,rockchip,rk3568-qossyscon 9qos@fe180000,rockchip,rk3568-qossyscon qos@fe190000,rockchip,rk3568-qossyscon ?qos@fe190280,rockchip,rk3568-qossyscon @qos@fe190300,rockchip,rk3568-qossyscon Aqos@fe190380,rockchip,rk3568-qossyscon Bqos@fe190400,rockchip,rk3568-qossyscon Cqos@fe198000,rockchip,rk3568-qossyscon ;qos@fe1a8000,rockchip,rk3568-qossyscon 1qos@fe1a8080,rockchip,rk3568-qossyscon 2qos@fe1a8100,rockchip,rk3568-qossyscon 3dfi@fe230000,rockchip,rk3568-dfi#  apcie@fe260000,rockchip,rk3568-pcie0@&udbiapbconfig<KJIHGsyspmcmsglegacyerr( $ aclk_mstaclk_slvaclk_dbipclkauxpci`bbbb   . = E pcie-phy7T @@V pipe  disabledlegacy-interrupt-controller Hbmmc@fe2b00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc+@ b   biuciuciu-driveciu-sample,7рV resetokayEO O! Xcdefdefault cmmc@fe2c00000,rockchip,rk3568-dw-mshcrockchip,rk3288-dw-mshc,@ c   biuciuciu-driveciu-sample,7рV resetokayEO Og  Xhijkdefault cspi@fe300000 ,rockchip,sfc0@ e xv clk_sfchclk_sfcldefault disabledmmc@fe310000,rockchip,rk3568-dwcmshc1 R{}b n6( |zy{} corebusaxiblocktimer disabledi2s@fe400000,rockchip,rk3568-i2s-tdm@ 4R=AbFqFq ?C9 mclk_txmclk_rxhclkm qtxVPQ  tx-mrx-mokay i2s@fe410000,rockchip,rk3568-i2s-tdmA 5REIbFqFq GK: mclk_txmclk_rxhclkmm qrxtxVRS  tx-mrx-mdefaultnopqokay {i2s@fe420000,rockchip,rk3568-i2s-tdmB 6RMbFq OO; mclk_txmclk_rxhclkmm qtxrxVT tx-mdefaultrstu disabledi2s@fe430000,rockchip,rk3568-i2s-tdmC 7 SW< mclk_txmclk_rxhclkmm qtxrxVUV  tx-mrx-m disabledpdm@fe440000,rockchip,rk3568-pdmD L ZY pdm_clkpdm_hclkm  qrxvwxyz{defaultVX pdm-m disabledspdif@fe460000,rockchip,rk3568-spdifF f  mclkhclk _\m qtxdefault| disableddma-controller@fe530000,arm,pl330arm,primecellS@      apb_pclk 'dma-controller@fe550000,arm,pl330arm,primecellU@     apb_pclk mi2c@fe5a0000(,rockchip,rk3568-i2crockchip,rk3399-i2cZ / HG  i2cpclk}default  disabledi2c@fe5b0000(,rockchip,rk3568-i2crockchip,rk3399-i2c[ 0 JI  i2cpclk~default  disabledi2c@fe5c0000(,rockchip,rk3568-i2crockchip,rk3399-i2c\ 1 LK  i2cpclkdefault  disabledi2c@fe5d0000(,rockchip,rk3568-i2crockchip,rk3399-i2c] 2 NM  i2cpclkdefault  disabledi2c@fe5e0000(,rockchip,rk3568-i2crockchip,rk3399-i2c^ 3 PO  i2cpclkdefault okay^watchdog@fe600000 ,rockchip,rk3568-wdtsnps,dw-wdt`    tclkpclkspi@fe610000(,rockchip,rk3568-spirockchip,rk3066-spia g RQ spiclkapb_pclk'' qtxrxdefault   disabledspi@fe620000(,rockchip,rk3568-spirockchip,rk3066-spib h TS spiclkapb_pclk'' qtxrxdefault   disabledspi@fe630000(,rockchip,rk3568-spirockchip,rk3066-spic i VU spiclkapb_pclk'' qtxrxdefault   disabledspi@fe640000(,rockchip,rk3568-spirockchip,rk3066-spid j XW spiclkapb_pclk'' qtxrxdefault   disabledserial@fe650000&,rockchip,rk3568-uartsnps,dw-apb-uarte u  baudclkapb_pclk'' defaultokay bluetooth*,realtek,rtl8821cs-btrealtek,rtl8723bs-bt Z Z Zserial@fe660000&,rockchip,rk3568-uartsnps,dw-apb-uartf v #  baudclkapb_pclk''defaultokayserial@fe670000&,rockchip,rk3568-uartsnps,dw-apb-uartg w '$ baudclkapb_pclk''default disabledserial@fe680000&,rockchip,rk3568-uartsnps,dw-apb-uarth x +( baudclkapb_pclk'' default disabledserial@fe690000&,rockchip,rk3568-uartsnps,dw-apb-uarti y /, baudclkapb_pclk' ' default disabledserial@fe6a0000&,rockchip,rk3568-uartsnps,dw-apb-uartj z 30 baudclkapb_pclk' ' default disabledserial@fe6b0000&,rockchip,rk3568-uartsnps,dw-apb-uartk { 74 baudclkapb_pclk''default disabledserial@fe6c0000&,rockchip,rk3568-uartsnps,dw-apb-uartl | ;8 baudclkapb_pclk''default disabledserial@fe6d0000&,rockchip,rk3568-uartsnps,dw-apb-uartm } ?< baudclkapb_pclk''default disabledthermal-zonescpu-thermal d  tripscpu_alert0 +p 7?passivecpu_alert1 +$ 7?passivecpu_crit +s 7 ?criticalcooling-mapsmap0 B0 G gpu-thermal   tripsgpu-threshold +p 7?passivegpu-target +$ 7?passivegpu-crit +s 7 ?criticalcooling-mapsmap0 B Gtsadc@fe710000,rockchip,rk3568-tsadcq sRbf@ `  tsadcapb_pclkV Vsdefaultsleep m wokay  saradc@fe720000.,rockchip,rk3568-saradcrockchip,rk3399-saradcr ]  saradcapb_pclkV  saradc-apb okay pwm@fe6e0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY  pwmpclkdefaultokaypwm@fe6e0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmn ZY  pwmpclkdefaultokaypwm@fe6e0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmn  ZY  pwmpclkdefaultokaypwm@fe6e0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmn0 ZY  pwmpclkdefaultokaypwm@fe6f0000(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\  pwmpclkdefault disabledpwm@fe6f0010(,rockchip,rk3568-pwmrockchip,rk3328-pwmo ]\  pwmpclkdefault disabledpwm@fe6f0020(,rockchip,rk3568-pwmrockchip,rk3328-pwmo  ]\  pwmpclkdefault disabledpwm@fe6f0030(,rockchip,rk3568-pwmrockchip,rk3328-pwmo0 ]\  pwmpclkdefault disabledpwm@fe700000(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_  pwmpclkdefault disabledpwm@fe700010(,rockchip,rk3568-pwmrockchip,rk3328-pwmp `_  pwmpclkdefault disabledpwm@fe700020(,rockchip,rk3568-pwmrockchip,rk3328-pwmp  `_  pwmpclkdefault disabledpwm@fe700030(,rockchip,rk3568-pwmrockchip,rk3328-pwmp0 `_  pwmpclkdefault disabledphy@fe830000,rockchip,rk3568-naneng-combphy "}  refapbpipeR"bV   okayphy@fe840000,rockchip,rk3568-naneng-combphy %~  refapbpipeR%bV    disabledphy@fe870000,rockchip,rk3568-csi-dphy y pclk V apb disabledmipi-dphy@fe850000,rockchip,rk3568-dsi-dphy  refpclk z 7  apbVokayTmipi-dphy@fe860000,rockchip,rk3568-dsi-dphy  refpclk { 7  apbV disabled\usb2phy@fe8a0000,rockchip,rk3568-usb2phy  phyclkclk_usbphy0_480m  +okayhost-port  disabledotg-port okayusb2phy@fe8b0000,rockchip,rk3568-usb2phy  phyclkclk_usbphy1_480m  +okayhost-port okayotg-port  disabledpinctrl,rockchip,rk3568-pinctrla gpio@fdd60000,rockchip,gpio-bank ! .   0  <!gpio@fe740000,rockchip,gpio-bankt " cd  0  <gpio@fe750000,rockchip,gpio-banku # ef  0@  <ggpio@fe760000,rockchip,gpio-bankv $ gh  0`  <gpio@fe770000,rockchip,gpio-bankw % ij  0  <Zpcfg-pull-up Hpcfg-pull-none Upcfg-pull-none-drv-level-1 U bpcfg-pull-none-drv-level-2 U bpcfg-pull-none-drv-level-3 U bpcfg-pull-up-drv-level-1 H bpcfg-pull-up-drv-level-2 H bpcfg-pull-none-smt U qpcfg-output-low acodecaudiopwmbt656bt1120camcan0can1can2cifclk32kclk32k-out0 cpuebcedpdpemmceth0eth1flashfspifspi-pins` lgmac0gmac1gpuhdmitxhdmitxm0-cec ]i2c0i2c0-xfer   i2c1i2c1-xfer  }i2c2i2c2m0-xfer ~i2c3i2c3m0-xfer i2c4i2c4m0-xfer   i2c5i2c5m1-xfer i2s1i2s1m0-lrcktx oi2s1m0-mclk "i2s1m0-sclktx ni2s1m0-sdi0  pi2s1m0-sdo0 qi2s2i2s2m0-lrcktx si2s2m0-sclktx ri2s2m0-sdi ti2s2m0-sdo ui2s3ispjtaglcdcmcunpupcie20pcie30x1pcie30x2pdmpdmm0-clk vpdmm0-clk1 wpdmm0-sdi0  xpdmm0-sdi1  ypdmm0-sdi2  zpdmm0-sdi3 {pmicpmic-int-l #pmupwm0pwm0m1-pins )pwm1pwm1m0-pins *pwm2pwm2m0-pins +pwm3pwm3-pins ,pwm4pwm4-pins pwm5pwm5-pins pwm6pwm6-pins pwm7pwm7-pins pwm8pwm8m0-pins  pwm9pwm9m0-pins  pwm10pwm10m0-pins  pwm11pwm11m0-pins pwm12pwm12m0-pins pwm13pwm13m0-pins pwm14pwm14m0-pins pwm15pwm15m0-pins refclksatasata0sata1sata2scrsdmmc0sdmmc0-bus4@ csdmmc0-clk dsdmmc0-cmd esdmmc0-det fsdmmc1sdmmc1-bus4@ hsdmmc1-clk jsdmmc1-cmd isdmmc1-det  ksdmmc2sdmmc2m0-bus4@ Isdmmc2m0-clk Ksdmmc2m0-cmd Jspdifspdifm0-tx |spi0spi0m0-pins0 spi0m0-cs0 spi0m0-cs1 spi1spi1m0-pins0  spi1m0-cs0 spi1m0-cs1 spi2spi2m0-pins0 spi2m0-cs0 spi2m0-cs1 spi3spi3m0-pins0   spi3m0-cs0 spi3m0-cs1 tsadctsadc-shutorg tsadc-pin uart0uart0-xfer (uart1uart1m1-xfer uart1m1-ctsn uart1m1-rtsn uart2uart2m0-xfer uart3uart3m0-xfer uart4uart4m0-xfer uart5uart5m0-xfer uart6uart6m0-xfer uart7uart7m0-xfer uart8uart8m0-xfer uart9uart9m0-xfer vopspi0-hsspi1-hsspi2-hsspi3-hsgmac-txd-level3gmac-txc-level2gpio-btnsbtn-pins-ctrl      btn-pins-vol joy-muxjoy-mux-en sdio-pwrseqwifi-enable-h vcc3v3-lcdvcc-lcd-h vcc-wifivcc-wifi-h audio-amplifierspk-amp-enable-h gpio-lcdlcd-rst Yheadphonehp-det chosen serial2:1500000n8adc-keys ,adc-keys  buttons w@ <button-mode MODE < gpio-keys-control ,gpio-keysdefaultbutton-b  B 1button-down  DPAD-DOWN !button-l1   TL 6button-l2   TL2 8button-select  SELECT :button-start   START ;button-up  DPAD-UP  button-x  X 3button-a  A 0button-c  C 2button-left  DPAD-LEFT "button-r1   TR 7button-r2   TR2 9button-right  DPAD-RIGHT #button-y  Y 4button-z  Z 5gpio-keys-vol ,gpio-keys defaultbutton-vol-down  VOLUMEDOWN rbutton-vol-up  VOLUMEUP shdmi-con,hdmi-connector^?cportendpoint`pwm-leds ,pwm-ledsled-0 & ,on :power C Raled-1 & :charging C Raled-2 & ,off :status C Rasdio-pwrseq,mmc-pwrseq-simple   ext_clockdefault W ZHregulator-vcc3v3-lcd0,regulator-fixed n! sdefault:L2Zd2Zvcc3v3_lcd0_nXregulator-state-memregulator-vcc-sys,regulator-fixed&:L9d9vcc_sys$regulator-vcc-wifi,regulator-fixed s n!default&:L2Zd2Z vcc_wifiLpwm-vibrator ,pwm-vibrator enable R;backlight,pwm-backlight $ RaWbattery,simple-battery 4   @@ ' N? k3@  ?d=_<ʀZ;U;P:aPK9XF9(A8<827727[-7`(6#66}8635Ɉ5H 43@&sound,simple-audio-carddefault 8rk817_ext Oi2s ZhC MicrophoneMic JackHeadphoneHeadphonesSpeakerInternal SpeakersMICLMic JackHeadphonesHPOLHeadphonesHPORInternal SpeakersSpeaker Amp OUTLInternal SpeakersSpeaker Amp OUTRSpeaker Amp INLHPOLSpeaker Amp INRHPORInternal Speakerssimple-audio-card,codecsimple-audio-card,cpuaudio-amplifier,simple-audio-amplifier Zdefault >Speaker Amp interrupt-parent#address-cells#size-cellscompatiblechassis-typemodelgpio0gpio1gpio2gpio3gpio4i2c0i2c1i2c2i2c3i2c4i2c5serial0serial1serial2serial3serial4serial5serial6serial7serial8serial9spi0spi1spi2spi3mmc1mmc2mmc3device_typeregclocks#cooling-cellsenable-methodoperating-points-v2i-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cachecpu-supplyphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspendportsarm,smc-idshmem#clock-cellssimple-audio-card,namesimple-audio-card,formatsimple-audio-card,mclk-fsstatussound-daiinterruptsinterrupt-affinityarm,no-tick-in-suspendclock-frequencyclock-output-namespinctrl-0pinctrl-namesrangesclock-namesphysphy-namesports-implementedpower-domainsdr_modephy_typeresetssnps,dis_u2_susphy_quirkextconmaximum-speedinterrupt-controller#interrupt-cellsmbi-aliasmbi-rangesmsi-controllerpmuio1-supplypmuio2-supplyvccio1-supplyvccio3-supplyvccio4-supplyvccio5-supplyvccio6-supplyvccio7-supply#reset-cellsassigned-clocksassigned-clock-ratesassigned-clock-parentsrockchip,grf#sound-dai-cellswakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-initial-moderegulator-nameregulator-off-in-suspendregulator-suspend-microvoltregulator-on-in-suspendmonitored-batteryrockchip,resistor-sense-micro-ohmsrockchip,sleep-enter-current-microamprockchip,sleep-filter-current-microampfcs,suspend-voltage-selectorvin-supplydmasreg-io-widthreg-shift#pwm-cells#power-domain-cellspm_qosinterrupt-namesmali-supplyiommus#iommu-cellsreset-namesfifo-depthmax-frequencybus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqno-mmcno-sdnon-removablesd-uhs-sdr50vmmc-supplyvqmmc-supplysnps,axi-configsnps,mixed-burstsnps,mtl-rx-configsnps,mtl-tx-configsnps,tsosnps,blensnps,rd_osr_lmtsnps,wr_osr_lmtsnps,rx-queues-to-usesnps,tx-queues-to-usereg-namesremote-endpointbacklightIOVCC-supplyreset-gpiosrotationddc-i2c-busrockchip,pmubus-rangeinterrupt-map-maskinterrupt-maplinux,pci-domainnum-ib-windowsnum-ob-windowsmax-link-speedmsi-mapnum-lanescd-gpiosdisable-wpsd-uhs-sdr104dma-namesrockchip,trcm-sync-tx-onlyarm,pl330-periph-burst#dma-cellsuart-has-rtsctsdevice-wake-gpiosenable-gpioshost-wake-gpiospolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicerockchip,hw-tshut-temppinctrl-1#thermal-sensor-cellsrockchip,hw-tshut-moderockchip,hw-tshut-polarity#io-channel-cellsvref-supplyrockchip,pipe-grfrockchip,pipe-phy-grf#phy-cellsrockchip,usbgrfgpio-controllergpio-ranges#gpio-cellsbias-pull-upbias-disabledrive-strengthinput-schmitt-enableoutput-lowrockchip,pinsstdout-pathio-channelsio-channel-nameskeyup-threshold-microvoltpoll-intervallabellinux,codepress-threshold-microvoltautorepeatcolordefault-statefunctionmax-brightnesspwmspost-power-on-delay-msgpioenable-active-highpwm-namespower-supplycharge-full-design-microamp-hourscharge-term-current-microampconstant-charge-current-max-microampconstant-charge-voltage-max-microvoltfactory-internal-resistance-micro-ohmsvoltage-max-design-microvoltvoltage-min-design-microvoltocv-capacity-celsiusocv-capacity-table-0simple-audio-card,aux-devssimple-audio-card,hp-det-gpiosimple-audio-card,widgetssimple-audio-card,routingsimple-audio-card,pin-switchessound-name-prefix