ԯ8`(O( 7,Toradex Colibri iMX8QXP on Colibri Evaluation Board V3@2toradex,colibri-imx8x-eval-v3toradex,colibri-imx8xfsl,imx8qxpaliases =/bus@5b000000/ethernet@5b040000 G/bus@5b000000/ethernet@5b050000Q/bus@5d000000/gpio@5d080000W/bus@5d000000/gpio@5d090000]/bus@5d000000/gpio@5d0a0000c/bus@5d000000/gpio@5d0b0000i/bus@5d000000/gpio@5d0c0000o/bus@5d000000/gpio@5d0d0000u/bus@5d000000/gpio@5d0e0000{/bus@5d000000/gpio@5d0f0000/bus@5a000000/i2c@5a800000/bus@5a000000/i2c@5a810000/bus@5a000000/i2c@5a820000/bus@5a000000/i2c@5a830000/bus@5b000000/mmc@5b010000/bus@5b000000/mmc@5b020000/bus@5b000000/mmc@5b030000/bus@5d000000/mailbox@5d1b0000/bus@5d000000/mailbox@5d1c0000/bus@5d000000/mailbox@5d1d0000/bus@5d000000/mailbox@5d1e0000/bus@5d000000/mailbox@5d1f0000/bus@5a000000/serial@5a060000/bus@5a000000/serial@5a070000/bus@5a000000/serial@5a080000/bus@5a000000/serial@5a090000 /vpu@2c000000/vpu-core@2d080000 /vpu@2c000000/vpu-core@2d090000"/bus@5a000000/i2c@5a810000/rtc@68/system-controller/rtccpus cpu@0cpu2arm,cortex-a35psci!@3@M@_l } cpu@1cpu2arm,cortex-a35psci!@3@M@_l } cpu@2cpu2arm,cortex-a35psci!@3@M@_l }cpu@3cpu2arm,cortex-a35psci!@3@M@_l }l2-cache02cache#@5opp-table2operating-points-v2opp-9000000005B@Iopp-1200000000GIinterrupt-controller@51a00000 2arm,gic-v3 QQ  , reserved-memory 7decoder-boot@84000000>encoder-boot@86000000 >decoder-rpc@92000000>dsp@92400000@> Edisabledencoder-rpc@94400000@p>pmu2arm,cortex-a35-pmu ,psci 2arm,psci-1.0 smcsystem-controller 2fsl,imx-scu Ltx0rx0gip3$Wpower-controller2fsl,imx8qxp-scu-pdfsl,scu-pd^clock-controller2fsl,imx8qxp-clkfsl,scu-clkrpinctrl2fsl,imx8qxp-iomuxcdefault ad7879intgrp !Vadc0grp0d`c`h`g`atmeladaptergrpN!M!atmelconnectorgrp!!canintgrp @Ecsictlgrp  csimclkgrp Aextio0grp 1@fec1grpx5 4 &a%a'a(a-a.a/a0anfec1slpgrpx5A4A&A%A'A(A-A.A/A0Aoflexcan0grpj!i!flexcan1grpl!k!flexcan2grpn!m!gpioblongrp `gpiohpdgrp z gpiokeysgrp pAhog0grpa S a, a T a U aR a      X   hog1grp  hog2grp  hogscfwgrp  i2c0grp!!Ti2c0mipilvds0grpt u i2c0mipilvds1grpx y i2c1grpv!w!Xlcdifgrp,L`H`K`J@@7``8`9`:`;`<`=`>`?`@`A`B`C`E`F`G`I`)`P`lpspi2grp0Y!Z@[@\@Blpspi2cs2grp *! lpuart0grp0o p i j Jlpuart2grpr q Mlpuart3grpm n Olpuart3ctrlgrpH{ V W    Ppciebgrp$aa`pwmagrpa``pwmbgrp M`{pwmcgrp N`}pwmdgrpaO`sai0grp0^@a@]@_@sgtl5000grp Asgtl5000usbclkgrp e!Uusb3503agrp ausbcdetgrp 3@usbh1reggrp @usdhc1grp A ! ! ! !!!!!!A!ausdhc1-100mhzgrp A ! ! ! !!!!!!A!busdhc1-200mhzgrp A ! ! ! !!!!!!A!cusdhc2gpiogrp !gusdhc2gpioslpgrp `kusdhc2grpTA! !!!"!#!!fusdhc2-100mhzgrpTA! !!!"!#!!husdhc2-200mhzgrpTA! !!!"!#!!iusdhc2slpgrpT`` `!`"`#`!jwifigrp  ocotp2fsl,imx8qxp-scu-ocotp keys"2fsl,imx8qxp-sc-keyfsl,imx-sc-keyt Edisabledrtc2fsl,imx8qxp-sc-rtcwatchdog"2fsl,imx8qxp-sc-wdtfsl,imx-sc-wdt<thermal-sensor*2fsl,imx8qxp-sc-thermalfsl,imx-sc-thermal timer2arm,armv8-timer0,   clock-dummy 2fixed-clockr clk_dummyclock-xtal32k 2fixed-clockr xtal_32KHzclock-xtal24m 2fixed-clockrn6 xtal_24MHzthermal-zonescpu0-thermal  ctripstrip0(_4passive trip1((4 criticalcooling-mapsmap0? 0D clock-img-ipg 2fixed-clockr  img_ipg_clkbus@58000000 2simple-bus 7XXjpegdec@58400000X@ ,5}Sc x2nxp,imx8qxp-jpgdecEokayjpegenc@58450000XE ,1}Sc x2nxp,imx8qxp-jpgencEokayclock-controller@585d00002fsl,imx8qxp-lpcgX]r}0img_jpeg_dec_lpcg_clkimg_jpeg_dec_lpcg_ipg_clkxclock-controller@585f00002fsl,imx8qxp-lpcgX_r}0img_jpeg_enc_lpcg_clkimg_jpeg_enc_lpcg_ipg_clkxvpu@2c000000 7,,,x Edisabledmailbox@2d0000002fsl,imx6sx-mu- ,x Edisabledmailbox@2d0200002fsl,imx6sx-mu- ,x Edisabledvpu-core@2d080000-2nxp,imx8q-vpu-decoderx Ltx0tx1rx$W Edisabledvpu-core@2d090000-2nxp,imx8q-vpu-encoderx Ltx0tx1rx$W Edisabledclock-cm40-ipg 2fixed-clockr) cm40_ipg_clkbus@34000000 2simple-bus 744serial@372200002fsl,imx8qxp-lpuart7",} ipgbaud Scn6x Edisabledi2c@37230000$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c7#, }peripg S cn6x  Edisabledintmux@374000002fsl,imx-intmux7@`,}ipgx! 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spi3_lpcg_clkspi3_lpcg_ipg_clkx8Gclock-controller@5a4600002fsl,imx8qxp-lpcgZFr}9R'uart0_lpcg_baud_clkuart0_lpcg_ipg_clkx9Hclock-controller@5a4700002fsl,imx8qxp-lpcgZGr}:R'uart1_lpcg_baud_clkuart1_lpcg_ipg_clkx:Kclock-controller@5a4800002fsl,imx8qxp-lpcgZHr};R'uart2_lpcg_baud_clkuart2_lpcg_ipg_clkx;Lclock-controller@5a4900002fsl,imx8qxp-lpcgZIr}<R'uart3_lpcg_baud_clkuart3_lpcg_ipg_clkx<Nclock-controller@5a5900002fsl,imx8qxp-lpcgZYr}R(adma_pwm_lpcg_clkadma_pwm_lpcg_ipg_clkxQi2c@5a800000Z@ ,}SSperipg S`cn6x`Eokay$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c defaultTUtouchscreen@2c 2adi,ad7879-1defaultV,D,B[xr Edisabledi2c@5a810000Z@ ,}WWperipg Sacn6xaEokay$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2c defaultXrtc@68 2st,m41t0hi2c@5a820000Z@ ,}YYperipg Sbcn6xb Edisabled$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2ci2c@5a830000Z@ ,}ZZperipg Sccn6xc Edisabled$2fsl,imx8qxp-lpi2cfsl,imx7ulp-lpi2cadc@5a8800002nxp,imx8qxp-adcZ ,}[[peripg Secn6xe Edisabledcan@5a8d00002fsl,imx8qm-flexcanZ ,}\\ipgper SicbZxi Edisabledcan@5a8e00002fsl,imx8qm-flexcanZ ,}\\ipgper SicbZxj Edisabledcan@5a8f00002fsl,imx8qm-flexcanZ ,}\\ipgper SicbZxk Edisableddma-controller@5a9f00002fsl,imx8qm-edmaZ `,@xclock-controller@5ac000002fsl,imx8qxp-lpcgZr}`R i2c0_lpcg_clki2c0_lpcg_ipg_clkx`Sclock-controller@5ac100002fsl,imx8qxp-lpcgZr}aR i2c1_lpcg_clki2c1_lpcg_ipg_clkxaWclock-controller@5ac200002fsl,imx8qxp-lpcgZr}bR i2c2_lpcg_clki2c2_lpcg_ipg_clkxbYclock-controller@5ac300002fsl,imx8qxp-lpcgZr}cR i2c3_lpcg_clki2c3_lpcg_ipg_clkxcZclock-controller@5ac800002fsl,imx8qxp-lpcgZr}eR adc0_lpcg_clkadc0_lpcg_ipg_clkxe[clock-controller@5acd00002fsl,imx8qxp-lpcgZr}iRR 5can0_lpcg_pe_clkcan0_lpcg_ipg_clkcan0_lpcg_chi_clkxi\clock-conn-axi 2fixed-clockrCU conn_axi_clkuclock-conn-ahb 2fixed-clockr ! conn_ahb_clkvclock-conn-ipg 2fixed-clockr conn_ipg_clktclock-conn-bch 2fixed-clockrׄ conn_bch_clkbus@5b000000 2simple-bus 7[[usb@5b0d0000-2fsl,imx7ulp-usbfsl,imx6ul-usbfsl,imx27-usb[  , ]^}_%6Jx Edisabledusbmisc@5b0d0200^82fsl,imx7ulp-usbmiscfsl,imx7d-usbmiscfsl,imx6q-usbmisc[ ^usbphy@5b1000002fsl,imx7ulp-usbphy[}_x Edisabled]mmc@5b010000 ,[}``` ipgahbperxEokay"2fsl,imx8qxp-usdhcfsl,imx7d-usdhcku"defaultstate_100mhzstate_200mhzabcmmc@5b020000 ,[}ddd ipgahbperxEokay"2fsl,imx8qxp-usdhcfsl,imx7d-usdhck D e(defaultstate_100mhzstate_200mhzsleepfghgigjkmmc@5b030000 ,[}lll ipgahbperx Edisabled"2fsl,imx8qxp-usdhcfsl,imx7d-usdhcethernet@5b040000[0, }mmm mipgahbenet_clk_refptpSc沀sY@xEokay.2fsl,imx8qxp-fecfsl,imx8qm-fecfsl,imx6sx-fecdefaultsleepno!rmii*p5mdio ethernet-phy@22ethernet-phy-ieee802.3-c22Fdpethernet@5b050000[0, }qqq qipgahbenet_clk_refptpSc沀sY@x Edisabled.2fsl,imx8qxp-fecfsl,imx8qm-fecfsl,imx6sx-fecusb@5b1100002fsl,imx8qm-usb3[ 7(}rrrrrlpmbusaclkipgcore Sc沀x Edisabledusb@5b120000 2cdns,usb3[[[ Potgxhcidev0,Zhostperipheralotgwakeupjsocdns3,usb3-phyy Edisabledusb-phy@5b1600002nxp,salvo-phy[}rsalvo_phy_clkx Edisabledsclock-controller@5b2000002fsl,imx8qxp-lpcg[ r}tu 9sdhc0_lpcg_per_clksdhc0_lpcg_ipg_clksdhc0_lpcg_ahb_clkx`clock-controller@5b2100002fsl,imx8qxp-lpcg[!r}tu 9sdhc1_lpcg_per_clksdhc1_lpcg_ipg_clksdhc1_lpcg_ahb_clkxdclock-controller@5b2200002fsl,imx8qxp-lpcg["r}tu 9sdhc2_lpcg_per_clksdhc2_lpcg_ipg_clksdhc2_lpcg_ahb_clkxlclock-controller@5b2300002fsl,imx8qxp-lpcg[#r0}utt enet0_lpcg_timer_clkenet0_lpcg_txc_sampling_clkenet0_lpcg_ahb_clkenet0_lpcg_rgmii_txc_clkenet0_lpcg_ipg_clkenet0_lpcg_ipg_s_clkxmclock-controller@5b2400002fsl,imx8qxp-lpcg[$r0}utt enet1_lpcg_timer_clkenet1_lpcg_txc_sampling_clkenet1_lpcg_ahb_clkenet1_lpcg_rgmii_txc_clkenet1_lpcg_ipg_clkenet1_lpcg_ipg_s_clkxqclock-controller@5b2700002fsl,imx8qxp-lpcg['r}vt"usboh3_ahb_clkusboh3_phy_ipg_clkx_clock-controller@5b2800002fsl,imx8qxp-lpcg[(r0}tttMusb3_app_clkusb3_lpm_clkusb3_ipg_clkusb3_core_pclkusb3_phy_clkusb3_aclkxrclock-controller@5b2900002fsl,imx8qxp-lpcg[)r }  uu'gpmi_bchgpmi_iogpmi_apbgpmi_bch_apbx xclock-controller@5b2900042fsl,imx8qxp-lpcg[)r}u apbhdma_hclkx wdma-controller@5b810000(2fsl,imx8qxp-dma-apbhfsl,imx28-dma-apbh[ 0,}wx ynand-controller@5b8120002fsl,imx8qxp-gpmi-nand[ [@ Pgpmi-nandbch  ,Zbch }xxxx'gpmi_iogpmi_apbgpmi_bchgpmi_bch_apbyrx-txx  S c Edisabledbus@5c000000 2simple-bus 7\\ddr-pmu@5c0200002fsl,imx8-ddr-pmu\ ,clock-lsio-bus 2fixed-clockr lsio_bus_clkbus@5d000000 2simple-bus  7]]pwm@5d0000002fsl,imx27-pwm]ipgper}zz Scn67 ,^Eokay{defaultpwm@5d0100002fsl,imx27-pwm]ipgper}|| Scn67 ,_Eokay}defaultpwm@5d0200002fsl,imx27-pwm]ipgper}~~ Scn67 ,`Eokaydefaultpwm@5d0300002fsl,imx27-pwm]ipgper} Scn67 ,a Edisabledgpio@5d080000] ,x 2fsl,imx8qxp-gpiofsl,imx35-gpioP8 EKPRSODIMM_70SODIMM_60SODIMM_58SODIMM_78SODIMM_72SODIMM_80SODIMM_46SODIMM_62SODIMM_48SODIMM_74SODIMM_50SODIMM_52SODIMM_54SODIMM_66SODIMM_64SODIMM_68SODIMM_82SODIMM_56SODIMM_28SODIMM_30SODIMM_61SODIMM_103SODIMM_25SODIMM_27SODIMM_100gpio@5d090000]  ,x 2fsl,imx8qxp-gpiofsl,imx35-gpio0Y ct SODIMM_86SODIMM_92SODIMM_90SODIMM_88SODIMM_59SODIMM_6SODIMM_8SODIMM_2SODIMM_4SODIMM_34SODIMM_32SODIMM_63SODIMM_55SODIMM_33SODIMM_35SODIMM_36SODIMM_38SODIMM_21SODIMM_19SODIMM_140SODIMM_142SODIMM_196SODIMM_194SODIMM_186SODIMM_188SODIMM_138Cgpio@5d0a0000]  ,x 2fsl,imx8qxp-gpiofsl,imx35-gpio0{~SODIMM_23SODIMM_144gpio@5d0b0000]  ,x 2fsl,imx8qxp-gpiofsl,imx35-gpio0 SODIMM_96SODIMM_75SODIMM_37SODIMM_29SODIMM_43SODIMM_45SODIMM_69SODIMM_71SODIMM_73SODIMM_77SODIMM_89SODIMM_93SODIMM_95SODIMM_99SODIMM_105SODIMM_107SODIMM_98SODIMM_102SODIMM_104SODIMM_106Dgpio@5d0c0000]  ,x 2fsl,imx8qxp-gpiofsl,imx35-gpio  %SODIMM_129SODIMM_133SODIMM_127SODIMM_131SODIMM_44SODIMM_76SODIMM_31SODIMM_47SODIMM_190SODIMM_192SODIMM_49SODIMM_51SODIMM_53gpio@5d0d0000]  ,x 2fsl,imx8qxp-gpiofsl,imx35-gpio0(, 3aSODIMM_57SODIMM_65SODIMM_85SODIMM_135SODIMM_137UNUSABLE_SODIMM_180UNUSABLE_SODIMM_184gpio@5d0e0000] ,x 2fsl,imx8qxp-gpiofsl,imx35-gpiogpio@5d0f0000] ,x 2fsl,imx8qxp-gpiofsl,imx35-gpiospi@5d120000 2nxp,imx8qxp-fspi]Pfspi_basefspi_mmap ,\} fspi_enfspix Edisabledmailbox@5d1b0000] , Edisabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1c0000] ,-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1d0000] , Edisabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1e0000] , Edisabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d1f0000] , Edisabled-2fsl,imx8-mu-scufsl,imx8qxp-mufsl,imx6sx-mumailbox@5d200000]  ,x Edisabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d210000]! ,x Edisabled2fsl,imx8qxp-mufsl,imx6sx-mumailbox@5d280000]( ,x2fsl,imx8qxp-mufsl,imx6sx-muclock-controller@5d4000002fsl,imx8qxp-lpcg]@r4}hpwm0_lpcg_ipg_clkpwm0_lpcg_ipg_hf_clkpwm0_lpcg_ipg_s_clkpwm0_lpcg_ipg_slv_clkpwm0_lpcg_ipg_mstr_clkxzclock-controller@5d4100002fsl,imx8qxp-lpcg]Ar4}hpwm1_lpcg_ipg_clkpwm1_lpcg_ipg_hf_clkpwm1_lpcg_ipg_s_clkpwm1_lpcg_ipg_slv_clkpwm1_lpcg_ipg_mstr_clkx|clock-controller@5d4200002fsl,imx8qxp-lpcg]Br4}hpwm2_lpcg_ipg_clkpwm2_lpcg_ipg_hf_clkpwm2_lpcg_ipg_s_clkpwm2_lpcg_ipg_slv_clkpwm2_lpcg_ipg_mstr_clkx~clock-controller@5d4300002fsl,imx8qxp-lpcg]Cr4}hpwm3_lpcg_ipg_clkpwm3_lpcg_ipg_hf_clkpwm3_lpcg_ipg_s_clkpwm3_lpcg_ipg_slv_clkpwm3_lpcg_ipg_mstr_clkxclock-controller@5d4400002fsl,imx8qxp-lpcg]Dr4}hpwm4_lpcg_ipg_clkpwm4_lpcg_ipg_hf_clkpwm4_lpcg_ipg_s_clkpwm4_lpcg_ipg_slv_clkpwm4_lpcg_ipg_mstr_clkxclock-controller@5d4500002fsl,imx8qxp-lpcg]Er4}hpwm5_lpcg_ipg_clkpwm5_lpcg_ipg_hf_clkpwm5_lpcg_ipg_s_clkpwm5_lpcg_ipg_slv_clkpwm5_lpcg_ipg_mstr_clkxclock-controller@5d4600002fsl,imx8qxp-lpcg]Fr4}hpwm6_lpcg_ipg_clkpwm6_lpcg_ipg_hf_clkpwm6_lpcg_ipg_s_clkpwm6_lpcg_ipg_slv_clkpwm6_lpcg_ipg_mstr_clkxclock-controller@5d4700002fsl,imx8qxp-lpcg]Gr4}hpwm7_lpcg_ipg_clkpwm7_lpcg_ipg_hf_clkpwm7_lpcg_ipg_s_clkpwm7_lpcg_ipg_slv_clkpwm7_lpcg_ipg_mstr_clkxchosen/bus@5a000000/serial@5a090000gpio-keys 2gpio-keysdefaultEokaykey-wakeup  D Wake-Upregulator-module-3v32regulator-fixed+V3.32Z72Zeclock-16mhz 2fixed-clockr$F interrupt-parent#address-cells#size-cellsmodelcompatibleethernet0ethernet1gpio0gpio1gpio2gpio3gpio4gpio5gpio6gpio7i2c0i2c1i2c2i2c3mmc0mmc1mmc2mu0mu1mu2mu3mu4serial0serial1serial2serial3vpu-core0vpu-core1rtc0rtc1device_typeregenable-methodi-cache-sizei-cache-line-sizei-cache-setsd-cache-sized-cache-line-sized-cache-setsnext-level-cacheclocksoperating-points-v2#cooling-cellsphandlecache-levelcache-unifiedopp-sharedopp-hzopp-microvoltclock-latency-nsopp-suspend#interrupt-cellsinterrupt-controllerinterruptsrangesno-mapstatusmbox-namesmboxes#power-domain-cells#clock-cellspinctrl-namespinctrl-0fsl,pinslinux,keycodestimeout-sec#thermal-sensor-cellsclock-frequencyclock-output-namespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-deviceassigned-clocksassigned-clock-ratespower-domainsslotclock-indices#mbox-cellsclock-namesdmasdma-namesfsl,asrc-ratefsl,asrc-widthfsl,asrc-clk-map#dma-cellsdma-channelsdma-channel-maskdaiscs-gpiosspi-max-frequency#pwm-cellstouchscreen-max-pressureadi,resistance-plate-xadi,first-conversion-delayadi,acquisition-timeadi,median-filter-sizeadi,averagingadi,conversion-interval#io-channel-cellsfsl,clk-sourcefsl,scu-indexfsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dword#index-cellsbus-widthnon-removableno-sdno-sdiopinctrl-1pinctrl-2fsl,tuning-start-tapfsl,tuning-stepcd-gpiosvmmc-supplypinctrl-3disable-wpno-1-8-vfsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handlefsl,magic-packetmax-speedreg-namesinterrupt-namesphysphy-namescdns,on-chip-buff-size#phy-cellsgpio-controller#gpio-cellsgpio-rangesgpio-line-namesstdout-pathdebounce-intervallabellinux,codewakeup-sourceregulator-nameregulator-min-microvoltregulator-max-microvolt