984d(4,#raspberrypi,5-model-bbrcm,bcm2712 &7Raspberry Pi 5clocksclk-osc fixed-clock=Josc]7mclk-vpu fixed-clock=], Jvpu-clockm clk-uart fixed-clock=] Juart-clockm clk-emmc2 fixed-clock=]  Jemmc2-clockmcpus mcpu@0ucpuarm,cortex-a76psci@@ml2-cachecache@mcpu@1ucpuarm,cortex-a76psci@@m l2-cachecache@mcpu@2ucpuarm,cortex-a76psci@@m!l2-cachecache@mcpu@3ucpuarm,cortex-a76psci@@m"l2-cachecache@ml3-cachecache @mpscismcarm,psci-1.0arm,psci-0.2reserved-memory m#atf@0linux,cmashared-dma-pool$-?@m$soc@107c000000 simple-bus m%reset-controller@119500brcm,bcm7216-pcie-sata-rescalLmmmc@fff000&brcm,bcm2712-sdhcibrcm,sdhci-brcmstb` Yhostcfg cnusw_sdio m&reset-controller@1504318brcm,brcmstb-resetPC0Lmtimer@7c003000brcm,bcm2835-system-timer|00c@ABC]B@m'mailbox@7c013880brcm,bcm2835-mbox|8@ c!mserial@7d001000arm,pl011arm,primecell} cyn uuartclkapb_pclk4okaym(interrupt-controller@7d517000brcm,bcm7271-l2-intc}Qp cgpio@7d517c00$brcm,bcm7445-gpiobrcm,brcmstb-gpio}Q|@)9Eminterrupt-controller@7fff9000 arm,gic-400    minterrupt-controller@7d510600"brcm,bcm2711-l2-intcbrcm,l2-intc}Q0 cmpixelvalve@7c410000brcm,bcm2712-pixelvalve0|A cem)pixelvalve@7c411000brcm,bcm2712-pixelvalve1|A cnm*mop@7c500000brcm,bcm2712-mop|P(& cm+moplet@7c501000brcm,bcm2712-moplet|P & cm,interrupt-controller@7c502000"brcm,bcm2711-l2-intcbrcm,l2-intc|P 0 cam clock@7c700000brcm,brcm2711-dvp|pn =Lmi2c@7d508200brcm,brcmstb-i2c}PX&c]| mi2c@7d508280brcm,brcmstb-i2c}PX&c]| minterrupt-controller@7d508380brcm,bcm7271-l2-intc}P cminterrupt-controller@7d508400brcm,bcm7271-l2-intc}P cm-hdmi@7c701400brcm,bcm2712-hdmi0H|p|p|p|p |p8|p@|p}Q|r+Yhdmidvpphyrmpacketmetadatacsccechd[&c0bcec-txcec-rxcec-lowhpd-connectedhpd-removedrn uhdmibvbaudiocecm.hdmi@7c706400brcm,bcm2712-hdmi1H|pd|p`|pm|pp|p|p|p}Q|r+Yhdmidvpphyrmpacketmetadatacsccechd[&c 0bcec-txcec-rxcec-lowhpd-connectedhpd-removedrn uhdmibvbaudiocecm/firmware(raspberrypi,bcm2835-firmwaresimple-mfd v}mclocksraspberrypi,firmware-clocks=mresetraspberrypi,firmware-resetLm0powerraspberrypi,bcm2835-powerm1axi simple-bus xx}m2gpubrcm,bcm2712-vc6m3pcie@1000100000brcm,bcm2712-pcieupci &c bpciemsi [*rescalbridge 8C}C disabledmpcie@1000110000brcm,bcm2712-pcieupci &c bpciemsi [+rescalbridge 8C8}okaym4pcie@1000120000brcm,bcm2712-pcieupci &c bpciemsi [,rescalbridge 8CT}@Cokaym5msi-controller@1000130000brcm,bcm2712-mip @!mmsi-controller@1000131000brcm,bcm2712-mip !mtimerarm,armv8-timer<c    clk-27M= fixed-clock] J27MHz-clockmclk-108M= fixed-clock]o J108MHz-clockm hvs@107c580000brcm,bcm2712-hvs|X&  c bch0-eofch1-eofch2-eofn ucoredispm6aliases 1/soc@107c000000/serial@7d001000chosen:serial10:115200n8m7memory@0umemory(sd-io-1v8-regregulator-gpio Fvdd-sd-ioUw@m2Z w@2Zmsd-vcc-regregulator-fixedFvcc-sdU2Zm2Z m __symbols__/clocks/clk-osc/clocks/clk-vpu/clocks/clk-uart/clocks/clk-emmc2 /cpus /cpus/cpu@0/cpus/cpu@0/l2-cache /cpus/cpu@1$/cpus/cpu@1/l2-cache 0/cpus/cpu@25/cpus/cpu@2/l2-cache A/cpus/cpu@3F/cpus/cpu@3/l2-cacheR/cpus/l3-cache[/reserved-memory`/reserved-memory/linux,cmad/soc@107c000000(h/soc@107c000000/reset-controller@119500t/soc@107c000000/mmc@fff000)z/soc@107c000000/reset-controller@1504318/soc@107c000000/timer@7c003000!/soc@107c000000/mailbox@7c013880 /soc@107c000000/serial@7d001000/soc@107c000000/gpio@7d517c00./soc@107c000000/interrupt-controller@7fff9000./soc@107c000000/interrupt-controller@7d510600$/soc@107c000000/pixelvalve@7c410000$/soc@107c000000/pixelvalve@7c411000/soc@107c000000/mop@7c500000 /soc@107c000000/moplet@7c501000./soc@107c000000/interrupt-controller@7c502000/soc@107c000000/clock@7c700000/soc@107c000000/i2c@7d508200/soc@107c000000/i2c@7d508280./soc@107c000000/interrupt-controller@7d508380./soc@107c000000/interrupt-controller@7d508400/soc@107c000000/hdmi@7c701400 /soc@107c000000/hdmi@7c706400/soc@107c000000/firmware /soc@107c000000/firmware/clocks~/soc@107c000000/firmware/reset/soc@107c000000/power%/axi )/axi/gpu-/axi/pcie@10001000003/axi/pcie@10001100009/axi/pcie@1000120000?/axi/msi-controller@1000130000D/axi/msi-controller@1000131000 I/clk-27M S/clk-108M^/hvs@107c580000b/choseni/sd-io-1v8-reg w/sd-vcc-reg compatible#address-cells#size-cellsinterrupt-parentmodel#clock-cellsclock-output-namesclock-frequencyphandledevice_typeregenable-methodd-cache-sized-cache-line-sized-cache-setsi-cache-sizei-cache-line-sizei-cache-setsnext-level-cachecache-levelcache-unifiedrangesno-mapreusablelinux,cma-defaultalloc-ranges#reset-cellsreg-namesinterruptsclocksclock-namesmmc-ddr-3_3vvqmmc-supplyvmmc-supplybus-widthsd-uhs-sdr50sd-uhs-ddr50sd-uhs-sdr104#mbox-cellsarm,primecell-periphidstatusinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsbrcm,gpio-bank-widthsresetsinterrupt-namesddcmboxesdma-rangesfirmware#power-domain-cellslinux,pci-domainmax-link-speednum-lanesinterrupt-map-maskinterrupt-mapreset-namesmsi-controllermsi-parentmsi-rangesbrcm,msi-offsetserial10stdout-pathregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onregulator-settling-time-usgpiosstatesenable-active-highclk_oscclk_vpuclk_uartclk_emmc2cpuscpu0l2_cache_l0cpu1l2_cache_l1cpu2l2_cache_l2cpu3l2_cache_l3l3_cachermemcmasocpcie_rescalsdio1bcm_resetsystem_timermailboxuart10gio_aongicv2aon_intrpixelvalve0pixelvalve1mopmopletdisp_intrdvpddc0ddc1bsc_irqmain_irqhdmi0hdmi1firmware_clockspoweraxivc4pcie0pcie1pcie2mip0mip1clk_27MHzclk_108MHzhvschosensd_io_1v8_regsd_vcc_reg