Ð þí ƒ8|(D"xlnx,zynq-microzedxlnx,zynq-7000 &Zynq MicroZED Development Boardcpuscpu@0arm,cortex-a9,cpu8<CèQ] ,+B@B@cpu@1arm,cortex-a9,cpu8<pmu@f8891000arm,cortex-a9-pmuny8ø‰ø‰0fixedregulatorregulator-fixedŠVCCPINT™B@±B@ÉÛïõamba simple-busyýadc@f8007100xlnx,zynq-xadc-1.00.a8øq  ny< can@e0008000xlnx,zynq-can-1.0 disabled<$  can_clkpclk8à€ ny@%@can@e0009000xlnx,zynq-can-1.0 disabled<%  can_clkpclk8à n3y@%@gpio@e000a000xlnx,zynq-gpio-1.03<*?Ody n8à i2c@e0004000cdns,i2c-r1p10 disabled<&y n8à@i2c@e0005000cdns,i2c-r1p10 disabled<'y n08àPinterrupt-controller@f8f01000arm,cortex-a9-gicdO8øðøðïõcache-controller@f8f02000arm,pl310-cache8øð  n u †–¤memory-controller@f8006000xlnx,zynq-ddrc-a058ø`serial@e0000000xlnx,xuartpscdns,uart-r1p8 disabled<( uart_clkpclk8à nserial@e0001000xlnx,xuartpscdns,uart-r1p8okay<) uart_clkpclk8à n2spi@e0006000xlnx,zynq-spi-r1p68à` disabledy n<"  ref_clkpclkspi@e0007000xlnx,zynq-spi-r1p68àp disabledy n1<#  ref_clkpclkethernet@e000b000cdns,zynq-gemcdns,gem8à°okay n<  pclkhclktx_clk °rgmii-id¹ethernet-phy@08ïõethernet@e000c000cdns,zynq-gemcdns,gem8àÀ disabled n-< pclkhclktx_clksdhci@e0100000arasan,sdhci-8.9aokay clk_xinclk_ahb< y n8àsdhci@e0101000arasan,sdhci-8.9a disabled clk_xinclk_ahb<!y n/8àslcr@f8000000!xlnx,zynq-slcrsysconsimple-mfd8øýïõclkc@100Äxlnx,ps7-clkcÑjÝarmpllddrplliopllcpu_6or4xcpu_3or2xcpu_2xcpu_1xddr2xddr3xdcilqspismcpcapgem0gem1fclk0fclk1fclk2fclk3can0can1sdio0sdio1uart0uart1spi0spi1dmausb0_aperusb1_apergem0_apergem1_apersdio0_apersdio1_aperspi0_aperspi1_apercan0_apercan1_aperi2c0_aperi2c1_aperuart0_aperuart1_apergpio_aperlqspi_apersmc_aperswdtdbg_trcdbg_apb8ðü Uïõrstc@200xlnx,zynq-reset8Hpinctrl@700xlnx,pinctrl-zynq8usb0-defaultïõmux usb0_0_grpusb0conf usb0_0_grp%/conf-rx;MIO29MIO31MIO36@conf-tx6;MIO28MIO30MIO32MIO33MIO34MIO35MIO37MIO38MIO39Tdmac@f8003000arm,pl330arm,primecell8ø0y.aabortdma0dma1dma2dma3dma4dma5dma6dma7ln ()*+q|Š<  apb_pclkdevcfg@f8007000xlnx,zynq-devcfg-1.08øpy n<  ref_clktimer@f8f00200arm,cortex-a9-global-timer8øð  n y<timer@f8001000y$n    cdns,ttc<8øtimer@f8002000y$n%&' cdns,ttc<8ø timer@f8f00600y n arm,cortex-a9-twd-timer8øð <usb@e0002000"xlnx,zynq-usb-2.20achipidea,usb2okay<y n8à ˜ulpi¡host©±default¿usb@e0003000"xlnx,zynq-usb-2.20achipidea,usb2 disabled<y n,8à0˜ulpiwatchdog@f8005000<-cdns,wdt-r1p2y n 8øPÉ aliasesÕ/amba/ethernet@e000b000ß/amba/serial@e0001000memory,memory8@chosen çearlyconðserial0:115200n8phy0usb-nop-xceivüïõ #address-cells#size-cellscompatiblemodeldevice_typeregclocksclock-latencycpu0-supplyoperating-pointsinterruptsinterrupt-parentregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onlinux,phandlerangesstatusclock-namestx-fifo-depthrx-fifo-depth#gpio-cellsgpio-controllerinterrupt-controller#interrupt-cellsarm,data-latencyarm,tag-latencycache-unifiedcache-levelphy-modephy-handle#clock-cellsfclk-enableclock-output-namesps-clk-frequency#reset-cellssyscongroupsfunctionslew-rateio-standardpinsbias-high-impedancebias-disableinterrupt-names#dma-cells#dma-channels#dma-requestsphy_typedr_modeusb-phypinctrl-namespinctrl-0timeout-secethernet0serial0bootargsstdout-path#phy-cells