9z85 (n4,Lichee Pi One*2licheepi,licheepi-oneallwinner,sun5i-a13chosen=Dserial0:115200n8framebuffer@002allwinner,simple-framebuffersimple-framebuffer Pde_be0-lcd0(c+.XZU jdisabledaliasesq/soc@01c00000/serial@01c28400memoryymemorycpuscpu@0ycpu2arm,cortex-a8c0a\ p / OOOclocks=clk@01c20050 2fixed-clockn6osc24M  clk@0 2fixed-clockosc32ksoc@01c00000 2simple-bus=sram-controller@01c00000$2allwinner,sun4i-a10-sram-controller0=sram@00000000 2mmio-sram =sram@00010000 2mmio-sram =sram-section@00002allwinner,sun4i-a10-sram-djokay  dma-controller@01c020002allwinner,sun4i-a10-dma $c/spi@01c050002allwinner,sun4i-a10-spiP$ c$E:ahbmodFKrxtx jdisabledspi@01c060002allwinner,sun4i-a10-spi`$ c%F:ahbmodF Krxtx jdisabledmmc@01c0f0002allwinner,sun5i-a13-mmcc@:ahbmmc$ jokayUdefaultcmymmc@01c100002allwinner,sun5i-a13-mmccA:ahbmmc$! jdisabledmmc@01c110002allwinner,sun5i-a13-mmccB:ahbmmc$"jokayUdefaultcmyusb@01c130002allwinner,sun4i-a10-musb0c$&mcusb jokayotgphy@01c134002allwinner,sun5i-a13-usb-phy4Hphy_ctrlpmu1cM:usb_phyusb0_resetusb1_resetjokayUdefault   ' usb@01c14000&2allwinner,sun5i-a13-ehcigeneric-ehci@$'cusbjokayusb@01c14400&2allwinner,sun5i-a13-ohcigeneric-ohciD$(cLusbjokayspi@01c170002allwinner,sun4i-a10-spip$ c&G:ahbmodFKrxtx jdisabledclock@01c20000c  :hosclosc82allwinner,sun5i-a13-ccuinterrupt-controller@01c204002allwinner,sun4i-a10-icEZpinctrl@01c20800$c5 :apbhosclosckEZ{2allwinner,sun5i-a13-pinctrl  i2c0@0PB0PB1i2c0i2c1@0 PB15PB16i2c1i2c2@0 PB17PB18i2c2lcd_rgb565@0_PD3PD4PD5PD6PD7PD10PD11PD12PD13PD14PD15PD19PD20PD21PD22PD23PD24PD25PD26PD27lcd0mmc0@0PF0PF1PF2PF3PF4PF5mmc0mmc2@0.PC6PC7PC8PC9PC10PC11PC12PC13PC14PC15mmc2mmc2-4bit@0PC6PC7PC8PC9PC10PC11mmc2spi2@0 PE1PE2PE3spi2spi2-cs0@0PE0spi2uart3@0 PG9PG10uart3uart3-cts-rts@0 PG11PG12uart3pwm0PB2pwmlcd_rgb666@0hPD2PD3PD4PD5PD6PD7PD10PD11PD12PD13PD14PD15PD18PD19PD20PD21PD22PD23PD24PD25PD26PD27lcd0uart1@0 PE10PE11uart1uart1@1PG3PG4uart1ahci_pwr_pin@0PB8 gpio_outusb0_vbus_pin@0PB9 gpio_outusb1_vbus_pin@0PH6 gpio_outusb2_vbus_pin@0PH3 gpio_outtimer@01c20c002allwinner,sun4i-a10-timer $cwatchdog@01c20c902allwinner,sun4i-a10-wdt lradc@01c228002allwinner,sun4i-a10-lradc-keys($jokaybutton@984Home>codec@01c22c002allwinner,sun4i-a10-codec,@$c2_ :apbcodecFKrxtx jdisabledeeprom@01c238002allwinner,sun4i-a10-sid8rtp@01c250002allwinner,sun5i-a13-tsP$serial@01c284002snps,dw-apb-uart„$c<jokayUdefaultcserial@01c28c002snps,dw-apb-uartŒ$c> jdisabledi2c@01c2ac002allwinner,sun4i-a10-i2c¬$c8jokayUdefaultcpmic@342x-powers,axp2094$EZgpio2x-powers,axp209-gpiok{regulatorsdcdc2/vdd-cpu>RB@j`dcdc3 /vdd-int-dll>RB@j\ldo1>R j /vdd-rtcldo2/avcc>R-j-ldo3 /csi-1.8vRw@jw@ldo4 /csi-2.8vR*j*ldo5/ldo5 jdisabledusb_power_supply!2x-powers,axp202-usb-power-supply jdisabledi2c@01c2b0002allwinner,sun4i-a10-i2c°$c9 jdisabledUdefaultci2c@01c2b4002allwinner,sun4i-a10-i2c´$ c: jdisabledUdefaultctimer@01c600002allwinner,sun5i-a13-hstimer$RSc(lcd-controller@01c0c0002allwinner,sun5i-a13-tcon$,lcdc+Z\:ahbtcon-ch0tcon-ch1tcon-pixel-clock jdisabledportsport@0endpoint@0port@1pwm@01c20e002allwinner,sun5i-a13-pwm c jdisableddisplay-frontend@01e00000%2allwinner,sun5i-a13-display-frontend$/cYYT :ahbmodram jdisabledportsport@1endpoint@0display-backend@01e60000$2allwinner,sun5i-a13-display-backendc.XU :ahbmodram jdisabledXportsport@0endpoint@0port@1endpoint@0thermal-zonescpu_thermalcooling-mapsmap0 tripscpu_alert0 Lpassivecpu_crit  criticaldisplay-engine#2allwinner,sun5i-a13-display-engine!ahci-5v2regulator-fixedUdefaultc/ahci-5vRLK@jLK@5G  jdisabledusb0-vbus2regulator-fixedUdefaultc /usb0-vbusRLK@jLK@G  jokay  usb1-vbus2regulator-fixedUdefaultc /usb1-vbusRLK@jLK@5G  jdisabledusb2-vbus2regulator-fixedUdefaultc /usb2-vbusRLK@jLK@5G  jdisabledvcc3v02regulator-fixed/vcc3v0R-j-vcc3v32regulator-fixed/vcc3v3R2Zj2Zvcc5v02regulator-fixed/vcc5v0RLK@jLK@  leds 2gpio-ledsredlicheepi:red:usrZ greenlicheepi:green:usrZ `onbluelicheepi:blue:usrZ  #address-cells#size-cellsinterrupt-parentmodelcompatiblerangesstdout-pathallwinner,pipelineclocksstatusserial0device_typeregclock-latencyoperating-points#cooling-cellscooling-min-levelcooling-max-levelcpu-supplylinux,phandle#clock-cellsclock-frequencyclock-output-namesinterrupts#dma-cellsclock-namesdmasdma-namespinctrl-namespinctrl-0vmmc-supplybus-widthbroken-cdinterrupt-namesphysphy-namesextconallwinner,sramdr_mode#phy-cellsreg-namesresetsreset-namesusb0_id_det-gpiousb0_vbus_det-gpiousb0_vbus-supplyusb1_vbus-supply#reset-cellsinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellspinsfunctiondrive-strengthbias-pull-upvref-supplylabellinux,codechannelvoltage#sound-dai-cells#thermal-sensor-cellsreg-shiftreg-io-widthx-powers,dcdc-freqregulator-nameregulator-always-onregulator-min-microvoltregulator-max-microvoltremote-endpoint#pwm-cellsassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresisallwinner,pipelinesregulator-boot-onenable-active-highgpiosdefault-state