8( google,veyron-mickey-rev8google,veyron-mickey-rev7google,veyron-mickey-rev6google,veyron-mickey-rev5google,veyron-mickey-rev4google,veyron-mickey-rev3google,veyron-mickey-rev2google,veyron-mickey-rev1google,veyron-mickey-rev0google,veyron-mickeygoogle,veyronrockchip,rk3288&7Google Mickeyaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12hw@\@p@ @@OOa sB@ ~ ' 9 K 0 $@29EKcpu@501cpuarm,cortex-a12EKcpu@502cpuarm,cortex-a12EKcpu@503cpuarm,cortex-a12EKamba simple-busSdma-controller@ff250000arm,pl330arm,primecell%@Ze2 apb_pclkEKdma-controller@ff600000arm,pl330arm,primecell`@Ze2 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@Ze2 apb_pclkEVKVreserved-memorySdma-unusable@fe000000oscillator fixed-clockn6xin24mE K timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 2 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 2Drvbiuciuciu-driveciu-sample  @ disableddwmmc@ff0d0000rockchip,rk3288-dw-mshcр 2Eswbiuciuciu-driveciu-sample ! @okay!.D O]gdefault u dwmmc@ff0e0000rockchip,rk3288-dw-mshcр 2Ftxbiuciuciu-driveciu-sample "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 2Guybiuciuciu-driveciu-sample #@okayDO]gdefault usaradc@ff100000rockchip,saradc $2I[saradcapb_pclkW saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2ARspiclkapb_pclk&  +txrx ,gdefaultu disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BSspiclkapb_pclk& +txrx -gdefaultu disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CTspiclkapb_pclk&+txrx .gdefaultu !"okay5 flash@0jedec,spi-norHi2c@ff140000rockchip,rk3288-i2c >i2c2Mgdefaultu#okayZ2rdtpm@20infineon,slb9645tt i2c@ff150000rockchip,rk3288-i2c ?i2c2Ogdefaultu$ disabledi2c@ff160000rockchip,rk3288-i2c @i2c2Pgdefaultu% disabledZ2r,i2c@ff170000rockchip,rk3288-i2c Ai2c2Qgdefaultu&okayZ,rEgKgserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 72MUbaudclkapb_pclkgdefault u'()okayMlserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 82NVbaudclkapb_pclkgdefaultu*okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 92OWbaudclkapb_pclkgdefaultu+okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :2PXbaudclkapb_pclkgdefaultu, disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;2QYbaudclkapb_pclkgdefaultu- disabledthermal-zonesreserve_thermal.cpu_thermald.tripscpu_crit_ criticalcpu_alert_almost_warmpassivecpu_alert_warmpassiveE/K/cpu_alert_almost_hot8passiveE0K0cpu_alert_hot@PpassiveE1K1cpu_alert_hotterH passiveE2K2cpu_alert_very_hotLpassiveE3K3cooling-mapscpu_warm_limit_cpu(/ -cpu_almost_hot_limit_cpu(0 -cpu_hot_limit_cpu(1 -cpu_hotter_limit_cpu(2 -cpu_very_hot_limit_cpu(3 -gpu_thermald.tripsgpu_alert0ppassiveE4K4gpu_crit_ criticalcooling-mapsmap0(4 -tsadc@ff280000rockchip,rk3288-tsadc( %2HZtsadcapb_pclk tsadc-apbginitdefaultsleepu5<6F5Pfsokay}E.K.ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq782fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmaceth disabledusb@ff500000 generic-ehciP 2usbhost8usb disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2otghost9 usb2-phy disabledusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2otghost @@ : usb2-phyokayz):usb@ff5c0000 generic-ehci\ 2usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c2Lgdefaultu;okayZ2rdpmic@1brockchip,rk808xin32kwifibt_32kin&<gdefault u=>?@ao{@A AEtKtregulatorsDCDC_REG1vdd_arm q( @qEKregulator-state-memUDCDC_REG2vdd_gpu 5(@qregulator-state-memnB@DCDC_REG3 vcc135_ddrregulator-state-memnDCDC_REG4vcc_18w@(w@EKregulator-state-memnw@LDO_REG3vdd_10B@(B@regulator-state-memnB@LDO_REG7 vdd10_lcdB@(B@SWITCH_REG1 vcc33_lcdEUKUregulator-state-memULDO_REG8w@(w@ vcc18_lcdi2c@ff660000rockchip,rk3288-i2cf =i2c2NgdefaultuB disabledZ2r pwm@ff680000rockchip,rk3288-pwmhgdefaultuC2^pwm disabledpwm@ff680010rockchip,rk3288-pwmhgdefaultuD2^pwmokaypwm@ff680020rockchip,rk3288-pwmh gdefaultuE2^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0gdefaultuF2^pwm disabledbus_intmem@ff700000 mmio-sramp Spsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsEKpower-controller!rockchip,rk3288-power-controllerh) EYKYpd_vio@9 2chgfdehilkj$GHIJKLMNOpd_hevc@11 2opPQpd_video@12 2Rpd_gpu@13 2STreboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv7$Hjk$#gׄeрxhрxhEKsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwE7K7edp-phyrockchip,rk3288-dp-phy2h24m1 disabledEdKdio-domains"rockchip,rk3288-io-voltage-domainokay<@FQ_@o@}Uusbphyrockchip,rk3288-usb-phyokayusb-phy@3201 2]phyclkE:K:usb-phy@334142^phyclkE8K8usb-phy@3481H2_phyclkE9K9watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt2p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk2T&V+tx 6gdefaultuW7 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5&VV+txrxi2s_hclki2s_clki2s_clk_out2RqgdefaultuXokaycypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 2}aclkhclksclkapb_pclk crypto-rstokayvop@ff930000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopY def axiahbdclkZokayportE K endpoint@0[EhKhendpoint@1\EeKeendpoint@2]EbKbiommu@ff930300rockchip,iommu  vopb_mmuY okayEZKZvop@ff940000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vopY  axiahbdclk^ disabledportE K endpoint@0_EiKiendpoint@1`EfKfendpoint@2aEcKciommu@ff940300rockchip,iommu  vopl_mmuY  disabledE^K^mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 2~d refpclkY 7 disabledportsportendpoint@0bE]K]endpoint@1cEaKadp@ff970000rockchip,rk3288-dp@ b2icdppclkddpodp7 disabledportsport@0endpoint@0eE\K\endpoint@1fE`K`hdmi@ff980000rockchip,rk3288-dw-hdmi7 g2hm iahbisfrY okay gportsportendpoint@0hE[K[endpoint@1iE_K_qos@ffaa0000syscon ESKSqos@ffaa0080syscon ETKTqos@ffad0000syscon EHKHqos@ffad0100syscon EIKIqos@ffad0180syscon EJKJqos@ffad0400syscon EKKKqos@ffad0480syscon ELKLqos@ffad0500syscon EGKGqos@ffad0800syscon EMKMqos@ffad0880syscon ENKNqos@ffad0900syscon EOKOqos@ffae0000syscon ERKRqos@ffaf0000syscon EPKPqos@ffaf0080syscon EQKQinterrupt-controller@ffc01000 arm,gic-400.  @ `   EKefuse@ffb40000rockchip,rk3288-efuse 2q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl7Sgdefaultsleepuj<jgpio0@ff750000rockchip,gpio-banku Q2@?O.E<K<gpio1@ff780000rockchip,gpio-bankx R2A?O.gpio2@ff790000rockchip,gpio-banky S2B?O.EsKsgpio3@ff7a0000rockchip,gpio-bankz T2C?O.gpio4@ff7b0000rockchip,gpio-bank{ U2D?O.EwKwgpio5@ff7c0000rockchip,gpio-bank| V2E?O.gpio6@ff7d0000rockchip,gpio-bank} W2F?O.gpio7@ff7e0000rockchip,gpio-bank~ X2G?O.EAKAgpio8@ff7f0000rockchip,gpio-bank Y2H?O.hdmihdmi-ddc [kkpower-hdmi-on[ kEyKypcfg-pull-upiElKlpcfg-pull-downvEmKmpcfg-pull-noneEkKkpcfg-pull-none-12ma EoKosleepglobal-pwroff[kEjKjddrio-pwroff[kddr0-retention[lddr1-retention[ledpedp-hpd[ mi2c0i2c0-xfer [kkE;K;i2c1i2c1-xfer [kkE#K#i2c2i2c2-xfer [ k kEBKBi2c3i2c3-xfer [kkE$K$i2c4i2c4-xfer [kkE%K%i2c5i2c5-xfer [kkE&K&i2s0i2s0-bus`[kkkkkkEXKXsdmmcsdmmc-clk[ksdmmc-cmd[lsdmmc-cd[lsdmmc-bus1[lsdmmc-bus4@[llllsdio0sdio0-bus1[lsdio0-bus4@[nnnnEKsdio0-cmd[nEKsdio0-clk[nE K sdio0-cd[lsdio0-wp[lsdio0-pwr[lsdio0-bkpwr[lsdio0-int[lwifienable-h[kEvKvbt-enable-l[kEuKusdio1sdio1-bus1[lsdio1-bus4@[llllsdio1-cd[lsdio1-wp[lsdio1-bkpwr[lsdio1-int[lsdio1-cmd[lsdio1-clk[ksdio1-pwr[ lemmcemmc-clk[nEKemmc-cmd[nEKemmc-pwr[ lemmc-bus1[lemmc-bus4@[llllemmc-bus8[nnnnnnnnEKemmc-reset[ kErKrspi0spi0-clk[ lEKspi0-cs0[ lEKspi0-tx[lEKspi0-rx[lEKspi0-cs1[lspi1spi1-clk[ lEKspi1-cs0[ lEKspi1-rx[lEKspi1-tx[lEKspi2spi2-cs1[lspi2-clk[lEKspi2-cs0[lE"K"spi2-rx[lE!K!spi2-tx[ lE K uart0uart0-xfer [lkE'K'uart0-cts[lE(K(uart0-rts[kE)K)uart1uart1-xfer [l kE*K*uart1-cts[ luart1-rts[ kuart2uart2-xfer [lkE+K+uart3uart3-xfer [lkE,K,uart3-cts[ luart3-rts[ kuart4uart4-xfer [ l kE-K-uart4-cts[luart4-rts[ktsadcotp-gpio[ kE5K5otp-out[ kE6K6pwm0pwm0-pin[kECKCpwm1pwm1-pin[kEDKDpwm2pwm2-pin[kEEKEpwm3pwm3-pin[kEFKFgmacrgmii-pins[kkkkooookkk ookkrmii-pins[kkkkkkkkkkspdifspdif-tx[ kEWKWpcfg-pull-none-drv-8maEnKnpcfg-pull-up-drv-8maipcfg-output-highpcfg-output-lowbuttonspwr-key-l[lEpKppmicpmic-int-l[lE=K=dvs-1[ mE>K>dvs-2[mE?K?rebootap-warm-reset-h[ kEqKqrecovery-switchrec-mode-l[ ltpmtpm-int-h[kwrite-protectfw-wp-ap[kmemory@0memorygpio-keys gpio-keysgdefaultuppowerPower <tdagpio-restart gpio-restart < gdefaultuqemmc-pwrseqmmc-pwrseq-emmcurgdefault s EKsdio-pwrseqmmc-pwrseq-simple2t ext_clockgdefaultuuv wE K vcc-5vregulator-fixedvcc_5vLK@(LK@ExKxvcc33-sysregulator-fixed vcc33_sys2Z(2ZEKvcc50-hdmiregulator-fixed vcc50_hdmix A gdefaultuyvcc33_ioregulator-fixed vcc33_ioE@K@ #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablenum-slotspinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplycap-mmc-highspeedrockchip,default-sample-phasedisable-wp#io-channel-cellsreset-namesdmasdma-namesrx-sample-delay-nsspi-max-frequencyi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedreg-shiftreg-io-widthassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphysphy-namesneeds-reset-on-resumedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clock-parentsrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc7-supplyvcc8-supplyvddio-supplydvs-gpiosvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltregulator-suspend-mem-disabled#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cells#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowlabellinux,codedebounce-intervalpriorityreset-gpiosvin-supplyenable-active-highgpio