8(Lhmqmaker,miqirockchip,rk3288& 7mqmaker MiQialiases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12`@p@ @OOa sB@ ~ ' 9  K 0 $@29EKcpu@501cpuarm,cortex-a12EKcpu@502cpuarm,cortex-a12EKcpu@503cpuarm,cortex-a12EKamba simple-busSdma-controller@ff250000arm,pl330arm,primecell%@Ze2 apb_pclkEKdma-controller@ff600000arm,pl330arm,primecell`@Ze2 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@Ze2 apb_pclkEXKXreserved-memorySdma-unusable@fe000000oscillator fixed-clockn6xin24mE K timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 2 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 2Drvbiuciuciu-driveciu-sample  @okay"3EPZdefaulth r~dwmmc@ff0d0000rockchip,rk3288-dw-mshcр 2Eswbiuciuciu-driveciu-sample ! @ disableddwmmc@ff0e0000rockchip,rk3288-dw-mshcр 2Ftxbiuciuciu-driveciu-sample "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 2Guybiuciuciu-driveciu-sample #@okayEPZdefaulthr~saradc@ff100000rockchip,saradc $2I[saradcapb_pclkW saradc-apbokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2ARspiclkapb_pclk  txrx ,Zdefaulth disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BSspiclkapb_pclk txrx -Zdefaulth ! disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CTspiclkapb_pclktxrx .Zdefaulth"#$% disabledi2c@ff140000rockchip,rk3288-i2c >i2c2MZdefaulth&okayi2c@ff150000rockchip,rk3288-i2c ?i2c2OZdefaulth' disabledi2c@ff160000rockchip,rk3288-i2c @i2c2PZdefaulth(okayi2c@ff170000rockchip,rk3288-i2c Ai2c2QZdefaulth)okayEiKiserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 72MUbaudclkapb_pclkZdefaulth* disabledserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 82NVbaudclkapb_pclkZdefaulth+ disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 92OWbaudclkapb_pclkZdefaulth,okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :2PXbaudclkapb_pclkZdefaulth-okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;2QYbaudclkapb_pclkZdefaulth. disabledthermal-zonesreserve_thermal /cpu_thermald /tripscpu_alert0p)passiveE0K0cpu_alert1$)passiveE1K1cpu_crit_) criticalcooling-mapsmap040 9map141 9gpu_thermald /tripsgpu_alert0p)passiveE2K2gpu_crit_) criticalcooling-mapsmap042 9tsadc@ff280000rockchip,rk3288-tsadc( %2HZtsadcapb_pclk tsadc-apbZinitdefaultsleeph3H4R3\rsokayE/K/ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq582fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmacethok6inputZdefaulth789: ;rgmii  6'B@ K<[0dusb@ff500000 generic-ehciP 2usbhostm=rusb disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2otg|hostm> rusb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2otg |peripheral@@ m? rusb2-phyokayusb@ff5c0000 generic-ehci\ 2usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c2LZdefaulth@okaysyr827@40silergy,syr827@vdd_cpu Pp$6,R@gAEKsyr828@41silergy,syr828Avdd_gpu PpgAhym8563@51haoyu,hym8563Qxin32kact8846@5aactive-semi,act8846ZZdefaulthBrAAAAAACregulatorsREG1vcc_ddrREG2vcc_io2Z2ZEKREG3vdd_logREG4vcc_20ECKCREG5 vccio_sd2Z2ZEKREG6 vdd10_lcdB@B@REG7vcca_18w@w@REG8vcca_332Z2ZEWKWREG9vcc_lan2Z2ZE;K;REG10vdd_10B@B@REG11vcc_18w@w@EKREG12 vcc18_lcdw@w@i2c@ff660000rockchip,rk3288-i2cf =i2c2NZdefaulthDokaypwm@ff680000rockchip,rk3288-pwmhZdefaulthE2^pwm disabledpwm@ff680010rockchip,rk3288-pwmhZdefaulthF2^pwm disabledpwm@ff680020rockchip,rk3288-pwmh ZdefaulthG2^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0ZdefaulthH2^pwm disabledbus_intmem@ff700000 mmio-sramp Spsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsEKpower-controller!rockchip,rk3288-power-controllerh E[K[pd_vio@9 2chgfdehilkj$IJKLMNOPQpd_hevc@11 2opRSpd_video@12 2Tpd_gpu@13 2UVreboot-modesyscon-reboot-modeRBRB!RB 1RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv5=Hjk$J#gׄeрxhрxhEKsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwE5K5edp-phyrockchip,rk3288-dp-phy2h24m_ disabledEfKfio-domains"rockchip,rk3288-io-voltage-domainokayjWw;usbphyrockchip,rk3288-usb-phyokayusb-phy@320_ 2]phyclkE?K?usb-phy@334_42^phyclkE=K=usb-phy@348_H2_phyclkE>K>watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt2p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk2TXtx 6ZdefaulthY5 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5XXtxrxi2s_hclki2s_clk2RZdefaulthZ disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 2}aclkhclksclkapb_pclk crypto-rstokayvop@ff930000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vop[ def axiahbdclk+\okayportE K endpoint@02]EjKjendpoint@12^EgKgendpoint@22_EdKdiommu@ff930300rockchip,iommu  vopb_mmu[ BokayE\K\vop@ff940000rockchip,rk3288-vop 2aclk_vopdclk_vophclk_vop[  axiahbdclk+`okayportE K endpoint@02aEkKkendpoint@12bEhKhendpoint@22cEeKeiommu@ff940300rockchip,iommu  vopl_mmu[ BokayE`K`mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 2~d refpclk[ 5 disabledportsportendpoint@02dE_K_endpoint@12eEcKcdp@ff970000rockchip,rk3288-dp@ b2icdppclkmfrdpodp5 disabledportsport@0endpoint@02gE^K^endpoint@12hEbKbhdmi@ff980000rockchip,rk3288-dw-hdmi5 g2hm iahbisfr[ okayOiportsportendpoint@02jE]K]endpoint@12kEaKaqos@ffaa0000syscon EUKUqos@ffaa0080syscon EVKVqos@ffad0000syscon EJKJqos@ffad0100syscon EKKKqos@ffad0180syscon ELKLqos@ffad0400syscon EMKMqos@ffad0480syscon ENKNqos@ffad0500syscon EIKIqos@ffad0800syscon EOKOqos@ffad0880syscon EPKPqos@ffad0900syscon EQKQqos@ffae0000syscon ETKTqos@ffaf0000syscon ERKRqos@ffaf0080syscon ESKSinterrupt-controller@ffc01000 arm,gic-400[p  @ `   EKefuse@ffb40000rockchip,rk3288-efuse 2q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl5Sgpio0@ff750000rockchip,gpio-banku Q2@[pEuKugpio1@ff780000rockchip,gpio-bankx R2A[pgpio2@ff790000rockchip,gpio-banky S2B[pgpio3@ff7a0000rockchip,gpio-bankz T2C[pgpio4@ff7b0000rockchip,gpio-bank{ U2D[pE<K<gpio5@ff7c0000rockchip,gpio-bank| V2E[pgpio6@ff7d0000rockchip,gpio-bank} W2F[pgpio7@ff7e0000rockchip,gpio-bank~ X2G[pEsKsgpio8@ff7f0000rockchip,gpio-bank Y2H[phdmihdmi-ddc llpcfg-pull-upEmKmpcfg-pull-downEnKnpcfg-pull-noneElKlpcfg-pull-none-12ma EoKosleepglobal-pwrofflddrio-pwrofflddr0-retentionmddr1-retentionmedpedp-hpd ni2c0i2c0-xfer llE@K@i2c1i2c1-xfer llE&K&i2c2i2c2-xfer  l lEDKDi2c3i2c3-xfer llE'K'i2c4i2c4-xfer llE(K(i2c5i2c5-xfer llE)K)i2s0i2s0-bus`llllllEZKZsdmmcsdmmc-clkoE K sdmmc-cmdpE K sdmmc-cdmEKsdmmc-bus1msdmmc-bus4@ppppEKsdmmc-pwr lEwKwsdio0sdio0-bus1msdio0-bus4@mmmmsdio0-cmdmsdio0-clklsdio0-cdmsdio0-wpmsdio0-pwrmsdio0-bkpwrmsdio0-intmsdio1sdio1-bus1msdio1-bus4@mmmmsdio1-cdmsdio1-wpmsdio1-bkpwrmsdio1-intmsdio1-cmdmsdio1-clklsdio1-pwr memmcemmc-clklEKemmc-cmdmEKemmc-pwr mEKemmc-bus1memmc-bus4@mmmmemmc-bus8mmmmmmmmEKspi0spi0-clk mEKspi0-cs0 mEKspi0-txmEKspi0-rxmEKspi0-cs1mspi1spi1-clk mEKspi1-cs0 mE!K!spi1-rxmE K spi1-txmEKspi2spi2-cs1mspi2-clkmE"K"spi2-cs0mE%K%spi2-rxmE$K$spi2-tx mE#K#uart0uart0-xfer mlE*K*uart0-ctsmuart0-rtsluart1uart1-xfer m lE+K+uart1-cts muart1-rts luart2uart2-xfer mlE,K,uart3uart3-xfer mlE-K-uart3-cts muart3-rts luart4uart4-xfer  m lE.K.uart4-ctsmuart4-rtsltsadcotp-gpio lE3K3otp-out lE4K4pwm0pwm0-pinlEEKEpwm1pwm1-pinlEFKFpwm2pwm2-pinlEGKGpwm3pwm3-pinlEHKHgmacrgmii-pinslllloooolll oollE7K7rmii-pinsllllllllllphy-int mE:K:phy-pmebmE9K9phy-rstqE8K8spdifspdif-tx lEYKYpcfg-output-highEqKqpcfg-output-lowErKrpcfg-pull-up-drv-12ma EpKpact8846pmic-intmpmic-sleeprpmic-vselrEBKBledsled-ctllEtKtusb_hosthost-vbus-drvlEvKvchosenserial2:115200n8memory@0memoryexternal-gmac-clock fixed-clocksY@ ext_gmacE6K6leds gpio-ledswork s miqi:green:user default-onZdefaulthtflash-regulatorregulator-fixed vcc_flashw@w@gEKusb-host-regulatorregulator-fixed( VuZdefaulthv vcc_hostLK@LK@gAsdmmc-regulatorregulator-fixed Vs Zdefaulthwvcc_sd2Z2Z;gEKvsys-regulatorregulator-fixedvcc_sysLK@LK@$EAKA #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wpnum-slotspinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsreset-namesvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplysystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowstdout-pathgpioslabellinux,default-triggerenable-active-highstartup-delay-us