8( Hgumstix,omap3-overo-chestnut43gumstix,omap3-overoti,omap3430ti,omap3 +%7OMAP35xx Gumstix Overo on Chestnut43chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000 d/displaycpus+cpu@0arm,cortex-a8mcpuy}cpu(HАg8 Odp` 'ppmu@54000000arm,cortex-a8-pmuyTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-busyh +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-busy + pinmux@30 ti,omap3-padconfpinctrl-singley08+;defaultISYpinmux_uart2_pins a<>@BSYpinmux_i2c1_pinsaSYpinmux_mmc1_pins0aSYpinmux_mmc2_pins0a(*,.02SYpinmux_w3cbw003c_pinsalSYpinmux_hsusb2_pins@a      SYpinmux_twl4030_pinsaASYpinmux_i2c3_pinsaSYpinmux_uart3_pinsanpSYpinmux_dss_dpi_pinsaSYpinmux_lte430_pinsaDSYpinmux_backlight_pinsaFSYpinmux_mcspi1_pins aSYpinmux_ads7846_pinsa SYscm_conf@270sysconsimple-busyp0+ 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regulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0SYregulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5SYregulator-vusb1v8ti,twl4030-vusb1v8SYregulator-vusb3v1ti,twl4030-vusb3v1SYregulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@4regulator-vsimti,twl4030-vsimw@-gpioti,twl4030-gpioHtwl4030-usbti,twl4030-usb Tbp~SYpwmti,twl4030-pwmpwmledti,twl4030-pwmledS Y pwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadmadcti,twl4030-madci2c@48072000 ti,omap3-i2cyH 9txrx+i2c2 disabledi2c@48060000 ti,omap3-i2cyH=txrx+i2c3;defaultIeeprom@51 atmel,24c01yQlis33de@1dst,lis33dest,lis3lv02dy 1 C U guxx &&( disabledmailbox@48094000ti,omap3-mailboxmailboxyH @7CUdsp g rspi@48098000ti,omap2-mcspiyH A+mcspi1}@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3;defaultIads7846@0;defaultI ti,ads7846y`  spi@4809a000ti,omap2-mcspiyH B+mcspi2} +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiyH [+mcspi3} tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiyH 0+mcspi4}FGtx0rx01w@480b2000 ti,omap3-1wyH :hdq1wmmc@4809c000ti,omap3-hsmmcyH Smmc1=>txrx;defaultI!-mmc@480b4000ti,omap3-hsmmcyH @Vmmc2/0txrx;defaultI!7D-Tammc@480ad000ti,omap3-hsmmcyH ^mmc3MNtxrx disabledmmu@480bd400oti,omap2-iommuyH mmu_isp|S Y mmu@5d000000oti,omap2-iommuy]mmu_iva disabledwdt@48314000 ti,omap3-wdtyH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspyH@mpu ;< commontxrxmcbsp1 txrx}fck disabledmcbsp@49022000ti,omap3-mcbspyI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrx}fckickokayS Y mcbsp@49024000ti,omap3-mcbspyI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrx}fckick disabledmcbsp@49026000ti,omap3-mcbspyI`mpu 67 commontxrxmcbsp4txrx}fck disabledmcbsp@48096000ti,omap3-mcbspyH `mpu QR commontxrxmcbsp5txrx}fck disabledsham@480c3000ti,omap3-shamshamyH 0d1Erxsmartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_coreyH 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compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2display0device_typeregclocksclock-namesclock-latencyoperating-pointsinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0linux,phandlepinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyregulator-always-onti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cellsstatuspagesizeVdd-supplyVdd_IO-supplyst,click-single-xst,click-single-yst,click-single-zst,click-thresh-xst,click-thresh-yst,click-thresh-zst,irq1-clickst,irq2-clickst,wakeup-x-lost,wakeup-x-hist,wakeup-y-lost,wakeup-y-hist,wakeup-z-lost,wakeup-z-hist,min-limit-xst,min-limit-yst,min-limit-zst,max-limit-xst,max-limit-yst,max-limit-z#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxwakeup-sourceti,dual-voltpbias-supplyvmmc-supplybus-widthvqmmc-supplyvmmc_aux-supplycap-sdio-irqnon-removable#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport2-modephysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelbank-widthgpmc,mux-add-datagpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsenvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowerremote-endpointdata-linesiommusti,phy-type#thermal-sensor-cellspwmsmax-brightnesslinux,default-triggerti,modelti,mcbspstartup-delay-usenable-active-highreset-gpiosenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-activedefault-onlinux,code