e8(i/isee,omap3-igep0030-rev-gti,omap36xxti,omap3 +*7IGEP COM MODULE Rev. G (TI OMAP AM/DM37x)chosen=/ocp@68000000/serial@49020000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/serial@4806a000`/ocp@68000000/serial@4806c000h/ocp@68000000/serial@49020000p/ocp@68000000/serial@49042000cpus+cpu@0arm,cortex-a8xcpucpus 'O 57pmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+ )FdefaultTpinmux_uart1_pins^RLrxpinmux_uart3_pins^nprxpinmux_mcbsp2_pins ^ rxpinmux_mmc1_pins0^rxpinmux_mmc2_pins0^(*,.02rxpinmux_i2c1_pins^rxpinmux_i2c3_pins^rxpinmux_twl4030_pins^Arxpinmux_hsusb2_pins0^      rxpinmux_uart2_pins ^<>@Brxpinmux_lbep5clwmc_pins^46:rxpinmux_leds_pins^rxscm_conf@270sysconsimple-busp0+ p0rxpbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-rxclocks+mcbsp5_mux_fck@68ti,composite-mux-clockhrxmcbsp5_fckti,composite-clockrxmcbsp1_mux_fck@4ti,composite-mux-clockr x mcbsp1_fckti,composite-clock rxmcbsp2_mux_fck@4ti,composite-mux-clock r x mcbsp2_fckti,composite-clock rxmcbsp3_mux_fck@68ti,composite-mux-clock hrxmcbsp3_fckti,composite-clockrxmcbsp4_mux_fck@68ti,composite-mux-clock hrxmcbsp4_fckti,composite-clockrxclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+ )pinmux_twl4030_vpins ^rxaes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYrxosc_sys_ck@d40 ti,mux-clock @rxsys_ck@1270ti,divider-clockp rxsys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock!,dpll3_m2x2_ckfixed-factor-clock!,rxdpll4_x2_ckfixed-factor-clock!,corex2_fckfixed-factor-clock!,rxwkup_l4_ickfixed-factor-clock!,rNxNcorex2_d3_fckfixed-factor-clock!,rxcorex2_d5_fckfixed-factor-clock!,rxclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockr@x@virt_12m_ck fixed-clockrxvirt_13m_ck fixed-clock]@rxvirt_19200000_ck fixed-clock$rxvirt_26000000_ck fixed-clockrxvirt_38_4m_ck fixed-clockIrxdpll4_ck@d00ti,omap3-dpll-per-j-type-clock D 0rxdpll4_m2_ck@d48ti,divider-clock? H r x dpll4_m2x2_mul_ckfixed-factor-clock !,r!x!dpll4_m2x2_ck@d00ti,hsdiv-gate-clock! 6r"x"omap_96m_alwon_fckfixed-factor-clock"!,r)x)dpll3_ck@d00ti,omap3-dpll-core-clock @ 0rxdpll3_m3_ck@1140ti,divider-clock@ r#x#dpll3_m3x2_mul_ckfixed-factor-clock#!,r$x$dpll3_m3x2_ck@d00ti,hsdiv-gate-clock$  6r%x%emu_core_alwon_ckfixed-factor-clock%!,rbxbsys_altclk fixed-clockr.x.mcbsp_clks fixed-clockrxdpll3_m2_ck@d40ti,divider-clock @ rxcore_ckfixed-factor-clock!,r&x&dpll1_fck@940ti,divider-clock& @ r'x'dpll1_ck@904ti,omap3-dpll-clock'  $ @ 4rxdpll1_x2_ckfixed-factor-clock!,r(x(dpll1_x2m2_ck@944ti,divider-clock( D r<x<cm_96m_fckfixed-factor-clock)!,r*x*omap_96m_fck@d40 ti,mux-clock* @rExEdpll4_m3_ck@e40ti,divider-clock @ r+x+dpll4_m3x2_mul_ckfixed-factor-clock+!,r,x,dpll4_m3x2_ck@d00ti,hsdiv-gate-clock, 6r-x-omap_54m_fck@d40 ti,mux-clock-. @r8x8cm_96m_d2_fckfixed-factor-clock*!,r/x/omap_48m_fck@d40 ti,mux-clock/. @r0x0omap_12m_fckfixed-factor-clock0!,rGxGdpll4_m4_ck@e40ti,divider-clock @ r1x1dpll4_m4x2_mul_ckti,fixed-factor-clock1LZgr2x2dpll4_m4x2_ck@d00ti,gate-clock2 6grxdpll4_m5_ck@f40ti,divider-clock?@ r3x3dpll4_m5x2_mul_ckti,fixed-factor-clock3LZgr4x4dpll4_m5x2_ck@d00ti,hsdiv-gate-clock4 6grjxjdpll4_m6_ck@1140ti,divider-clock?@ r5x5dpll4_m6x2_mul_ckfixed-factor-clock5!,r6x6dpll4_m6x2_ck@d00ti,hsdiv-gate-clock6 6r7x7emu_per_alwon_ckfixed-factor-clock7!,rcxcclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock& pr9x9clkout2_src_mux_ck@d70ti,composite-mux-clock&*8 pr:x:clkout2_src_ckti,composite-clock9:r;x;sys_clkout2@d70ti,divider-clock;@ pzmpu_ckfixed-factor-clock<!,r=x=arm_fck@924ti,divider-clock= $emu_mpu_alwon_ckfixed-factor-clock=!,rdxdl3_ick@a40ti,divider-clock& @ r>x>l4_ick@a40ti,divider-clock> @ r?x?rm_ick@c40ti,divider-clock? @ gpt10_gate_fck@a00ti,composite-gate-clock  rAxAgpt10_mux_fck@a40ti,composite-mux-clock@ @rBxBgpt10_fckti,composite-clockABgpt11_gate_fck@a00ti,composite-gate-clock  rCxCgpt11_mux_fck@a40ti,composite-mux-clock@ @rDxDgpt11_fckti,composite-clockCDcore_96m_fckfixed-factor-clockE!,rxmmchs2_fck@a00ti,wait-gate-clock rxmmchs1_fck@a00ti,wait-gate-clock rxi2c3_fck@a00ti,wait-gate-clock rxi2c2_fck@a00ti,wait-gate-clock rxi2c1_fck@a00ti,wait-gate-clock rxmcbsp5_gate_fck@a00ti,composite-gate-clock  rxmcbsp1_gate_fck@a00ti,composite-gate-clock  r x core_48m_fckfixed-factor-clock0!,rFxFmcspi4_fck@a00ti,wait-gate-clockF rxmcspi3_fck@a00ti,wait-gate-clockF rxmcspi2_fck@a00ti,wait-gate-clockF rxmcspi1_fck@a00ti,wait-gate-clockF rxuart2_fck@a00ti,wait-gate-clockF rxuart1_fck@a00ti,wait-gate-clockF  rxcore_12m_fckfixed-factor-clockG!,rHxHhdq_fck@a00ti,wait-gate-clockH rxcore_l3_ickfixed-factor-clock>!,rIxIsdrc_ick@a10ti,wait-gate-clockI rxgpmc_fckfixed-factor-clockI!,core_l4_ickfixed-factor-clock?!,rJxJmmchs2_ick@a10ti,omap3-interface-clockJ rxmmchs1_ick@a10ti,omap3-interface-clockJ rxhdq_ick@a10ti,omap3-interface-clockJ rxmcspi4_ick@a10ti,omap3-interface-clockJ rxmcspi3_ick@a10ti,omap3-interface-clockJ rxmcspi2_ick@a10ti,omap3-interface-clockJ rxmcspi1_ick@a10ti,omap3-interface-clockJ rxi2c3_ick@a10ti,omap3-interface-clockJ rxi2c2_ick@a10ti,omap3-interface-clockJ rxi2c1_ick@a10ti,omap3-interface-clockJ rxuart2_ick@a10ti,omap3-interface-clockJ rxuart1_ick@a10ti,omap3-interface-clockJ  rxgpt11_ick@a10ti,omap3-interface-clockJ  rxgpt10_ick@a10ti,omap3-interface-clockJ  rxmcbsp5_ick@a10ti,omap3-interface-clockJ  rxmcbsp1_ick@a10ti,omap3-interface-clockJ  rxomapctrl_ick@a10ti,omap3-interface-clockJ rxdss_tv_fck@e00ti,gate-clock8rxdss_96m_fck@e00ti,gate-clockErxdss2_alwon_fck@e00ti,gate-clockrxdummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock rKxKgpt1_mux_fck@c40ti,composite-mux-clock@ @rLxLgpt1_fckti,composite-clockKLaes2_ick@a10ti,omap3-interface-clockJ rxwkup_32k_fckfixed-factor-clock@!,rMxMgpio1_dbck@c00ti,gate-clockM rxsha12_ick@a10ti,omap3-interface-clockJ rxwdt2_fck@c00ti,wait-gate-clockM rxwdt2_ick@c10ti,omap3-interface-clockN rxwdt1_ick@c10ti,omap3-interface-clockN rxgpio1_ick@c10ti,omap3-interface-clockN rxomap_32ksync_ick@c10ti,omap3-interface-clockN rxgpt12_ick@c10ti,omap3-interface-clockN rxgpt1_ick@c10ti,omap3-interface-clockN rxper_96m_fckfixed-factor-clock)!,r x per_48m_fckfixed-factor-clock0!,rOxOuart3_fck@1000ti,wait-gate-clockO rxgpt2_gate_fck@1000ti,composite-gate-clockrPxPgpt2_mux_fck@1040ti,composite-mux-clock@@rQxQgpt2_fckti,composite-clockPQgpt3_gate_fck@1000ti,composite-gate-clockrRxRgpt3_mux_fck@1040ti,composite-mux-clock@@rSxSgpt3_fckti,composite-clockRSgpt4_gate_fck@1000ti,composite-gate-clockrTxTgpt4_mux_fck@1040ti,composite-mux-clock@@rUxUgpt4_fckti,composite-clockTUgpt5_gate_fck@1000ti,composite-gate-clockrVxVgpt5_mux_fck@1040ti,composite-mux-clock@@rWxWgpt5_fckti,composite-clockVWgpt6_gate_fck@1000ti,composite-gate-clockrXxXgpt6_mux_fck@1040ti,composite-mux-clock@@rYxYgpt6_fckti,composite-clockXYgpt7_gate_fck@1000ti,composite-gate-clockrZxZgpt7_mux_fck@1040ti,composite-mux-clock@@r[x[gpt7_fckti,composite-clockZ[gpt8_gate_fck@1000ti,composite-gate-clock r\x\gpt8_mux_fck@1040ti,composite-mux-clock@@r]x]gpt8_fckti,composite-clock\]gpt9_gate_fck@1000ti,composite-gate-clock r^x^gpt9_mux_fck@1040ti,composite-mux-clock@@r_x_gpt9_fckti,composite-clock^_per_32k_alwon_fckfixed-factor-clock@!,r`x`gpio6_dbck@1000ti,gate-clock`rxgpio5_dbck@1000ti,gate-clock`rxgpio4_dbck@1000ti,gate-clock`rxgpio3_dbck@1000ti,gate-clock`rxgpio2_dbck@1000ti,gate-clock` rxwdt3_fck@1000ti,wait-gate-clock` rxper_l4_ickfixed-factor-clock?!,raxagpio6_ick@1010ti,omap3-interface-clockarxgpio5_ick@1010ti,omap3-interface-clockarxgpio4_ick@1010ti,omap3-interface-clockarxgpio3_ick@1010ti,omap3-interface-clockarxgpio2_ick@1010ti,omap3-interface-clocka rxwdt3_ick@1010ti,omap3-interface-clocka rxuart3_ick@1010ti,omap3-interface-clocka rxuart4_ick@1010ti,omap3-interface-clockarxgpt9_ick@1010ti,omap3-interface-clocka rxgpt8_ick@1010ti,omap3-interface-clocka rxgpt7_ick@1010ti,omap3-interface-clockarxgpt6_ick@1010ti,omap3-interface-clockarxgpt5_ick@1010ti,omap3-interface-clockarxgpt4_ick@1010ti,omap3-interface-clockarxgpt3_ick@1010ti,omap3-interface-clockarxgpt2_ick@1010ti,omap3-interface-clockarxmcbsp2_ick@1010ti,omap3-interface-clockarxmcbsp3_ick@1010ti,omap3-interface-clockarxmcbsp4_ick@1010ti,omap3-interface-clockarxmcbsp2_gate_fck@1000ti,composite-gate-clockr x mcbsp3_gate_fck@1000ti,composite-gate-clockrxmcbsp4_gate_fck@1000ti,composite-gate-clockrxemu_src_mux_ck@1140 ti,mux-clockbcd@rexeemu_src_ckti,clkdm-gate-clockerfxfpclk_fck@1140ti,divider-clockf@ pclkx2_fck@1140ti,divider-clockf@ atclk_fck@1140ti,divider-clockf@ traceclk_src_fck@1140 ti,mux-clockbcd@rgxgtraceclk_fck@1140ti,divider-clockg @ secure_32k_fck fixed-clockrhxhgpt12_fckfixed-factor-clockh!,wdt1_fckfixed-factor-clockh!,security_l4_ick2fixed-factor-clock?!,rixiaes1_ick@a14ti,omap3-interface-clocki rng_ick@a14ti,omap3-interface-clocki sha11_ick@a14ti,omap3-interface-clocki des1_ick@a14ti,omap3-interface-clocki cam_mclk@f00ti,gate-clockjgcam_ick@f10!ti,omap3-no-wait-interface-clock?rxcsi2_96m_fck@f00ti,gate-clockrxsecurity_l3_ickfixed-factor-clock>!,rkxkpka_ick@a14ti,omap3-interface-clockk icr_ick@a10ti,omap3-interface-clockJ des2_ick@a10ti,omap3-interface-clockJ mspro_ick@a10ti,omap3-interface-clockJ mailboxes_ick@a10ti,omap3-interface-clockJ ssi_l4_ickfixed-factor-clock?!,rrxrsr1_fck@c00ti,wait-gate-clock sr2_fck@c00ti,wait-gate-clock sr_l4_ickfixed-factor-clock?!,dpll2_fck@40ti,divider-clock&@ rlxldpll2_ck@4ti,omap3-dpll-clockl$@4rmxmdpll2_m2_ck@44ti,divider-clockmD rnxniva2_ck@0ti,wait-gate-clocknrxmodem_fck@a00ti,omap3-interface-clock rxsad2d_ick@a10ti,omap3-interface-clock> rxmad2d_ick@a18ti,omap3-interface-clock> rxmspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock roxossi_ssr_div_fck_3430es2@a40ti,composite-divider-clock @$rpxpssi_ssr_fck_3430es2ti,composite-clockoprqxqssi_sst_fck_3430es2fixed-factor-clockq!,rxhsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockI rxssi_ick_3430es2@a10ti,omap3-ssi-interface-clockr rxusim_gate_fck@c00ti,composite-gate-clockE  r}x}sys_d2_ckfixed-factor-clock!,rtxtomap_96m_d2_fckfixed-factor-clockE!,ruxuomap_96m_d4_fckfixed-factor-clockE!,rvxvomap_96m_d8_fckfixed-factor-clockE!,rwxwomap_96m_d10_fckfixed-factor-clockE!, rxxxdpll5_m2_d4_ckfixed-factor-clocks!,ryxydpll5_m2_d8_ckfixed-factor-clocks!,rzxzdpll5_m2_d16_ckfixed-factor-clocks!,r{x{dpll5_m2_d20_ckfixed-factor-clocks!,r|x|usim_mux_fck@c40ti,composite-mux-clock(tuvwxyz{| @ r~x~usim_fckti,composite-clock}~usim_ick@c10ti,omap3-interface-clockN  rxdpll5_ck@d04ti,omap3-dpll-clock  $ L 4rxdpll5_m2_ck@d50ti,divider-clock P rsxssgx_gate_fck@b00ti,composite-gate-clock& rxcore_d3_ckfixed-factor-clock&!,rxcore_d4_ckfixed-factor-clock&!,rxcore_d6_ckfixed-factor-clock&!,rxomap_192m_alwon_fckfixed-factor-clock"!,rxcore_d2_ckfixed-factor-clock&!,rxsgx_mux_fck@b40ti,composite-mux-clock * @rxsgx_fckti,composite-clocksgx_ick@b10ti,wait-gate-clock> rxcpefuse_fck@a08ti,gate-clock rxts_fck@a08ti,gate-clock@ rxusbtll_fck@a08ti,wait-gate-clocks rxusbtll_ick@a18ti,omap3-interface-clockJ rxmmchs3_ick@a10ti,omap3-interface-clockJ rxmmchs3_fck@a00ti,wait-gate-clock rxdss1_alwon_fck_3430es2@e00ti,dss-gate-clockgrxdss_ick_3430es2@e10ti,omap3-dss-interface-clock?rxusbhost_120m_fck@1400ti,gate-clocksrxusbhost_48m_fck@1400ti,dss-gate-clock0rxusbhost_ick@1410ti,omap3-dss-interface-clock?rxuart4_fck@1000ti,wait-gate-clockOrxclockdomainscore_l3_clkdmti,clockdomaindpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainlemu_clkdmti,clockdomainfdpll4_clkdmti,clockdomainwkup_clkdmti,clockdomain$dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaincam_clkdmti,clockdomainiva2_clkdmti,clockdomaindpll2_clkdmti,clockdomainmd2d_clkdmti,clockdomain dpll5_clkdmti,clockdomainsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain counter@48320000ti,omap-counter32kH2  counter_32kinterrupt-controller@48200000ti,omap3-intcH rxdma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaH`  `rxgpio@48310000ti,omap3-gpioH1gpio1rxgpio@49050000ti,omap3-gpioIgpio2r x gpio@49052000ti,omap3-gpioI gpio3gpio@49054000ti,omap3-gpioI@ gpio4gpio@49056000ti,omap3-gpioI`!gpio5rxgpio@49058000ti,omap3-gpioI"gpio6rxserial@4806a000ti,omap3-uartH H12txrxuart1lFdefaultTserial@4806c000ti,omap3-uartHI34txrxuart2lFdefaultTserial@49020000ti,omap3-uartIJ56txrxuart3lFdefaultTi2c@48070000 ti,omap3-i2cH8txrx+i2c1FdefaultT'@twl@48H  ti,twl4030FdefaultTaudioti,twl4030-audiocodecrtcti,twl4030-rtc bciti,twl4030-bci 1watchdogti,twl4030-wdtregulator-vaux1ti,twl4030-vaux1regulator-vaux2ti,twl4030-vaux2regulator-vaux3ti,twl4030-vaux3regulator-vaux4ti,twl4030-vaux4regulator-vdd1ti,twl4030-vdd1 ' regulator-vdacti,twl4030-vdacw@w@regulator-vioti,twl4030-vioregulator-vintana1ti,twl4030-vintana1regulator-vintana2ti,twl4030-vintana2regulator-vintdigti,twl4030-vintdigregulator-vmmc1ti,twl4030-vmmc1:0rxregulator-vmmc2ti,twl4030-vmmc2:0regulator-vusb1v5ti,twl4030-vusb1v5rxregulator-vusb1v8ti,twl4030-vusb1v8rxregulator-vusb3v1ti,twl4030-vusb3v1rxregulator-vpll1ti,twl4030-vpll1regulator-vpll2ti,twl4030-vpll2w@w@regulator-vsimti,twl4030-vsimw@-rxgpioti,twl4030-gpio?rxtwl4030-usbti,twl4030-usb KYgu~rxpwmti,twl4030-pwmpwmledti,twl4030-pwmledpwrbuttonti,twl4030-pwrbuttonkeypadti,twl4030-keypadmadcti,twl4030-madci2c@48072000 ti,omap3-i2cH 9txrx+i2c2 disabledi2c@48060000 ti,omap3-i2cH=txrx+i2c3FdefaultTmailbox@48094000ti,omap3-mailboxmailboxH @dsp   spi@48098000ti,omap2-mcspiH A+mcspi1@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH B+mcspi2 +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3 tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4FGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1$=>txrx1FdefaultT>JZ dmmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrxFdefaultT>Zm+wlcore@2 ti,wl1835 mmc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx disabledmmu@480bd400{ti,omap2-iommuH mmu_isprxmmu@5d000000{ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrxmcbsp1 txrxfck disabledmcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrxfckickokayFdefaultTrxmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrxmcbsp4txrxfck disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrxmcbsp5txrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1Erxsmartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_coreH smartreflex@480c9000ti,omap3-smartreflex-ivasmartreflex_mpu_ivaH timer@48318000ti,omap3430-timerH1%timer1timer@49032000ti,omap3430-timerI &timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5timer@4903a000ti,omap3430-timerI*timer6timer@4903c000ti,omap3430-timerI+timer7timer@4903e000ti,omap3430-timerI,timer8timer@49040000ti,omap3430-timerI-timer9timer@48086000ti,omap3430-timerH`.timer10timer@48088000ti,omap3430-timerH/timer11timer@48304000ti,omap3430-timerH0@_timer12usbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ ehci-phyohci@48064400ti,ohci-omap3HD Lehci@48064800 ti,ehci-omapHH Mgpmc@6e000000ti,omap3430-gpmcgpmcnrxtx +0rxnand@0,0ti,omap2-nand  (micron,mt29c4g96maz7FXbch8hy,,",(6@ RR/(A+usb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hsYdl u usb2-phyy2dss@48050000 ti,omap3-dssH disabled dss_corefck+dispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH  disabled 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compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyoperating-pointsinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinslinux,phandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cellsstatus#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplyvmmc_aux-supplybus-widthcd-gpiosnon-removable#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport2-modephysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowerti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsti,modelti,mcbspregulator-always-onlabeldefault-statereset-gpiosgpioenable-active-high