8( 2logicpd,dm3730-som-lv-devkitti,omap3630ti,omap3 ++7LogicPD Zoom DM3730 SOM-LV Development Kitchosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000d/ocp@68000000/serial@49042000 l/display@0cpus+cpu@0arm,cortex-a8ucpucpus 'O 57pmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2ivadsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+2Odefault]gmpinmux_mm3_pins@u468:T gmpinmux_mcbsp2_pins u pinmux_uart2_pins(uDFHJhgmpinmux_mcspi1_pins ugmpinmux_hsusb2_pins0u      gmpinmux_hsusb_otg_pins`urtvxz|~gmpinmux_twl4030_pinsuAgmpinmux_gpio_key_pinsug m pinmux_led_pinsu.gmpinmux_lan9221_pinsuTgmpinmux_mmc1_pins@ugmpinmux_lcd_enable_pinuZgmpinmux_dss_dpi_pins1ugmscm_conf@270sysconsimple-busp0+ p0gmpbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-gmclocks+mcbsp5_mux_fck@68ti,composite-mux-clockhg m mcbsp5_fckti,composite-clock gmmcbsp1_mux_fck@4ti,composite-mux-clockg m mcbsp1_fckti,composite-clock gmmcbsp2_mux_fck@4ti,composite-mux-clock gmmcbsp2_fckti,composite-clock gmmcbsp3_mux_fck@68ti,composite-mux-clock hgmmcbsp3_fckti,composite-clockgmmcbsp4_mux_fck@68ti,composite-mux-clock hgmmcbsp4_fckti,composite-clockgmclockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+2Odefault]pinmux_hsusb1_reset_pinugmpinmux_twl4030_vpins ugmpinmux_led_pins_wkupu$gmpinmux_backlight_pinsugmaes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYgmosc_sys_ck@d40 ti,mux-clock @gmsys_ck@1270ti,divider-clockpg m sys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock*5dpll3_m2x2_ckfixed-factor-clock*5gmdpll4_x2_ckfixed-factor-clock*5corex2_fckfixed-factor-clock*5g!m!wkup_l4_ickfixed-factor-clock *5gPmPcorex2_d3_fckfixed-factor-clock!*5gmcorex2_d5_fckfixed-factor-clock!*5gmclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockgBmBvirt_12m_ck fixed-clockgmvirt_13m_ck fixed-clock]@gmvirt_19200000_ck fixed-clock$gmvirt_26000000_ck fixed-clockgmvirt_38_4m_ck fixed-clockIgmdpll4_ck@d00ti,omap3-dpll-per-j-type-clock  D 0gmdpll4_m2_ck@d48ti,divider-clock? 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@g3m3dpll4_m4x2_mul_ckti,fixed-factor-clock3Ucpg4m4dpll4_m4x2_ck@d00ti,gate-clock4 ?pgmdpll4_m5_ck@f40ti,divider-clock?@g5m5dpll4_m5x2_mul_ckti,fixed-factor-clock5Ucpg6m6dpll4_m5x2_ck@d00ti,hsdiv-gate-clock6 ?pglmldpll4_m6_ck@1140ti,divider-clock?@g7m7dpll4_m6x2_mul_ckfixed-factor-clock7*5g8m8dpll4_m6x2_ck@d00ti,hsdiv-gate-clock8 ?g9m9emu_per_alwon_ckfixed-factor-clock9*5gemeclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock( pg;m;clkout2_src_mux_ck@d70ti,composite-mux-clock( ,: pg<m<clkout2_src_ckti,composite-clock;<g=m=sys_clkout2@d70ti,divider-clock=@ pmpu_ckfixed-factor-clock>*5g?m?arm_fck@924ti,divider-clock? $emu_mpu_alwon_ckfixed-factor-clock?*5gfmfl3_ick@a40ti,divider-clock( @g@m@l4_ick@a40ti,divider-clock@ @gAmArm_ick@c40ti,divider-clockA @gpt10_gate_fck@a00ti,composite-gate-clock   gCmCgpt10_mux_fck@a40ti,composite-mux-clockB  @gDmDgpt10_fckti,composite-clockCDgpt11_gate_fck@a00ti,composite-gate-clock   gEmEgpt11_mux_fck@a40ti,composite-mux-clockB  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gmgpio1_ick@c10ti,omap3-interface-clockP gmomap_32ksync_ick@c10ti,omap3-interface-clockP gmgpt12_ick@c10ti,omap3-interface-clockP gmgpt1_ick@c10ti,omap3-interface-clockP gmper_96m_fckfixed-factor-clock+*5g m per_48m_fckfixed-factor-clock2*5gQmQuart3_fck@1000ti,wait-gate-clockQ gmgpt2_gate_fck@1000ti,composite-gate-clock gRmRgpt2_mux_fck@1040ti,composite-mux-clockB @gSmSgpt2_fckti,composite-clockRSgpt3_gate_fck@1000ti,composite-gate-clock gTmTgpt3_mux_fck@1040ti,composite-mux-clockB @gUmUgpt3_fckti,composite-clockTUgpt4_gate_fck@1000ti,composite-gate-clock gVmVgpt4_mux_fck@1040ti,composite-mux-clockB @gWmWgpt4_fckti,composite-clockVWgpt5_gate_fck@1000ti,composite-gate-clock gXmXgpt5_mux_fck@1040ti,composite-mux-clockB @gYmYgpt5_fckti,composite-clockXYgpt6_gate_fck@1000ti,composite-gate-clock gZmZgpt6_mux_fck@1040ti,composite-mux-clockB @g[m[gpt6_fckti,composite-clockZ[gpt7_gate_fck@1000ti,composite-gate-clock g\m\gpt7_mux_fck@1040ti,composite-mux-clockB @g]m]gpt7_fckti,composite-clock\]gpt8_gate_fck@1000ti,composite-gate-clock  g^m^gpt8_mux_fck@1040ti,composite-mux-clockB @g_m_gpt8_fckti,composite-clock^_gpt9_gate_fck@1000ti,composite-gate-clock  g`m`gpt9_mux_fck@1040ti,composite-mux-clockB @gamagpt9_fckti,composite-clock`aper_32k_alwon_fckfixed-factor-clockB*5gbmbgpio6_dbck@1000ti,gate-clockbgmgpio5_dbck@1000ti,gate-clockbgmgpio4_dbck@1000ti,gate-clockbgmgpio3_dbck@1000ti,gate-clockbgmgpio2_dbck@1000ti,gate-clockb gmwdt3_fck@1000ti,wait-gate-clockb gmper_l4_ickfixed-factor-clockA*5gcmcgpio6_ick@1010ti,omap3-interface-clockcgmgpio5_ick@1010ti,omap3-interface-clockcgmgpio4_ick@1010ti,omap3-interface-clockcgmgpio3_ick@1010ti,omap3-interface-clockcgmgpio2_ick@1010ti,omap3-interface-clockc gmwdt3_ick@1010ti,omap3-interface-clockc gmuart3_ick@1010ti,omap3-interface-clockc gmuart4_ick@1010ti,omap3-interface-clockcgmgpt9_ick@1010ti,omap3-interface-clockc gmgpt8_ick@1010ti,omap3-interface-clockc gmgpt7_ick@1010ti,omap3-interface-clockcgmgpt6_ick@1010ti,omap3-interface-clockcgmgpt5_ick@1010ti,omap3-interface-clockcgmgpt4_ick@1010ti,omap3-interface-clockcgmgpt3_ick@1010ti,omap3-interface-clockcgmgpt2_ick@1010ti,omap3-interface-clockcgmmcbsp2_ick@1010ti,omap3-interface-clockcgmmcbsp3_ick@1010ti,omap3-interface-clockcgmmcbsp4_ick@1010ti,omap3-interface-clockcgmmcbsp2_gate_fck@1000ti,composite-gate-clockg m mcbsp3_gate_fck@1000ti,composite-gate-clockgmmcbsp4_gate_fck@1000ti,composite-gate-clockgmemu_src_mux_ck@1140 ti,mux-clock def@ggmgemu_src_ckti,clkdm-gate-clockgghmhpclk_fck@1140ti,divider-clockh@pclkx2_fck@1140ti,divider-clockh@atclk_fck@1140ti,divider-clockh@traceclk_src_fck@1140 ti,mux-clock def@gimitraceclk_fck@1140ti,divider-clocki @secure_32k_fck fixed-clockgjmjgpt12_fckfixed-factor-clockj*5wdt1_fckfixed-factor-clockj*5security_l4_ick2fixed-factor-clockA*5gkmkaes1_ick@a14ti,omap3-interface-clockk rng_ick@a14ti,omap3-interface-clockk sha11_ick@a14ti,omap3-interface-clockk des1_ick@a14ti,omap3-interface-clockk cam_mclk@f00ti,gate-clocklpcam_ick@f10!ti,omap3-no-wait-interface-clockAgmcsi2_96m_fck@f00ti,gate-clockgmsecurity_l3_ickfixed-factor-clock@*5gmmmpka_ick@a14ti,omap3-interface-clockm icr_ick@a10ti,omap3-interface-clockL des2_ick@a10ti,omap3-interface-clockL mspro_ick@a10ti,omap3-interface-clockL mailboxes_ick@a10ti,omap3-interface-clockL ssi_l4_ickfixed-factor-clockA*5gtmtsr1_fck@c00ti,wait-gate-clock  sr2_fck@c00ti,wait-gate-clock  sr_l4_ickfixed-factor-clockA*5dpll2_fck@40ti,divider-clock(@gnmndpll2_ck@4ti,omap3-dpll-clock n$@4gomodpll2_m2_ck@44ti,divider-clockoDgpmpiva2_ck@0ti,wait-gate-clockpgmmodem_fck@a00ti,omap3-interface-clock  gmsad2d_ick@a10ti,omap3-interface-clock@ gmmad2d_ick@a18ti,omap3-interface-clock@ gmmspro_fck@a00ti,wait-gate-clock ssi_ssr_gate_fck_3430es2@a00 ti,composite-no-wait-gate-clock! gqmqssi_ssr_div_fck_3430es2@a40ti,composite-divider-clock! @$grmrssi_ssr_fck_3430es2ti,composite-clockqrgsmsssi_sst_fck_3430es2fixed-factor-clocks*5gmhsotgusb_ick_3430es2@a10"ti,omap3-hsotgusb-interface-clockK gmssi_ick_3430es2@a10ti,omap3-ssi-interface-clockt gmusim_gate_fck@c00ti,composite-gate-clockG  gmsys_d2_ckfixed-factor-clock *5gvmvomap_96m_d2_fckfixed-factor-clockG*5gwmwomap_96m_d4_fckfixed-factor-clockG*5gxmxomap_96m_d8_fckfixed-factor-clockG*5gymyomap_96m_d10_fckfixed-factor-clockG*5 gzmzdpll5_m2_d4_ckfixed-factor-clocku*5g{m{dpll5_m2_d8_ckfixed-factor-clocku*5g|m|dpll5_m2_d16_ckfixed-factor-clocku*5g}m}dpll5_m2_d20_ckfixed-factor-clocku*5g~m~usim_mux_fck@c40ti,composite-mux-clock( vwxyz{|}~ @gmusim_fckti,composite-clockusim_ick@c10ti,omap3-interface-clockP  gmdpll5_ck@d04ti,omap3-dpll-clock   $ L 4gmdpll5_m2_ck@d50ti,divider-clock Pgumusgx_gate_fck@b00ti,composite-gate-clock( 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compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3display0device_typeregclocksclock-namesclock-latencyoperating-pointscpu0-supplyinterruptsti,hwmodsranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0linux,phandlepinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lockti,low-power-bypassti,dividers#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedbci3v1-supplyti,bb-uvoltti,bb-uampregulator-always-onti,use-ledsusb1v5-supplyusb1v8-supplyusb3v1-supplyusb_mode#phy-cells#pwm-cellskeypad,num-rowskeypad,num-columns#io-channel-cellsti,use_poweroff#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplywp-gpioscd-gpiosvmmc-supplybus-widthcap-power-off-cardnon-removableref-clock-frequency#iommu-cellsti,#tlb-entriesstatusreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport2-modephysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthti,nand-ecc-optrb-gpiosgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,device-widthlabelbank-widthgpmc,mux-add-datagpmc,oe-on-nsgpmc,we-on-nsgpmc,page-burst-access-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,cycle2cycle-samecsengpmc,cycle2cycle-diffcsenvddvario-supplyvdd33a-supplyreg-io-widthsmsc,save-mac-addressmultipointnum-epsram-bitsinterface-typeusb-phyphy-namespowervdds_dsi-supplyvdda_video-supplyremote-endpointdata-linesti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infoiommusti,phy-type#thermal-sensor-cellsgpiostartup-delay-usenable-active-highvin-supplyreset-gpioslinux,codewakeup-sourceti,modelti,mcbsplinux,default-triggerenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-activepwmsbrightness-levelsdefault-brightness-level