8}(}-Gateworks Ventana i.MX6 DualLite/Solo GW553X'!gw,imx6dl-gw553xgw,ventanafsl,imx6dlchosen',/soc/aips-bus@02100000/serial@021e8000memory8memoryD aliases)H/soc/aips-bus@02100000/ethernet@02188000(R/soc/aips-bus@02000000/flexcan@02090000(W/soc/aips-bus@02000000/flexcan@02094000%\/soc/aips-bus@02000000/gpio@0209c000%b/soc/aips-bus@02000000/gpio@020a0000%h/soc/aips-bus@02000000/gpio@020a4000%n/soc/aips-bus@02000000/gpio@020a8000%t/soc/aips-bus@02000000/gpio@020ac000%z/soc/aips-bus@02000000/gpio@020b0000%/soc/aips-bus@02000000/gpio@020b4000$/soc/aips-bus@02100000/i2c@021a0000$/soc/aips-bus@02100000/i2c@021a4000$/soc/aips-bus@02100000/i2c@021a8000/soc/ipu@02400000&/soc/aips-bus@02100000/usdhc@02190000&/soc/aips-bus@02100000/usdhc@02194000&/soc/aips-bus@02100000/usdhc@02198000&/soc/aips-bus@02100000/usdhc@0219c0009/soc/aips-bus@02000000/spba-bus@02000000/serial@02020000'/soc/aips-bus@02100000/serial@021e8000'/soc/aips-bus@02100000/serial@021ec000'/soc/aips-bus@02100000/serial@021f0000'/soc/aips-bus@02100000/serial@021f40008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020080008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@0200c0008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@020100008/soc/aips-bus@02000000/spba-bus@02000000/ecspi@02014000'/soc/aips-bus@02000000/usbphy@020c9000'/soc/aips-bus@02000000/usbphy@020ca000$/soc/aips-bus@02100000/i2c@021f8000 /leds/user1 /leds/user2 /soc/gpmi-nand@00112000$/soc/aips-bus@02100000/usb@02184200$/soc/aips-bus@02100000/usb@02184000clocksckil!fsl,imx-ckilfixed-clock%ckih1!fsl,imx-ckih1fixed-clock%osc!fsl,imx-oscfixed-clock%n6soc !simple-bus5Fdma-apbh@00110000&!fsl,imx6q-dma-apbhfsl,imx28-dma-apbhD 0M    Xgpmi0gpmi1gpmi2gpmi3hsjgpmi-nand@00112000!fsl,imx6q-gpmi-nandD @ gpmi-nandbch MXbch(0gpmi_iogpmi_apbgpmi_bchgpmi_bch_apbper1_bchrx-txokaydefaulthdmi@0120000D Ms{| iahbisfrokay!fsl,imx6dl-hdmidefaultport@0Dendpoint00port@1Dendpoint 44gpu@00130000 !vivante,gcD@ M zJbuscoreshader>>gpu@00134000 !vivante,gcD@@ M y buscore==timer@00a00600!arm,cortex-a9-twd-timerD  M 5 interrupt-controller@00a01000!arm,cortex-a9-gicD5   l2-cache@00a02000!arm,pl310-cacheD  M\-; G Wh88pcie@0x01000000!fsl,imx6q-pciesnps,dw-pcieD@ dbiconfig8pci0F| MxXmsi{zyxpciepcie_buspcie_phyokaydefault   pmu!arm,cortex-a9-pmu M^aips-bus@02000000!fsl,aips-bussimple-busDFspba-bus@02000000!fsl,spba-bussimple-busDFspdif@02004000!fsl,imx35-spdifD@@ M4   rxtxPkv>:corerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba disabledecspi@02008000 !fsl,imx6q-ecspifsl,imx51-ecspiD@ Mppipgper   rxtx disabledecspi@0200c000 !fsl,imx6q-ecspifsl,imx51-ecspiD@ M qqipgper   rxtx disabledecspi@02010000 !fsl,imx6q-ecspifsl,imx51-ecspiD@ M!rripgper   rxtx disabledecspi@02014000 !fsl,imx6q-ecspifsl,imx51-ecspiD@@ M"ssipgper   rxtx disabledserial@02020000!fsl,imx6q-uartfsl,imx21-uartD@ Mipgper   rxtx disabledesai@02024000!fsl,imx35-esaiD@@ M3(vcorememextalfsysspba   rxtx disabledssi@02028000!fsl,imx6q-ssifsl,imx51-ssiD@ M. ipgbaud  % &rxtx disabledssi@0202c000!fsl,imx6q-ssifsl,imx51-ssiD@ M/ ipgbaud  ) *rxtx disabledssi@02030000!fsl,imx6q-ssifsl,imx51-ssiD@ M0 ipgbaud  - .rxtx disabledasrc@02034000!fsl,imx53-asrcD@@ M2kmemipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`      rxarxbrxctxatxbtxcokayspba@0203c000D@vpu@02040000!fsl,imx6dl-vpucnm,coda960DM  Xbitjpegperahbaipstz@0207c000D@pwm@02080000!fsl,imx6q-pwmfsl,imx27-pwmD@ MS>ipgper disabledpwm@02084000!fsl,imx6q-pwmfsl,imx27-pwmD@@ MT>ipgper disableddefaultpwm@02088000!fsl,imx6q-pwmfsl,imx27-pwmD@ MU>ipgper disableddefaultpwm@0208c000!fsl,imx6q-pwmfsl,imx27-pwmD@ MV>ipgper disableddefaultflexcan@02090000!fsl,imx6q-flexcanD @ Mnlmipgper disabledflexcan@02094000!fsl,imx6q-flexcanD @@ Monoipgper disabledgpt@02098000!fsl,imx6dl-gptD @ M7wxipgperosc_pergpio@0209c000!fsl,imx6q-gpiofsl,imx35-gpioD @MBC@"   {y~z  gpio@020a0000!fsl,imx6q-gpiofsl,imx35-gpioD @MDE"JIHGFEDOvuqgpio@020a4000!fsl,imx6q-gpiofsl,imx35-gpioD @@MFG@"ai cQBBgpio@020a8000!fsl,imx6q-gpiofsl,imx35-gpioD @MHI"     '8=.@@gpio@020ac000!fsl,imx6q-gpiofsl,imx35-gpioD @MJK"xML/ 9%$#&gpio@020b0000!fsl,imx6q-gpiofsl,imx35-gpioD @MLM "K   Ngpio@020b4000!fsl,imx6q-gpiofsl,imx35-gpioD @@MNO"   %%kpp@020b8000!fsl,imx6q-kppfsl,imx21-kppD @ MR> disabledwdog@020bc000!fsl,imx6q-wdtfsl,imx21-wdtD @ MPdefault.wdog@020c0000!fsl,imx6q-wdtfsl,imx21-wdtD @ MQ disabledccm@020c4000!fsl,imx6q-ccmD @@MWXanatop@020c8000#!fsl,imx6q-anatopsysconsimple-busD $M16regulator-1p1!fsl,anatop-regulatorCvdd1p1RB@jO 5regulator-3p0!fsl,anatop-regulatorCvdd3p0R*j0 ( 3@regulator-2p5!fsl,anatop-regulatorCvdd2p5R"Uj)00 +xregulator-vddcore!fsl,anatop-regulatorCvddarmR j @ p#:  99regulator-vddpu!fsl,anatop-regulatorCvddpuR j Q@  p#:  regulator-vddsoc!fsl,anatop-regulatorCvddsocR j @ p#:  ::tempmon!fsl,imx6q-tempmon M1myusbphy@020c9000"!fsl,imx6q-usbphyfsl,imx23-usbphyD  M,usbphy@020ca000"!fsl,imx6q-usbphyfsl,imx23-usbphyD  M-!!snvs@020cc000#!fsl,sec-v4.0-monsysconsimple-mfdD @snvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lp4Msnvs-poweroff!syscon-poweroff8` disabledepit@020d0000D @ M8epit@020d4000D @@ M9src@020d8000!fsl,imx6q-srcfsl,imx51-srcD @M[`gpc@020dc000!fsl,imx6q-gpcD @MYZ5 0zJyiomuxc-gpr@020e0000!fsl,imx6q-iomuxc-gprsysconD8iomuxc@020e0000!fsl,imx6dl-iomuxcD@gpminandgrphpXlTt\<$8 lptx|hdmigrp4\i2c1grp0X(h@tDl@&&i2c2grp0P8p@dLt@''i2c3grp0(x@4|@))gpioledsgrp0L4`H??pciegrp0 @  pmicgrp< ((ppsgrpAApwm2grppwm3grpD,pwm4grpuart2grp0\DP8 ,,uart3grp0d4h8 --uart4grp0D,X@ ..uart5grp0H0\D //usbotggrp0pY\,  usdhc3grppY  4YpYpYpY pY(pYx`pY""usdhc3grp100mhzp  4ppp p(px`p##usdhc3grp200mhzp  4ppp p(px`p$$wdoggrpldb!fsl,imx6q-ldbfsl,imx53-ldb disabled0!"'((di0_plldi1_plldi0_seldi1_seldi0di1lvds-channel@0D disabledport@0Dendpoint22port@1Dendpoint66lvds-channel@1D disabledport@0Dendpoint33port@1Dendpoint77dcic@020e4000D@@ M|dcic@020e8000D@ M}sdma@020ec000!fsl,imx6q-sdmafsl,imx35-sdmaD@ Mipgahbhimx/sdma/sdma-imx6q.bin  pxp@020f0000D@ Mbepdc@020f4000D@@ Malcdif@020f8000D@ M'aips-bus@02100000!fsl,aips-bussimple-busDFcaam@2100000 !fsl,sec-v4.0D F memaclkipgemi_slowjr0@1000!fsl,sec-v4.0-job-ringD Mijr1@2000!fsl,sec-v4.0-job-ringD  Mjaipstz@0217c000D@usb@02184000!fsl,imx6q-usbfsl,imx27-usbD@ M+ 1okayEdefault Qusb@02184200!fsl,imx6q-usbfsl,imx27-usbDB M(!fhost 1okayusb@02184400!fsl,imx6q-usbfsl,imx27-usbDD M)fhost 1 disabledusb@02184600!fsl,imx6q-usbfsl,imx27-usbDF M*fhost 1 disabledusbmisc@02184800n!fsl,imx6q-usbmiscDHethernet@02188000!fsl,imx6q-fecD@ { v wuu ipgahbptp disabledmlb@0218c000D@$M5u~usdhc@02190000!fsl,imx6q-usdhcD@ M ipgahbper disabledusdhc@02194000!fsl,imx6q-usdhcD@@ M ipgahbper disabledusdhc@02198000!fsl,imx6q-usdhcD@ M ipgahbperokay"defaultstate_100mhzstate_200mhz"#$ %usdhc@0219c000!fsl,imx6q-usdhcD@ M ipgahbper disabledi2c@021a0000!fsl,imx6q-i2cfsl,imx21-i2cD@ M$}okay%default&pca9555@23 !nxp,pca9555D#eeprom@50 !atmel,24c02DPeeprom@51 !atmel,24c02DQeeprom@52 !atmel,24c02DReeprom@53 !atmel,24c02DSds1672@68!dallas,ds1672Dhi2c@021a4000!fsl,imx6q-i2cfsl,imx21-i2cD@@ M%~okay%default'pmic@3c !lltc,ltc3676D<default(5 Mregulatorssw1CvddsocR J`j` @Xsw2CvddddrR ?j _H @Xsw3CvddarmR J`j` @Xsw4Cvdd3p3Rj7 @ۈXldo2Cvdd1p8aR=j= @ldo3Cvdd1p8bRw@jw@ldo4Cvdd3p0R.!j.!  @i2c@021a8000!fsl,imx6q-i2cfsl,imx21-i2cD@ M&okay%default)romcp@021ac000D@mmdc@021b0000!fsl,imx6q-mmdcD@mmdc@021b4000D@@weim@021b8000!fsl,imx6q-weimD@ M disabledocotp@021bc000!fsl,imx6q-ocotpsysconD@tzasc@021d0000D@ Mltzasc@021d4000D@@ Mmaudmux@021d8000"!fsl,imx6q-audmuxfsl,imx31-audmuxD@ disabledmipi@021dc000D@mipi@021e0000D@ disabledportsport@0Dendpoint*11port@1Dendpoint+55vdoa@021e4000!fsl,imx6q-vdoaD@@ Mserial@021e8000!fsl,imx6q-uartfsl,imx21-uartD@ Mipgper   rxtxokaydefault,serial@021ec000!fsl,imx6q-uartfsl,imx21-uartD@ Mipgper   rxtxokaydefault-serial@021f0000!fsl,imx6q-uartfsl,imx21-uartD@ Mipgper   rxtxokaydefault.serial@021f4000!fsl,imx6q-uartfsl,imx21-uartD@@ Mipgper  ! "rxtxokaydefault/i2c@021f8000!fsl,imx6q-i2cfsl,imx21-i2cD@ M#t disabledipu@02400000!fsl,imx6q-ipuD@@M busdi0di1port@0Dport@1Dport@2D;;disp0-endpointhdmi-endpoint0mipi-endpoint1**lvds0-endpoint2lvds1-endpoint3port@3D<<disp1-endpointhdmi-endpoint4  mipi-endpoint5++lvds0-endpoint6lvds1-endpoint7sram@00900000 !mmio-sramDcpuscpu@0!arm,cortex-a98cpuD82  002  Il(h)armpll2_pfd2_396msteppll1_swpll1_sysW9b:cpu@1!arm,cortex-a98cpuD8display-subsystem!fsl,imx-display-subsystemm;<gpu-subsystem!fsl,imx-gpu-subsystems=>leds !gpio-ledsdefault?user1yuser1 @ on heartbeatuser2yuser2 @ offpps !pps-gpiodefaultA  okayregulator-5p0v!regulator-fixedC5P0VRLK@jLK@regulator-usb-otg-vbus!regulator-fixed Cusb_otg_vbusRLK@jLK@ B #address-cells#size-cellsmodelcompatiblestdout-pathdevice_typeregethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2ipu0mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1i2c3led0led1nandusb0usb1#clock-cellsclock-frequencyinterrupt-parentrangesinterruptsinterrupt-names#dma-cellsdma-channelsclockslinux,phandlereg-namesclock-namesdmasdma-namesstatuspinctrl-namespinctrl-0gprddc-i2c-busremote-endpointpower-domains#interrupt-cellsinterrupt-controllercache-unifiedcache-levelarm,tag-latencyarm,data-latencyarm,shared-overridenum-lanesinterrupt-map-maskinterrupt-mapreset-gpio#sound-dai-cellsfsl,fifo-depthfsl,asrc-ratefsl,asrc-widthresetsiram#pwm-cellsgpio-controller#gpio-cellsgpio-rangesfsl,ext-reset-outputregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthregulator-enable-ramp-delayfsl,tempmonfsl,tempmon-datafsl,anatopregmap#reset-cellspu-supply#power-domain-cellsfsl,pinsfsl,sdma-ram-script-namefsl,sec-erafsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordvbus-supplydisable-over-currentdr_mode#index-cellsinterrupts-extendedbus-widthpinctrl-1pinctrl-2cd-gpiospagesizelltc,fb-voltage-dividerregulator-ramp-delayregulator-boot-onfsl,weim-cs-gprnext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplysoc-supplyportscoreslabeldefault-statelinux,default-triggerenable-active-high