Ho8C(Cl2Marvell Armada XP Development Board DB-MV784MP-GPOmarvell,axp-gpmarvell,armadaxp-mv78460marvell,armadaxpmarvell,armada-370-xp aliases ,/soc/internal-regs/serial@12000 4/soc/internal-regs/serial@12100  | disableddevbus-cs1marvell,mvebu-devbus x= | disableddevbus-cs2marvell,mvebu-devbus x; | disableddevbus-cs3marvell,mvebu-devbus x 7 | disabledinternal-regs simple-bus rtc@10300marvell,orion-rtcx 2i2c@11000(marvell,mv78230-i2cmarvell,mv64xxx-i2c | disabledxi2c@11100(marvell,mv78230-i2cmarvell,mv64xxx-i2c  | disabledxserial@12000snps,dw-apb-uartx )|okayserial@12100snps,dw-apb-uartx!*|okaypin-ctrl@18000x8marvell,mv78460-pinctrlge0-gmii-pinsmpp0mpp1mpp2mpp3mpp4mpp5mpp6mpp7mpp8mpp9mpp10mpp11mpp12mpp13mpp14mpp15mpp16mpp17mpp18mpp19mpp20mpp21mpp22mpp23 ge0ge0-rgmii-pins>mpp0mpp1mpp2mpp3mpp4mpp5mpp6mpp7mpp8mpp9mpp10mpp11 ge0ge1-rgmii-pinsHmpp12mpp13mpp14mpp15mpp16mpp17mpp18mpp19mpp20mpp21mpp22mpp23 ge1sdio-pins$mpp30mpp31mpp32mpp33mpp34mpp35 sd0spi0-pinsmpp36mpp37mpp38mpp39 spi0$spi1-pinsmpp13mpp14mpp16mpp17 spi1$uart2-pins mpp42mpp43 uart2 $ uart3-pins mpp44mpp45 uart3$corediv-clock@18740!marvell,armada-370-corediv-clockx@ ,|9nand $ mbus-controller@20000marvell,mbus-controllerx P$interrupt-controller@20a00 marvell,mpicL ]rx pX$coherency-fabric@20200marvell,coherency-fabricxtimer@20300x0@0%&'(marvell,armada-xp-timer | nbclkfixedwatchdog@20300x4marvell,armada-xp-wdt | nbclkfixedcpurst@20800marvell,armada-370-cpu-resetx pmsu@22000marvell,armada-370-pmsux usb@50000marvell,orion-ehcix-okay|usb@51000marvell,orion-ehcix.okay|ethernet@70000x@|okaymarvell,armada-xp-neta qsgmii mdio@72004 marvell,orion-mdiox |ethernet-phy@0x $ ethernet-phy@1x $ ethernet-phy@2x$ethernet-phy@3x$ethernet@74000x@@ |okaymarvell,armada-xp-neta qsgmii sata@a0000marvell,armada-370-satax P7|01okaynand@d0000marvell,armada370-nandx T q| okaymvsdio@d4000marvell,orion-sdiox @6| + disabledsdramc@1400#marvell,armada-xp-sdram-controllerxl2-cache@8000marvell,aurora-system-cachex=KWeserial@12200snps,dw-apb-uartq {defaultx"+|okayserial@12300snps,dw-apb-uartq{defaultx#,|okaysystem-controller@18200(marvell,armada-370-xp-system-controllerxclock-gating-control@18220marvell,armada-xp-gating-clockx |,$mvebu-sar@18230marvell,armada-xp-core-clockx0,$thermal@182b0marvell,armadaxp-thermalxokayclock-complex@18700,marvell,armada-xp-cpu-clockx$T|$cpu-config@21000marvell,armada-xp-cpu-configxethernet@30000marvell,armada-xp-netax@ |okayqsgmii usb@52000marvell,orion-ehcix /| disabledxor@60900marvell,orion-xorx  |okayxor103xor114crypto@90000marvell,armada-xp-cryptox regs01| cesa0cesa1bm@c0000marvell,armada-380-neta-bmx | okay $ xor@f0900marvell,orion-xorx  |okayxor00^xor01_gpio@18100marvell,orion-gpiox@  ]LRSTU$gpio@18140marvell,orion-gpiox@@  ]LWXYZgpio@18180marvell,orion-gpiox@ ]L[ethernet@34000marvell,armada-xp-netax@@|okayqsgmii pinctrlq{defaultpic-pins-0mpp16mpp17mpp18 gpio$spi@10600lx(^_ |okay(marvell,armada-xp-spimarvell,orion-spiq{defaultspi-flash@0 n25q128a13jedec,spi-norx#ospi@10680lx(Z[ \| disabled(marvell,armada-xp-spimarvell,orion-spiq{defaultbootrommarvell,bootrom xsa-sram0 mmio-sram x |  $sa-sram1 mmio-sram x |  $bm-bppi mmio-sram x   | 5okay$pcie-controller@82000000marvell,armada-xp-pcieokaylpci BMH   @@      @@   xpxp    pcie@1,0lpciW x L@j}:|okaypcie@2,0lpciW@ x L@j};| disabledpcie@3,0lpciW x L@j}<| disabledpcie@4,0lpciW  x  L@j}=| disabledpcie@5,0lpciW( x( L@j}>|  disabledpcie@6,0lpciW0@ x0 L@j}?|  disabledpcie@7,0lpciW8 x8 L@j}@|  disabledpcie@8,0lpciW@ x@ L@j}A|  disabledpcie@9,0lpciWH xH L@  j}c|okaypcie@10,0lpciWP xP L@  j}g|okayclocksmainpll fixed-clock,w5$oscillator fixed-clock,}x@$chosenserial0:115200n8memory@0lmemory x modelcompatible#address-cells#size-cellsserial0serial1serial2serial3gpio0gpio1gpio2enable-methoddevice_typeregclocksclock-latencyctrl-gpiosinterrupts-extendedcontrollerinterrupt-parentpcie-mem-aperturepcie-io-aperturerangesstatusdevbus,bus-widthdevbus,turn-off-psdevbus,badr-skew-psdevbus,acc-first-psdevbus,acc-next-psdevbus,rd-setup-psdevbus,rd-hold-psdevbus,sync-enabledevbus,wr-high-psdevbus,wr-low-psdevbus,ale-wr-psbank-widthinterruptstimeout-msreg-shiftreg-io-widthmarvell,pinsmarvell,functionlinux,phandle#clock-cellsclock-output-names#interrupt-cellsinterrupt-controllermsi-controllerclock-namesphyphy-modebuffer-managerbm,pool-longnr-portsnum-csmarvell,nand-keep-configmarvell,nand-enable-arbiternand-on-flash-bbtcap-sdio-irqcap-sd-highspeedcap-mmc-highspeedcache-id-partcache-levelcache-unifiedwt-overridepinctrl-0pinctrl-namesdmacap,memcpydmacap,xordmacap,memsetreg-namesmarvell,crypto-sramsmarvell,crypto-sram-sizeinternal-memngpiosgpio-controller#gpio-cellscell-indexspi-max-frequencyno-memory-wcmsi-parentbus-rangeassigned-addressesinterrupt-map-maskinterrupt-mapmarvell,pcie-portmarvell,pcie-laneclock-frequencystdout-path