18Ͱ(x(ti,am3517-craneboardti,am3517ti,omap3 +#7TI AM3517 CraneBoard (TMDSEVM3517)chosenaliases=/ocp@68000000/i2c@48070000B/ocp@68000000/i2c@48072000G/ocp@68000000/i2c@48060000L/ocp@68000000/serial@4806a000T/ocp@68000000/serial@4806c000\/ocp@68000000/serial@49020000d/ocp@68000000/serial@4809e000cpus+cpu@0arm,cortex-a8lcpux|cpupmu@54000000arm,cortex-a8-pmuxTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2iva disableddsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-busxh +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-busx + pinmux@30 ti,omap3-padconfpinctrl-singlex08+pinmux_tps_pins0DJscm_conf@270sysconsimple-busxp0+ p0DJpbias_regulator@2b0ti,pbias-omap3ti,pbias-omapxRpbias_mmc_omap2430Ypbias_mmc_omap2430hw@-DJclocks+mcbsp5_mux_fck@68ti,composite-mux-clock|xhDJmcbsp5_fckti,composite-clock|DJmcbsp1_mux_fck@4ti,composite-mux-clock|xD J mcbsp1_fckti,composite-clock| DJmcbsp2_mux_fck@4ti,composite-mux-clock| xD J mcbsp2_fckti,composite-clock| DJmcbsp3_mux_fck@68ti,composite-mux-clock| xhDJmcbsp3_fckti,composite-clock| DJmcbsp4_mux_fck@68ti,composite-mux-clock| xhDJmcbsp4_fckti,composite-clock|DJemac_ick@32cti,am35xx-gate-clock|x,DxJxemac_fck@32cti,gate-clock|x, vpfe_ick@32cti,am35xx-gate-clock|x,DyJyvpfe_fck@32cti,gate-clock|x, hsotgusb_ick_am35xx@32cti,am35xx-gate-clock|x,DzJzhsotgusb_fck_am35xx@32cti,gate-clock|x,D{J{hecc_ck@32cti,am35xx-gate-clock|x,D|J|clockdomainspinmux@a00 ti,omap3-padconfpinctrl-singlex \+aes@480c5000 ti,omap3-aesaesxH PPABtxrxprm@48306000 ti,omap3-prmxH0`@ clocks+virt_16_8m_ck fixed-clockYDJosc_sys_ck@d40 ti,mux-clock|x @DJsys_ck@1270ti,divider-clock|xpDJsys_clkout1@d70ti,gate-clock|x pdpll3_x2_ckfixed-factor-clock|dpll3_m2x2_ckfixed-factor-clock|D J dpll4_x2_ckfixed-factor-clock|corex2_fckfixed-factor-clock| D!J!wkup_l4_ickfixed-factor-clock|DPJPcorex2_d3_fckfixed-factor-clock|!DqJqcorex2_d5_fckfixed-factor-clock|!DrJrclockdomainscm@48004000 ti,omap3-cmxH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockDBJBvirt_12m_ck fixed-clockDJvirt_13m_ck fixed-clock]@DJvirt_19200000_ck fixed-clock$DJvirt_26000000_ck fixed-clockDJvirt_38_4m_ck fixed-clockIDJdpll4_ck@d00ti,omap3-dpll-per-clock|x D 0DJdpll4_m2_ck@d48ti,divider-clock|?x HD"J"dpll4_m2x2_mul_ckfixed-factor-clock|"D#J#dpll4_m2x2_ck@d00ti,gate-clock|#x D$J$omap_96m_alwon_fckfixed-factor-clock|$D+J+dpll3_ck@d00ti,omap3-dpll-core-clock|x @ 0DJdpll3_m3_ck@1140ti,divider-clock|x@D%J%dpll3_m3x2_mul_ckfixed-factor-clock|%D&J&dpll3_m3x2_ck@d00ti,gate-clock|& x D'J'emu_core_alwon_ckfixed-factor-clock|'DdJdsys_altclk fixed-clockD0J0mcbsp_clks fixed-clockDJdpll3_m2_ck@d40ti,divider-clock|x @DJcore_ckfixed-factor-clock|D(J(dpll1_fck@940ti,divider-clock|(x @D)J)dpll1_ck@904ti,omap3-dpll-clock|)x  $ @ 4DJdpll1_x2_ckfixed-factor-clock|D*J*dpll1_x2m2_ck@944ti,divider-clock|*x DD>J>cm_96m_fckfixed-factor-clock|+D,J,omap_96m_fck@d40 ti,mux-clock|,x @DGJGdpll4_m3_ck@e40ti,divider-clock| x@D-J-dpll4_m3x2_mul_ckfixed-factor-clock|-D.J.dpll4_m3x2_ck@d00ti,gate-clock|.x D/J/omap_54m_fck@d40 ti,mux-clock|/0x @D:J:cm_96m_d2_fckfixed-factor-clock|,D1J1omap_48m_fck@d40 ti,mux-clock|10x @D2J2omap_12m_fckfixed-factor-clock|2DIJIdpll4_m4_ck@e40ti,divider-clock| x@D3J3dpll4_m4x2_mul_ckti,fixed-factor-clock|3,9D4J4dpll4_m4x2_ck@d00ti,gate-clock|4x 9DvJvdpll4_m5_ck@f40ti,divider-clock|?x@D5J5dpll4_m5x2_mul_ckti,fixed-factor-clock|5,9D6J6dpll4_m5x2_ck@d00ti,gate-clock|6x 9dpll4_m6_ck@1140ti,divider-clock|?x@D7J7dpll4_m6x2_mul_ckfixed-factor-clock|7D8J8dpll4_m6x2_ck@d00ti,gate-clock|8x D9J9emu_per_alwon_ckfixed-factor-clock|9DeJeclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock|(x pD;J;clkout2_src_mux_ck@d70ti,composite-mux-clock|(,:x pD<J<clkout2_src_ckti,composite-clock|;<D=J=sys_clkout2@d70ti,divider-clock|=@x pLmpu_ckfixed-factor-clock|>D?J?arm_fck@924ti,divider-clock|?x $emu_mpu_alwon_ckfixed-factor-clock|?DfJfl3_ick@a40ti,divider-clock|(x @D@J@l4_ick@a40ti,divider-clock|@x @DAJArm_ick@c40ti,divider-clock|Ax @gpt10_gate_fck@a00ti,composite-gate-clock| x DCJCgpt10_mux_fck@a40ti,composite-mux-clock|Bx @DDJDgpt10_fckti,composite-clock|CDgpt11_gate_fck@a00ti,composite-gate-clock| x DEJEgpt11_mux_fck@a40ti,composite-mux-clock|Bx @DFJFgpt11_fckti,composite-clock|EFcore_96m_fckfixed-factor-clock|GDJmmchs2_fck@a00ti,wait-gate-clock|x DJmmchs1_fck@a00ti,wait-gate-clock|x DJi2c3_fck@a00ti,wait-gate-clock|x DJi2c2_fck@a00ti,wait-gate-clock|x DJi2c1_fck@a00ti,wait-gate-clock|x DJmcbsp5_gate_fck@a00ti,composite-gate-clock| x DJmcbsp1_gate_fck@a00ti,composite-gate-clock| x DJcore_48m_fckfixed-factor-clock|2DHJHmcspi4_fck@a00ti,wait-gate-clock|Hx DJmcspi3_fck@a00ti,wait-gate-clock|Hx DJmcspi2_fck@a00ti,wait-gate-clock|Hx DJmcspi1_fck@a00ti,wait-gate-clock|Hx DJuart2_fck@a00ti,wait-gate-clock|Hx DJuart1_fck@a00ti,wait-gate-clock|Hx  DJcore_12m_fckfixed-factor-clock|IDJJJhdq_fck@a00ti,wait-gate-clock|Jx DJcore_l3_ickfixed-factor-clock|@DKJKsdrc_ick@a10ti,wait-gate-clock|Kx DwJwgpmc_fckfixed-factor-clock|Kcore_l4_ickfixed-factor-clock|ADLJLmmchs2_ick@a10ti,omap3-interface-clock|Lx DJmmchs1_ick@a10ti,omap3-interface-clock|Lx DJhdq_ick@a10ti,omap3-interface-clock|Lx DJmcspi4_ick@a10ti,omap3-interface-clock|Lx DJmcspi3_ick@a10ti,omap3-interface-clock|Lx DJmcspi2_ick@a10ti,omap3-interface-clock|Lx DJmcspi1_ick@a10ti,omap3-interface-clock|Lx DJi2c3_ick@a10ti,omap3-interface-clock|Lx DJi2c2_ick@a10ti,omap3-interface-clock|Lx DJi2c1_ick@a10ti,omap3-interface-clock|Lx DJuart2_ick@a10ti,omap3-interface-clock|Lx DJuart1_ick@a10ti,omap3-interface-clock|Lx  DJgpt11_ick@a10ti,omap3-interface-clock|Lx  DJgpt10_ick@a10ti,omap3-interface-clock|Lx  DJmcbsp5_ick@a10ti,omap3-interface-clock|Lx  DJmcbsp1_ick@a10ti,omap3-interface-clock|Lx  DJomapctrl_ick@a10ti,omap3-interface-clock|Lx DJdss_tv_fck@e00ti,gate-clock|:xDJdss_96m_fck@e00ti,gate-clock|GxDJdss2_alwon_fck@e00ti,gate-clock|xDJdummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock|x DMJMgpt1_mux_fck@c40ti,composite-mux-clock|Bx @DNJNgpt1_fckti,composite-clock|MNaes2_ick@a10ti,omap3-interface-clock|Lx DJwkup_32k_fckfixed-factor-clock|BDOJOgpio1_dbck@c00ti,gate-clock|Ox DJsha12_ick@a10ti,omap3-interface-clock|Lx DJwdt2_fck@c00ti,wait-gate-clock|Ox DJwdt2_ick@c10ti,omap3-interface-clock|Px DJwdt1_ick@c10ti,omap3-interface-clock|Px DJgpio1_ick@c10ti,omap3-interface-clock|Px DJomap_32ksync_ick@c10ti,omap3-interface-clock|Px DJgpt12_ick@c10ti,omap3-interface-clock|Px DJgpt1_ick@c10ti,omap3-interface-clock|Px DJper_96m_fckfixed-factor-clock|+D J per_48m_fckfixed-factor-clock|2DQJQuart3_fck@1000ti,wait-gate-clock|Qx D}J}gpt2_gate_fck@1000ti,composite-gate-clock|xDRJRgpt2_mux_fck@1040ti,composite-mux-clock|Bx@DSJSgpt2_fckti,composite-clock|RSgpt3_gate_fck@1000ti,composite-gate-clock|xDTJTgpt3_mux_fck@1040ti,composite-mux-clock|Bx@DUJUgpt3_fckti,composite-clock|TUgpt4_gate_fck@1000ti,composite-gate-clock|xDVJVgpt4_mux_fck@1040ti,composite-mux-clock|Bx@DWJWgpt4_fckti,composite-clock|VWgpt5_gate_fck@1000ti,composite-gate-clock|xDXJXgpt5_mux_fck@1040ti,composite-mux-clock|Bx@DYJYgpt5_fckti,composite-clock|XYgpt6_gate_fck@1000ti,composite-gate-clock|xDZJZgpt6_mux_fck@1040ti,composite-mux-clock|Bx@D[J[gpt6_fckti,composite-clock|Z[gpt7_gate_fck@1000ti,composite-gate-clock|xD\J\gpt7_mux_fck@1040ti,composite-mux-clock|Bx@D]J]gpt7_fckti,composite-clock|\]gpt8_gate_fck@1000ti,composite-gate-clock| xD^J^gpt8_mux_fck@1040ti,composite-mux-clock|Bx@D_J_gpt8_fckti,composite-clock|^_gpt9_gate_fck@1000ti,composite-gate-clock| xD`J`gpt9_mux_fck@1040ti,composite-mux-clock|Bx@DaJagpt9_fckti,composite-clock|`aper_32k_alwon_fckfixed-factor-clock|BDbJbgpio6_dbck@1000ti,gate-clock|bxD~J~gpio5_dbck@1000ti,gate-clock|bxDJgpio4_dbck@1000ti,gate-clock|bxDJgpio3_dbck@1000ti,gate-clock|bxDJgpio2_dbck@1000ti,gate-clock|bx DJwdt3_fck@1000ti,wait-gate-clock|bx DJper_l4_ickfixed-factor-clock|ADcJcgpio6_ick@1010ti,omap3-interface-clock|cxDJgpio5_ick@1010ti,omap3-interface-clock|cxDJgpio4_ick@1010ti,omap3-interface-clock|cxDJgpio3_ick@1010ti,omap3-interface-clock|cxDJgpio2_ick@1010ti,omap3-interface-clock|cx DJwdt3_ick@1010ti,omap3-interface-clock|cx DJuart3_ick@1010ti,omap3-interface-clock|cx DJuart4_ick@1010ti,omap3-interface-clock|cxDJgpt9_ick@1010ti,omap3-interface-clock|cx DJgpt8_ick@1010ti,omap3-interface-clock|cx DJgpt7_ick@1010ti,omap3-interface-clock|cxDJgpt6_ick@1010ti,omap3-interface-clock|cxDJgpt5_ick@1010ti,omap3-interface-clock|cxDJgpt4_ick@1010ti,omap3-interface-clock|cxDJgpt3_ick@1010ti,omap3-interface-clock|cxDJgpt2_ick@1010ti,omap3-interface-clock|cxDJmcbsp2_ick@1010ti,omap3-interface-clock|cxDJmcbsp3_ick@1010ti,omap3-interface-clock|cxDJmcbsp4_ick@1010ti,omap3-interface-clock|cxDJmcbsp2_gate_fck@1000ti,composite-gate-clock|xD J mcbsp3_gate_fck@1000ti,composite-gate-clock|xD J mcbsp4_gate_fck@1000ti,composite-gate-clock|xDJemu_src_mux_ck@1140 ti,mux-clock|defx@DgJgemu_src_ckti,clkdm-gate-clock|gDhJhpclk_fck@1140ti,divider-clock|hx@pclkx2_fck@1140ti,divider-clock|hx@atclk_fck@1140ti,divider-clock|hx@traceclk_src_fck@1140 ti,mux-clock|defx@DiJitraceclk_fck@1140ti,divider-clock|i x@secure_32k_fck fixed-clockDjJjgpt12_fckfixed-factor-clock|jwdt1_fckfixed-factor-clock|jipss_ick@a10ti,am35xx-interface-clock|Kx DJrmii_ck fixed-clockDJpclk_ck fixed-clockDJuart4_ick_am35xx@a10ti,omap3-interface-clock|Lx uart4_fck_am35xx@a00ti,wait-gate-clock|Hx dpll5_ck@d04ti,omap3-dpll-clock|x  $ L 4btDkJkdpll5_m2_ck@d50ti,divider-clock|kx PDuJusgx_gate_fck@b00ti,composite-gate-clock|(x DsJscore_d3_ckfixed-factor-clock|(DlJlcore_d4_ckfixed-factor-clock|(DmJmcore_d6_ckfixed-factor-clock|(DnJnomap_192m_alwon_fckfixed-factor-clock|$DoJocore_d2_ckfixed-factor-clock|(DpJpsgx_mux_fck@b40ti,composite-mux-clock |lmn,opqrx @DtJtsgx_fckti,composite-clock|stsgx_ick@b10ti,wait-gate-clock|@x DJcpefuse_fck@a08ti,gate-clock|x DJts_fck@a08ti,gate-clock|Bx DJusbtll_fck@a08ti,wait-gate-clock|ux DJusbtll_ick@a18ti,omap3-interface-clock|Lx DJmmchs3_ick@a10ti,omap3-interface-clock|Lx DJmmchs3_fck@a00ti,wait-gate-clock|x DJdss1_alwon_fck_3430es2@e00ti,dss-gate-clock|vx9DJdss_ick_3430es2@e10ti,omap3-dss-interface-clock|AxDJusbhost_120m_fck@1400ti,gate-clock|uxDJusbhost_48m_fck@1400ti,dss-gate-clock|2xDJusbhost_ick@1410ti,omap3-dss-interface-clock|AxDJclockdomainscore_l3_clkdmti,clockdomain|wxyz{|dpll3_clkdmti,clockdomain|dpll1_clkdmti,clockdomain|per_clkdmti,clockdomainh|}~emu_clkdmti,clockdomain|hdpll4_clkdmti,clockdomain|wkup_clkdmti,clockdomain |dss_clkdmti,clockdomain|core_l4_clkdmti,clockdomain|dpll5_clkdmti,clockdomain|ksgx_clkdmti,clockdomain|usbhost_clkdmti,clockdomain |counter@48320000ti,omap-counter32kxH2  counter_32kinterrupt-controller@48200000ti,omap3-intcxH DJdma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaxH` | `DJgpio@48310000ti,omap3-gpioxH1gpio1gpio@49050000ti,omap3-gpioxIgpio2gpio@49052000ti,omap3-gpioxI gpio3gpio@49054000ti,omap3-gpioxI@ gpio4gpio@49056000ti,omap3-gpioxI`!gpio5gpio@49058000ti,omap3-gpioxI"gpio6serial@4806a000ti,omap3-uartxH H12txrxuart1lserial@4806c000ti,omap3-uartxHI34txrxuart2lserial@49020000ti,omap3-uartxIJ56txrxuart3li2c@48070000 ti,omap3-i2cxH8txrx+i2c1'@tps@2dx- ti,tps65910default  $0<HT`regulators+regulator@0xmvrtcregulator@1xmvioregulator@2xmvdd1 Yvdd_corehOOregulator@3xmvdd2Yvdd_shvh2Z2ZDJregulator@4xmvdd3regulator@5xmvdig1regulator@6xmvdig2regulator@7xmvpllhw@w@regulator@8xmvdachw@w@regulator@9x mvaux1hw@w@regulator@10x mvaux2hw@w@regulator@11x mvaux33regulator@12x mvmmch2Z2Zregulator@13x mvbbi2c@48072000 ti,omap3-i2cxH 9txrx+i2c2 disabledi2c@48060000 ti,omap3-i2cxH=txrx+i2c3 disabledmailbox@48094000ti,omap3-mailboxmailboxxH @ disableddsp  spi@48098000ti,omap2-mcspixH A+mcspi1@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspixH B+mcspi2 +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspixH [+mcspi3 tx0rx0tx1rx1spi@480ba000ti,omap2-mcspixH 0+mcspi4FGtx0rx01w@480b2000 ti,omap3-1wxH :hdq1wmmc@4809c000ti,omap3-hsmmcxH Smmc1=>txrx "mmc@480b4000ti,omap3-hsmmcxH @Vmmc2/0txrx disabledmmc@480ad000ti,omap3-hsmmcxH ^mmc3MNtxrx disabledmmu@480bd400,ti,omap2-iommuxH mmu_isp9 disabledmmu@5d000000,ti,omap2-iommux]mmu_iva disabledwdt@48314000 ti,omap3-wdtxH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspxH@Impu ;< Scommontxrxcmcbsp1 txrx|fck disabledmcbsp@49022000ti,omap3-mcbspxI I Impusidetone>?Scommontxrxsidetonecmcbsp2mcbsp2_sidetone!"txrx|fckick disabledmcbsp@49024000ti,omap3-mcbspxI@I ImpusidetoneYZScommontxrxsidetonecmcbsp3mcbsp3_sidetonetxrx|fckick disabledmcbsp@49026000ti,omap3-mcbspxI`Impu 67 Scommontxrxcmcbsp4txrx|fck disabledmcbsp@48096000ti,omap3-mcbspxH `Impu QR Scommontxrxcmcbsp5txrx|fck disabledsham@480c3000ti,omap3-shamshamxH 0d1Erxsmartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_corexH smartreflex@480c9000ti,omap3-smartreflex-ivasmartreflex_mpu_ivaxH  disabledtimer@48318000ti,omap3430-timerxH1%timer1rtimer@49032000ti,omap3430-timerxI &timer2timer@49034000ti,omap3430-timerxI@'timer3timer@49036000ti,omap3430-timerxI`(timer4timer@49038000ti,omap3430-timerxI)timer5timer@4903a000ti,omap3430-timerxI*timer6timer@4903c000ti,omap3430-timerxI+timer7timer@4903e000ti,omap3430-timerxI,timer8timer@49040000ti,omap3430-timerxI-timer9timer@48086000ti,omap3430-timerxH`.timer10timer@48088000ti,omap3430-timerxH/timer11timer@48304000ti,omap3430-timerxH0@_timer12rusbhstll@48062000 ti,usbhs-tllxH N usb_tll_hsusbhshost@48064000ti,usbhs-hostxH@ usb_host_hs+ohci@48064400ti,ohci-omap3xHD Lehci@48064800 ti,ehci-omapxHH Mgpmc@6e000000ti,omap3430-gpmcgpmcxnrxtx+usb_otg_hs@480ab000ti,omap3-musbxH \]Smcdma usb_otg_hs dss@48050000 ti,omap3-dssxH disabled dss_core|fck+dispc@48050400ti,omap3-dispcxH dss_dispc|fckencoder@4804fc00 ti,omap3-dsixHH@H Iprotophypll disabled dss_dsi1| fcksys_clkencoder@48050800ti,omap3-rfbixH disabled dss_rfbi|fckickencoder@48050c00ti,omap3-vencxH  disabled dss_venc|fckssi-controller@48058000 ti,omap3-ssissi disabledxHHIsysgddGSgdd_mpu+ssi-port@4805a000ti,omap3-ssi-portxHHItxrx CDssi-port@4805b000ti,omap3-ssi-portxHHItxrx EFam35x_otg_hs@5c040000ti,omap3-musb am35x_otg_hs disabledx\GSmcethernet@0x5c000000ti,am3517-emac davinci_emacokayx\CDEFR: Sfethernet@0x5c030000ti,davinci_mdio davinci_mdiookayx\xB@+serial@4809e000ti,omap3-uartuart4 disabledxH T76txrxlpinmux@480025d8 ti,omap3-padconfpinctrl-singlexH%$+memory@80000000lmemoryxfixedregulatorregulator-fixedYvbathLK@LK@DJ compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyinterruptsti,hwmodsstatusranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinslinux,phandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lock#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0ti,en-ck32k-xtalvcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-compatibleregulator-always-onregulator-boot-on#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplybus-width#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-securegpmc,num-csgpmc,num-waitpinsmultipointnum-epsram-bitsti,davinci-ctrl-reg-offsetti,davinci-ctrl-mod-reg-offsetti,davinci-ctrl-ram-offsetti,davinci-ctrl-ram-sizeti,davinci-rmii-enlocal-mac-addressbus_freq