Ð þíK=8Hˆ(µHP,Cubietech Cubieboard4.2cubietech,a80-cubieboard4allwinner,sun9i-a80chosen=serial0:115200n8aliasesI/soc/serial@07000000memoryQmemory] cpuscpu@02arm,cortex-a7Qcpu]cpu@12arm,cortex-a7Qcpu]cpu@22arm,cortex-a7Qcpu]cpu@32arm,cortex-a7Qcpu]cpu@1002arm,cortex-a15Qcpu]cpu@1012arm,cortex-a15Qcpu]cpu@1022arm,cortex-a15Qcpu]cpu@1032arm,cortex-a15Qcpu]timer2arm,armv7-timer0a   ln6|clocks  osc24M_clk§ 2fixed-clockln6´osc24MÇÍosc32k_clk§ 2fixed-clockl€´osc32kÇ Í clk@00a08000§Õ 2allwinner,sun9i-a80-usb-mod-clk] €â9´usb0_ahbusb_ohci0usb1_ahbusb_ohci1usb2_ahbusb_ohci2ÇÍclk@00a08004§Õ 2allwinner,sun9i-a80-usb-phy-clk] €âF´usb_phy0usb_hsic1_480Musb_phy1usb_hsic2_480Musb_phy2usb_hsic_12MÇÍclk@06000008§ 2fixed-clocké´pll3Ç Í clk@0600000c§2allwinner,sun9i-a80-pll4-clk] â´pll4ÇÍclk@0600002c§2allwinner,sun9i-a80-pll4-clk],â´pll12ÇÍclk@0600005c§2allwinner,sun9i-a80-gt-clk]\â´gtÇÍclk@06000060§2allwinner,sun9i-a80-ahb-clk]`â´ahb0ÇÍclk@06000064§2allwinner,sun9i-a80-ahb-clk]dâ´ahb1ÇÍclk@06000068§2allwinner,sun9i-a80-ahb-clk]hâ´ahb2Ç Í clk@06000070§2allwinner,sun9i-a80-apb0-clk]pâ´apb0Ç Í clk@06000074§2allwinner,sun9i-a80-apb1-clk]tâ´apb1Ç Í clk@06000078§2allwinner,sun9i-a80-gt-clk]xâ´cci400clk@06000410§2allwinner,sun9i-a80-mmc-clk]â´mmc0mmc0_outputmmc0_sampleÇÍclk@06000414§2allwinner,sun9i-a80-mmc-clk]â´mmc1mmc1_outputmmc1_sampleÇÍclk@06000418§2allwinner,sun9i-a80-mmc-clk]â´mmc2mmc2_outputmmc2_sampleÇÍclk@0600041c§2allwinner,sun9i-a80-mmc-clk]â´mmc3mmc3_outputmmc3_sampleÇÍclk@06000580§#2allwinner,sun9i-a80-ahb0-gates-clk]€â<ô ’´ahb0_fdahb0_veahb0_gpuahb0_ssahb0_sdahb0_nand1ahb0_nand0ahb0_sdramahb0_mipi_hsiahb0_sataahb0_tsahb0_spi0ahb0_spi1ahb0_spi2ahb0_spi3Ç Í clk@06000584§#2allwinner,sun9i-a80-ahb1-gates-clk]„âôR´ahb1_usbotgahb1_usbhciahb1_gmacahb1_msgboxahb1_spinlockahb1_hstimerahb1_dmaÇÍclk@06000588§#2allwinner,sun9i-a80-ahb2-gates-clk]ˆâ  ô N´ahb2_lcd0ahb2_lcd1ahb2_edpahb2_csiahb2_hdmiahb2_deahb2_mpahb2_mipi_dsiclk@06000590§#2allwinner,sun9i-a80-apb0-gates-clk]â $ô \´apb0_spdifapb0_pioapb0_ac97apb0_i2s0apb0_i2s1apb0_lradcapb0_gpadcapb0_twdapb0_cirtxÇ"Í"clk@06000594§#2allwinner,sun9i-a80-apb1-gates-clk]”â ,ôt´apb1_i2c0apb1_i2c1apb1_i2c2apb1_i2c3apb1_i2c4apb1_uart0apb1_uart1apb1_uart2apb1_uart3apb1_uart4apb1_uart5Ç#Í#clk@080014102allwinner,sun9i-a80-cpus-clk]§â  ´cpusÇÍahbs_clk2fixed-factor-clock§ â´ahbsÇÍclk@0800141c2allwinner,sun8i-a23-apb0-clk]§â´apbsÇÍclk@08001428#2allwinner,sun9i-a80-apbs-gates-clk](§â8ô Š´apbs_pioapbs_irapbs_timerapbs_rsbapbs_uartapbs_1wireapbs_i2c0apbs_i2c1apbs_ps2_0apbs_ps2_1apbs_dmaapbs_i2s0apbs_i2s1apbs_twdÇ'Í'clk@08001450]P§2allwinner,sun4i-a10-mod0-clkâ ´r_1wireclk@08001454]T§2allwinner,sun4i-a10-mod0-clkâ ´r_irÇ(Í(soc 2simple-bus  usb@00a00000&2allwinner,sun9i-a80-ehcigeneric-ehci]  aHâ#usb -disabledusb@00a00400&2allwinner,sun9i-a80-ohcigeneric-ohci]  aIâ#usb -disabledphy@00a008002allwinner,sun9i-a80-usb-phy] â4phy@phy -disabledLÇÍusb@00a01000&2allwinner,sun9i-a80-ehcigeneric-ehci]  aJâ#usb -disabledphy@00a018002allwinner,sun9i-a80-usb-phy] â 4hsic_480Mhsic_12Mphy @hsicphy -disabledLWhsicÇÍusb@00a02000&2allwinner,sun9i-a80-ehcigeneric-ehci]   aLâ#usb -disabledusb@00a02400&2allwinner,sun9i-a80-ohcigeneric-ohci] $ aMâ#usb -disabledphy@00a028002allwinner,sun9i-a80-usb-phy] (â 4hsic_480Mhsic_12Mphy @hsicphy -disabledLÇÍmmc@01c0f0002allwinner,sun9i-a80-mmc]Àð â4ahbmmcoutputsample@ahb a<-okay`defaultnx„Ž—mmc@01c100002allwinner,sun9i-a80-mmc]Á â4ahbmmcoutputsample@ahb a= -disabledmmc@01c110002allwinner,sun9i-a80-mmc]Á â4ahbmmcoutputsample@ahb a>-okay`defaultnx„£±mmc@01c120002allwinner,sun9i-a80-mmc]Á  â4ahbmmcoutputsample@ahb a? -disabledclk@01c13000#2allwinner,sun9i-a80-mmc-config-clk]Á0â 4ahb!@ahb§Õ0´mmc0_configmmc1_configmmc2_configmmc3_configÇÍinterrupt-controller@01c41000%2arm,cortex-a7-gicarm,cortex-a15-gic ]ÄÄ Ä@ Ä` Â× a ÇÍreset@060005a0Õ 2allwinner,sun6i-a31-clock-reset] Ç!Í!reset@060005a4Õ 2allwinner,sun6i-a31-clock-reset]¤reset@060005a8Õ 2allwinner,sun6i-a31-clock-reset]¨reset@060005b0Õ 2allwinner,sun6i-a31-clock-reset]°reset@060005b4Õ 2allwinner,sun6i-a31-clock-reset]´Ç$Í$timer@06000c002allwinner,sun4i-a10-timer]  Haâwatchdog@06000ca02allwinner,sun6i-a31-wdt]    apinctrl@060008002allwinner,sun9i-a80-pinctrl]<a xâ"èÂ×øÇÍi2c3@0 PG10PG11i2c3&6mmc0PF0PF1PF2PF3PF4PF5mmc0&6ÇÍmmc2_8bit3PC6PC7PC8PC9PC10PC11PC12PC13PC14PC15PC16mmc2&6ÇÍuart0@0 PH12PH13uart0&6Ç%Í%uart4@0PG12PG13PG14PG15uart4&6led-pins@0 PH6PH17 gpio_out&6Ç,Í,mmc0_cd_pin@0PH18gpio_in&6ÇÍserial@070000002snps,dw-apb-uart] aEOâ#$-okay`defaultn%serial@070004002snps,dw-apb-uart] aEOâ#$ -disabledserial@070008002snps,dw-apb-uart] aEOâ#$ -disabledserial@07000c002snps,dw-apb-uart]  aEOâ#$ -disabledserial@070010002snps,dw-apb-uart] aEOâ#$ -disabledserial@070014002snps,dw-apb-uart] aEOâ#$ -disabledi2c@070028002allwinner,sun6i-a31-i2c]( aâ#$ -disabledi2c@07002c002allwinner,sun6i-a31-i2c], aâ#$ -disabledi2c@070030002allwinner,sun6i-a31-i2c]0 aâ#$ -disabledi2c@070034002allwinner,sun6i-a31-i2c]4 a â#$ -disabledi2c@070038002allwinner,sun6i-a31-i2c]8 a â#$ -disabledwatchdog@080010002allwinner,sun6i-a31-wdt]  a$reset@080014b0]° 2allwinner,sun6i-a31-clock-resetÕÇ)Í)interrupt-controller@080015a02allwinner,sun9i-a80-nmiÂ×]   a Ç+Í+ir@080020002allwinner,sun5i-a13-ir a%`defaultn& â'(4apbir)] @-okayserial@080028002snps,dw-apb-uart]( a&EOâ') -disabledpinctrl@08002c002allwinner,sun9i-a80-r-pinctrl],a-.â')èÂ×ør_irPL6 s_cir_rx&6Ç&Í&r_rsbPN0PN1s_rsb&6Ç*Í*i2c@080034002allwinner,sun8i-a23-rsb]4 a'â'l-ÆÀ)`defaultn*-okaypmic@3a3]£+a2x-powers,axp809Â×regulatorsaldo1\p-ÆÀˆ-ÆÀ  vcc33-usbhaldo2pw@ˆw@ vcc-pb-io-camaldo3dc5ldo\p 5ˆÈà vdd-cpus-09-usbhdcdc1\p-ÆÀˆ-ÆÀ vcc-3vÇÍdcdc2p 5ˆÈà vdd-gpudcdc3\p 5ˆÈà  vdd-cpuadcdc4\p 5ˆÈà vdd-sys-usb0-hdmidcdc5\p¾hˆX  vcc-dramdldo1p2Z ˆ2Z   vcc-wifidldo2\p-ÆÀˆ-ÆÀ vcc-pleldo1pO€ˆO€  vcc-dvdd-cameldo2pw@ˆw@ vcc-peeldo3\p-ÆÀˆ-ÆÀ vcc-pm-codec-io1ldo_io0\p-ÆÀˆ-ÆÀ vcc-pgldo_io1p&% ˆ&%  vcc-pa-gmac-2v5rtc_ldo vcc-rtc-vdd1v8-ioleds 2gpio-leds`defaultn,green¯cubieboard4:green:usr‘red¯cubieboard4:red:usr‘ #address-cells#size-cellsinterrupt-parentmodelcompatiblestdout-pathserial0device_typereginterruptsclock-frequencyarm,cpu-registers-not-fw-configuredranges#clock-cellsclock-output-nameslinux,phandle#reset-cellsclocksclock-rateclock-indicesclock-divclock-multresetsphysphy-namesstatusclock-namesreset-names#phy-cellsphy_typepinctrl-namespinctrl-0vmmc-supplybus-widthcd-gpioscd-invertednon-removablecap-mmc-hw-resetinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsallwinner,pinsallwinner,functionallwinner,driveallwinner,pullreg-shiftreg-io-widthregulator-always-onregulator-min-microvoltregulator-max-microvoltregulator-namelabel