w8( Pgoogle,veyron-minnie-rev4google,veyron-minnie-rev3google,veyron-minnie-rev2google,veyron-minnie-rev1google,veyron-minnie-rev0google,veyron-minniegoogle,veyronrockchip,rk3288&7Google Minniechosenaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/spi@ff110000/ec@0/i2c-tunnelmemorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12h w@\@p@ @@OOa sB@ ~ ' 9 K 0 *@8?KQcpu@501cpuarm,cortex-a12KQcpu@502cpuarm,cortex-a12KQcpu@503cpuarm,cortex-a12KQamba simple-busYdma-controller@ff250000arm,pl330arm,primecell%@`k8 apb_pclkKQdma-controller@ff600000arm,pl330arm,primecell`@`k8 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@`k8 apb_pclkKWQWreserved-memoryYdma-unusable@fe000000oscillator fixed-clockn6xin24mK Q timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 8 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 8Drvbiuciuciu-driveciu-sample  @okay-> P YZw defaultdwmmc@ff0d0000rockchip,rk3288-dw-mshcр 8Eswbiuciuciu-driveciu-sample ! @okay- wdefault dwmmc@ff0e0000rockchip,rk3288-dw-mshcр 8Ftxbiuciuciu-driveciu-sample "@ disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 8Guybiuciuciu-driveciu-sample #@okayY wdefault saradc@ff100000rockchip,saradc $.8I[saradcapb_pclkW @saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi8ARspiclkapb_pclkL  Qtxrx ,default !"okayec@0google,cros-ec-spi[& default#x-i2c-tunnelgoogle,cros-ec-i2c-tunnelbq27500@55 ti,bq27500Ukeyboard-controllergoogle,cros-ec-keyb @};0DY1 d>"A#( C  \=@V B |)<?   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ispi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi8BSspiclkapb_pclkL Qtxrx -default$%&' disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi8CTspiclkapb_pclkLQtxrx .default()*+okay flash@0jedec,spi-norxi2c@ff140000rockchip,rk3288-i2c >i2c8Mdefault,okay2dtpm@20infineon,slb9645tt (i2c@ff150000rockchip,rk3288-i2c ?i2c8Odefault-okay2,touchscreen@10elan,ekth3500&.default/0 @.L1Y1i2c@ff160000rockchip,rk3288-i2c @i2c8Pdefault2okay2,ts3a227e@3b ti,ts3a227e;&3default4fKQtrackpad@15elan,ekth3000& default5q6|i2c@ff170000rockchip,rk3288-i2c Ai2c8Qdefault7okay,KjQjserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 78MUbaudclkapb_pclkdefault 89:okayMlserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 88NVbaudclkapb_pclkdefault;okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 98OWbaudclkapb_pclkdefault<okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :8PXbaudclkapb_pclkdefault= disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;8QYbaudclkapb_pclkdefault> disabledthermal-zonesreserve_thermal?cpu_thermald?tripscpu_alert0ppassiveK@Q@cpu_alert1$passiveKAQAcpu_crit_ criticalcooling-mapsmap0@ map1A gpu_thermald?tripsgpu_alert0ppassiveKBQBgpu_crit_ criticalcooling-mapsmap0B tsadc@ff280000rockchip,rk3288-tsadc( %8HZtsadcapb_pclk @tsadc-apbinitdefaultsleepC%D/C9Osokayf}K?Q?ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irqE88fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB @stmmaceth disabledusb@ff500000 generic-ehciP 8usbhostFusbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 8otghostG usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 8otghost@@ H usb2-phyokayzHusb@ff5c0000 generic-ehci\ 8usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c8LdefaultIokay2dpmic@1brockchip,rk808xin32kwifibt_32kin&3default JKL3|T`lxM6MMK~Q~regulatorsDCDC_REG1vdd_arm  q5 MqKQregulator-state-membDCDC_REG2vdd_gpu  55Mqregulator-state-mem{B@DCDC_REG3 vcc135_ddr regulator-state-mem{DCDC_REG4vcc_18 w@5w@KQregulator-state-mem{w@LDO_REG1 vcc33_io 2Z52ZK6Q6regulator-state-mem{2ZLDO_REG3vdd_10 B@5B@regulator-state-mem{B@LDO_REG7vdd10_lcd_pwren_h &%5&%regulator-state-membSWITCH_REG1 vcc33_lcd KUQUregulator-state-membLDO_REG6 vcc18_codec w@5w@KVQVregulator-state-membLDO_REG4 vccio_sdw@52ZKQregulator-state-membLDO_REG5 vcc33_sd2Z52ZK Q regulator-state-membLDO_REG8 vcc33_ccd 2Z52Zregulator-state-mem{2ZLDO_REG22Z52Z vcc33_touchK1Q1regulator-state-membSWITCH_REG2 vcc5v_touchregulator-state-membi2c@ff660000rockchip,rk3288-i2cf =i2c8NdefaultNokay2 max98090@10maxim,max98090&Omclk8qdefaultPKQpwm@ff680000rockchip,rk3288-pwmhdefaultQ8^pwmokayKQpwm@ff680010rockchip,rk3288-pwmhdefaultR8^pwmokaypwm@ff680020rockchip,rk3288-pwmh defaultS8^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0defaultT8^pwm disabledbus_intmem@ff700000 mmio-sramp Ypsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsKQpower-controller!rockchip,rk3288-power-controllerh KZQZpd_vio@9 8chgfdehilkjpd_hevc@11 8oppd_video@12 8pd_gpu@13 8syscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruvEHjk$#gׄeрxhрxhKQsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwKEQEedp-phyrockchip,rk3288-dp-phy8h24mokayKeQeio-domains"rockchip,rk3288-io-voltage-domainokay6 66'U3?VLwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt8p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdifZ hclkmclk8TLWQtx 6defaultXE disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5LWWQtxrxi2s_hclki2s_clk8RdefaultYkokayKQcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 8}aclkhclksclkapb_pclk @crypto-rstokayvop@ff930000rockchip,rk3288-vop 8aclk_vopdclk_vophclk_vopZ def @axiahbdclk[okayportK Q endpoint@0\KkQkendpoint@1]KgQgendpoint@2^KcQciommu@ff930300rockchip,iommu  vopb_mmuZ okayK[Q[vop@ff940000rockchip,rk3288-vop 8aclk_vopdclk_vophclk_vopZ  @axiahbdclk_okayportK Q endpoint@0`KlQlendpoint@1aKhQhendpoint@2bKdQdiommu@ff940300rockchip,iommu  vopl_mmuZ okayK_Q_mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 8~d refpclkZ E disabledportsportendpoint@0cK^Q^endpoint@1dKbQbdp@ff970000rockchip,rk3288-dp@ b8icdppclkedpo@dpEokaydefaultfportsport@0endpoint@0gK]Q]endpoint@1hKaQaport@1endpointiKQhdmi@ff980000rockchip,rk3288-dw-hdmiE g8hm iahbisfrZ okayjportsportendpoint@0kK\Q\endpoint@1lK`Q`interrupt-controller@ffc01000 arm,gic-400  @ `   KQefuse@ffb40000rockchip,rockchip-efuse 8q pclk_efusecpu_leakage@17phyrockchip,rk3288-usb-phyEokayusb-phy@320 8]phyclkKHQHusb-phy@33448^phyclkKFQFusb-phy@348H8_phyclkKGQGpinctrlrockchip,rk3288-pinctrlEYdefaultsleepmn%mogpio0@ff750000rockchip,gpio-banku Q8@  K3Q3gpio1@ff780000rockchip,gpio-bankx R8A  gpio2@ff790000rockchip,gpio-banky S8B  K.Q.gpio3@ff7a0000rockchip,gpio-bankz T8C  gpio4@ff7b0000rockchip,gpio-bank{ U8D  KQgpio5@ff7c0000rockchip,gpio-bank| V8E  K{Q{gpio6@ff7d0000rockchip,gpio-bank} W8F  KOQOgpio7@ff7e0000rockchip,gpio-bank~ X8G  K Q gpio8@ff7f0000rockchip,gpio-bank Y8H  hdmihdmi-ddc ppvcc50-hdmi-en pKQpcfg-pull-up .KqQqpcfg-pull-down ;KrQrpcfg-pull-none JKpQppcfg-pull-none-12ma J W KtQtsleepglobal-pwroff pKmQmddrio-pwroff pddr0-retention qddr1-retention qedpedp-hpd  rKfQfi2c0i2c0-xfer ppKIQIi2c1i2c1-xfer ppK,Q,i2c2i2c2-xfer  p pKNQNi2c3i2c3-xfer ppK-Q-i2c4i2c4-xfer ppK2Q2i2c5i2c5-xfer ppK7Q7i2s0i2s0-bus` ppppppKYQYsdmmcsdmmc-clk sKQsdmmc-cmd sKQsdmmc-cd qsdmmc-bus1 qsdmmc-bus4@ ssssKQsdmmc-cd-disabled pKQsdmmc-cd-gpio pKQsdio0sdio0-bus1 qsdio0-bus4@ ssssKQsdio0-cmd sKQsdio0-clk sKQsdio0-cd qsdio0-wp qsdio0-pwr qsdio0-bkpwr qsdio0-int qwifienable-h pKQbt-enable-l pKQsdio1sdio1-bus1 qsdio1-bus4@ qqqqsdio1-cd qsdio1-wp qsdio1-bkpwr qsdio1-int qsdio1-cmd qsdio1-clk psdio1-pwr  qemmcemmc-clk sKQemmc-cmd sKQemmc-pwr  qemmc-bus1 qemmc-bus4@ qqqqemmc-bus8 ssssssssKQemmc-reset  pK}Q}spi0spi0-clk  qKQspi0-cs0  qK"Q"spi0-tx qK Q spi0-rx qK!Q!spi0-cs1 qspi1spi1-clk  qK$Q$spi1-cs0  qK'Q'spi1-rx qK&Q&spi1-tx qK%Q%spi2spi2-cs1 qspi2-clk qK(Q(spi2-cs0 qK+Q+spi2-rx qK*Q*spi2-tx  qK)Q)uart0uart0-xfer qpK8Q8uart0-cts qK9Q9uart0-rts pK:Q:uart1uart1-xfer q pK;Q;uart1-cts  quart1-rts  puart2uart2-xfer qpK<Q<uart3uart3-xfer qpK=Q=uart3-cts  quart3-rts  puart4uart4-xfer  q pK>Q>uart4-cts quart4-rts ptsadcotp-gpio pKCQCotp-out pKDQDpwm0pwm0-pin pKQQQpwm1pwm1-pin pKRQRpwm2pwm2-pin pKSQSpwm3pwm3-pin pKTQTgmacrgmii-pins ppppttttppp ttpprmii-pins ppppppppppspdifspdif-tx  pKXQXpcfg-pull-none-drv-8ma J WKsQspcfg-pull-up-drv-8ma . Wpcfg-output-high fKvQvpcfg-output-low rKuQubuttonspwr-key-l qKwQwap-lid-int-l qKxQxvolum-down-l  qKyQyvolum-up-l  qKzQzpmicpmic-int-l qKJQJdvs-1  rKKQKdvs-2 rKLQLrebootap-warm-reset-h pK|Q|recovery-switchrec-mode-l qtpmtpm-int-h pwrite-protectfw-wp-ap pcodechp-det qKQint-codec rKPQPmic-det  qKQheadsetts3a227e-int-l qK4Q4backlightbl-en pKQbl_pwr_en  pKQchargerac-present-ap qKQcros-ecec-int pK#Q#suspendsuspend-l-wake uKnQnsuspend-l-sleep vKoQotrackpadtrackpad-int qK5Q5usb-hosthost1-pwr-en pKQusbotg-pwren-h pKQbuck-5vdrv-5v pKQlcdlcd-en pKQavdd-1v8-disp-en  pKQprochotgpio-prochot ptouchscreentouch-int pK/Q/touch-rst pK0Q0gpio-keys gpio-keysdefaultwxyzpower }Power S3 t d|lid }Lid S3|   volum_down }Volum_down S{  r dvolum_up }Volum_up S{  s dgpio-restart gpio-restart S3 default| emmc-pwrseqmmc-pwrseq-emmc}default @. KQsdio-pwrseqmmc-pwrseq-simple8~ ext_clockdefault @KQvcc-5vregulator-fixedvcc_5v LK@5LK@   defaultKMQMvcc33-sysregulator-fixed vcc33_sys 2Z52Z KQvcc50-hdmiregulator-fixed vcc50_hdmi  M  {defaultsound!rockchip,rockchip-audio-max98090default VEYRON-I2S   O /O  Fbacklightpwm-backlight ]  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~ o  default B@ ' KQgpio-charger gpio-charger mains S3defaultpanelauo,b101ean01simple-panelokay  portsportendpointKiQivccsysregulator-fixedvccsys KQvcc5-host1-regulatorregulator-fixed  3 default vcc5_host1 vcc5v-otg-regulatorregulator-fixed  3 default vcc5_host2 backlight-regulatorregulator-fixed  . defaultbacklight_regulator  :KQpanel-regulatorregulator-fixed  defaultpanel_regulator  KQvcc18-lcdregulator-fixed  . default vcc18_lcd   #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2i2c20device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaycd-gpiosrockchip,default-sample-phasenum-slotssd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplydisable-wppinctrl-namespinctrl-0cap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removable#io-channel-cellsreset-namesdmasdma-namesgoogle,cros-ec-spi-pre-delayspi-max-frequencygoogle,remote-buskeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymaprx-sample-delay-nsi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedreset-gpiosvcc33-supplyvccio-supplyti,micbiasvcc-supplywakeup-sourcereg-shiftreg-io-widthassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphysphy-namesneeds-reset-on-resumedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmaassigned-clock-parentsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc10-supplyvcc9-supplyvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cells#reset-cells#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplyaudio-supplysdcard-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowlabellinux,codedebounce-intervallinux,input-typepriorityvin-supplyenable-active-highgpiorockchip,modelrockchip,i2s-controllerrockchip,audio-codecrockchip,hp-det-gpiosrockchip,mic-det-gpiosrockchip,headset-codecbrightness-levelsdefault-brightness-levelenable-gpiosbacklight-boot-offpwmspwm-delay-uspower-supplycharger-typebacklightstartup-delay-us