Ð þí¢"8™X(Ê™ )compulab,am437x-cm-t43ti,am4372ti,am43&7CompuLab CM-T43chosenaliases=/ocp/i2c@44e0b000B/ocp/i2c@4802a000G/ocp/i2c@4819c000L/ocp/serial@44e09000T/ocp/serial@48022000\/ocp/serial@48024000d/ocp/serial@481a6000l/ocp/serial@481a8000t/ocp/serial@481aa000&|/ocp/ethernet@4a100000/slave@4a100200&†/ocp/ethernet@4a100000/slave@4a100300/ocp/qspi@47900000memory•memory¡cpuscpu@0arm,cortex-a9•cpu¡¥¬cpu¸Ì?Üê“àø(B@KP 59à ü€O€ 'ÀÈà“à~ðopp_table0operating-points-v2opp50@300000000#ᣠ*~ð4¸É(8ÿIopp100@600000000##ÃF *ÈàrðÐ8ÿopp120@720000000#*êT *O€ñÀ­@8ÿoppturbo@800000000#/¯ *9à×pœP8ÿoppnitro@1000000000#;šÊ *7ÈÐDŸL8ÿ interrupt-controller@48241000arm,cortex-a9-gicUj¡H$H$&interrupt-controller@48281000ti,omap4-wugen-mpuUj¡H(&scu@48240000arm,cortex-a9-scu¡H$timer@48240200arm,cortex-a9-global-timer¡H$ { &¥timer@48240600arm,cortex-a9-twd-timer¡H$ { &¥l2-cache-controller@48242000arm,pl310-cache¡H$ †”ocpti,am4372-l3-nocsimple-bus §l3_main¡D@D€@{  l4_wkup@44c00000ti,am4-l4-wkupsimple-bus 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ti,mux-clock¥/012Z¡@..sysboot_freq_sel_ck@44e10040Ê ti,mux-clock¥/012Z¡@--adc_tsc_fckÊfixed-factor-clock¥2=KKdcan0_fckÊfixed-factor-clock¥2=XXdcan1_fckÊfixed-factor-clock¥2=YYmcasp0_fckÊfixed-factor-clock¥2=mcasp1_fckÊfixed-factor-clock¥2=smartreflex0_fckÊfixed-factor-clock¥2=smartreflex1_fckÊfixed-factor-clock¥2=sha0_fckÊfixed-factor-clock¥2=aes0_fckÊfixed-factor-clock¥2=rng_fckÊfixed-factor-clock¥2=ehrpwm0_tbclk@664Êti,gate-clock¥3Z¡dEEehrpwm1_tbclk@664Êti,gate-clock¥3Z¡dFFehrpwm2_tbclk@664Êti,gate-clock¥3Z¡dGGehrpwm3_tbclk@664Êti,gate-clock¥3Z¡dHHehrpwm4_tbclk@664Êti,gate-clock¥3Z¡dIIehrpwm5_tbclk@664Êti,gate-clock¥3Z¡dJJwkup_m3_ipc@1324ti,am4372-wkup-m3-ipc¡$D {N 456dma-router@f90ti,am335x-edma-crossbar¡@&@37clockdomainsemif@4c000000ti,emif-am4372¡L§emifedma@49000000ti,edma3-tpcc§tpcc¡I ±edma3_cc${  '?edma3_ccintedma3_mperredma3_ccerrint&@O89:X:;77tptc@49800000ti,edma3-tptc§tptc0¡I€ {p?edma3_tcerrint88tptc@49900000ti,edma3-tptc§tptc1¡I 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ti,tps65218¡$ {&Ujregulator-dcdc1ti,tps65218-dcdc1 vdd_core% ê€=tÀUgregulator-dcdc2ti,tps65218-dcdc2vdd_mpu% ê€=ÐUgregulator-dcdc3ti,tps65218-dcdc3vdcdc3{%ã`=ã`Ugregulator-dcdc5ti,tps65218-dcdc5v1_0bat%B@=B@Ugregulator-dcdc6ti,tps65218-dcdc6v1_8bat%w@=w@Ugregulator-ldo1ti,tps65218-ldo1%w@=w@Ugat24@50 atmel,24c02¡P”i2c@4802a000ti,am4372-i2cti,omap4-i2c¡H  {G§i2c2 pdisabledi2c@4819c000ti,am4372-i2cti,omap4-i2c¡HÀ {§i2c3 pdisabledspi@48030000ti,am4372-mcspiti,omap4-mcspi¡H {A§spi0pokayßdefaultí<77¢tx0rx0w25q64cvzpig@0jedec,spi-nor¡¬1-partition@0¾uboot¡ partition@c0000¾uboot environment¡ partition@100000 ¾reserved¡mmc@48060000ti,omap4-hsmmc¡H§mmc1ÄÑ77¢txrx {@ pdisabledmmc@481d8000ti,omap4-hsmmc¡H€§mmc2Ñ77¢txrx {pokayßdefaultí=è>ôþmmc@47810000ti,omap4-hsmmc¡G§mmc3Ñ { pdisabledspi@481a0000ti,am4372-mcspiti,omap4-mcspi¡H {}§spi1 pdisabledspi@481a2000ti,am4372-mcspiti,omap4-mcspi¡H  {~§spi2 pdisabledspi@481a4000ti,am4372-mcspiti,omap4-mcspi¡H@ {ˆ§spi3 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#address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2serial0serial1serial2serial3serial4serial5ethernet0ethernet1spi0device_typeregclocksclock-namesoperating-points-v2ti,syscon-efuseti,syscon-revclock-latencycpu0-supplyoperating-pointslinux,phandleopp-hzopp-microvoltopp-supported-hwopp-suspendinterrupt-controller#interrupt-cellsinterruptscache-unifiedcache-levelrangesti,hwmodsreg-namesti,pm-firmware#clock-cellsclock-frequencyti,max-divti,autoidle-shiftti,index-starts-at-oneti,invert-autoidle-bitclock-multclock-divti,set-rate-parentti,bit-shiftti,dividersti,clock-multti,clock-divti,index-power-of-twopinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinsti,rprocmboxes#dma-cellsdma-requestsdma-mastersinterrupt-namesti,tptcsti,edma-memcpy-channelsstatus#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-send-noirqti,mbox-txti,mbox-rxti,timer-alwonti,timer-pwmgpio-controller#gpio-cells#hwlock-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onregulator-suspend-enablepagesizedmasdma-namesspi-max-frequencylabelti,dual-voltti,needs-special-resetvmmc-supplybus-widthti,non-removableassigned-clocksassigned-clock-ratescpdma_channelsale_entriesbd_ram_sizeno_bd_rammac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftsyscondual_emacbus_freqmac-addressphy_idphy-modedual_emac_res_vlan#pwm-cellsti,wiresti,x-plate-resistanceti,coordiante-readoutsti,wire-config#io-channel-cellsti,adc-channelsgpmc,num-csgpmc,num-waitpinsti,nand-ecc-optti,elm-idnand-bus-widthgpmc,device-widthgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,clk-activation-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nssyscon-phy-power#phy-cellsutmi-modephysphy-namesmaximum-speeddr_modesnps,dis_u3_susphy_quirksnps,dis_u2_susphy_quirksyscon-raminitgpioslinux,default-triggerenable-active-high