O8}(?|4isee,am335x-base0033isee,am335x-igep0033ti,am33xx&$7IGEP COM AM335x on AQUILA Expansionchosenaliases=/ocp/i2c@44e0b000B/ocp/i2c@4802a000G/ocp/i2c@4819c000L/ocp/serial@44e09000T/ocp/serial@48022000\/ocp/serial@48024000d/ocp/serial@481a6000l/ocp/serial@481a8000t/ocp/serial@481aa000|/ocp/can@481cc000/ocp/can@481d0000/ocp/usb@47400000/usb@47401000/ocp/usb@47400000/usb@47401800#/ocp/usb@47400000/usb-phy@47401300#/ocp/usb@47400000/usb-phy@47401b00&/ocp/ethernet@4a100000/slave@4a100200&/ocp/ethernet@4a100000/slave@4a100300memorymemorycpuscpu@0arm,cortex-a8cpucpuopp_table0operating-points-v2!'opp50@300000000/ 6~4(DUopp100@275000000/d* 6rDUopp100@300000000/ 6rD Uopp100@500000000/e 6rDopp100@600000000/#F 6rD@opp120@600000000/#F 6O@Dopp120@720000000/*T 6O@Doppturbo@720000000/*T 69pPDoppturbo@800000000// 69pPDoppnitro@1000000000/; 67DLDpmuarm,cortex-a8-pmuasocti,omap-inframpu ti,omap3-mpulmpuocp simple-busvll3_mainl4_wkup@44c00000ti,am3-l4-wkupsimple-bus vD(wkup_m3@100000ti,am3352-wkup-m3@  }umemdmemlwkup_m3am335x-pm-firmware.elf!'''prcm@200000 ti,am3-prcm @clocksclk_32768_ck fixed-clock!'clk_rc32k_ck fixed-clock}!'virt_19200000_ck fixed-clock$!"'"virt_24000000_ck fixed-clockn6!#'#virt_25000000_ck fixed-clock}x@!$'$virt_26000000_ck fixed-clock!%'%tclkin_ck fixed-clock!'dpll_core_ck@490ti,am3-dpll-core-clock \h!'dpll_core_x2_ckti,am3-dpll-x2-clock!'dpll_core_m4_ck@480ti,divider-clock!'dpll_core_m5_ck@484ti,divider-clock!'dpll_core_m6_ck@4d8ti,divider-clockdpll_mpu_ck@488ti,am3-dpll-clock  ,!'dpll_mpu_m2_ck@4a8ti,divider-clockdpll_ddr_ck@494ti,am3-dpll-no-gate-clock 4@! ' dpll_ddr_m2_ck@4a0ti,divider-clock ! ' dpll_ddr_m2_div2_ckfixed-factor-clock dpll_disp_ck@498ti,am3-dpll-no-gate-clock HT! ' dpll_disp_m2_ck@4a4ti,divider-clock !'dpll_per_ck@48c!ti,am3-dpll-no-gate-j-type-clock p! ' dpll_per_m2_ck@4acti,divider-clock ! ' dpll_per_m2_div4_wkupdm_ckfixed-factor-clock dpll_per_m2_div4_ckfixed-factor-clock cefuse_fck@a20ti,gate-clock clk_24mhzfixed-factor-clock !'clkdiv32k_ckfixed-factor-clock!'clkdiv32k_ick@14cti,gate-clockL!'l3_gclkfixed-factor-clock!'pruss_ocp_gclk@530 ti,mux-clock0mmu_fck@914ti,gate-clock timer1_fck@528 ti,mux-clock(timer2_fck@508 ti,mux-clock timer3_fck@50c ti,mux-clock  timer4_fck@510 ti,mux-clock timer5_fck@518 ti,mux-clock timer6_fck@51c ti,mux-clock timer7_fck@504 ti,mux-clock usbotg_fck@47cti,gate-clock |dpll_core_m4_div2_ckfixed-factor-clock!'ieee5000_fck@e4ti,gate-clockwdt1_fck@538 ti,mux-clock8l4_rtc_gclkfixed-factor-clockl4hs_gclkfixed-factor-clockl3s_gclkfixed-factor-clockl4fw_gclkfixed-factor-clockl4ls_gclkfixed-factor-clock!&'&sysclk_div_ckfixed-factor-clockcpsw_125mhz_gclkfixed-factor-clock!;';cpsw_cpts_rft_clk@520 ti,mux-clock !<'<gpio0_dbclk_mux_ck@53c ti,mux-clock <!'gpio0_dbclk@408ti,gate-clockgpio1_dbclk@acti,gate-clockgpio2_dbclk@b0ti,gate-clockgpio3_dbclk@b4ti,gate-clocklcd_gclk@534 ti,mux-clock  4!'mmc_clkfixed-factor-clock gfx_fclk_clksel_ck@52c ti,mux-clock ,!'gfx_fck_div_ck@52cti,divider-clock,sysclkout_pre_ck@700 ti,mux-clock !'clkout2_div_ck@700ti,divider-clock!!'!dbg_sysclk_ck@414ti,gate-clock!'dbg_clka_ck@414ti,gate-clock!'stm_pmd_clock_mux_ck@414 ti,mux-clock!'trace_pmd_clk_mux_ck@414 ti,mux-clock! ' stm_clk_div_ck@414ti,divider-clock@ trace_clk_div_ck@414ti,divider-clock @ clkout2_ck@700ti,gate-clock!clockdomainsclk_24mhz_clkdmti,clockdomainscm@210000ti,am3-scmsimple-bus!  v! pinmux@800pinctrl-single8 >pinmux_i2c0_pins[00!/'/pinmux_nandflash_pinsx[000 00000p0t7|!>'>pinmux_uart0_pins[p0t!.'.pinmux_leds_pins[\!A'Apinmux_nxp_hdmi_pins[ !D'Dpinmux_nxp_hdmi_off_pins[ !E'Epinmux_leds_base_pins[T!F'Fscm_conf@0syscon!'clockssys_clkin_ck@40 ti,mux-clock"#$%@!'adc_tsc_fckfixed-factor-clockdcan0_fckfixed-factor-clock!2'2dcan1_fckfixed-factor-clock!3'3mcasp0_fckfixed-factor-clockmcasp1_fckfixed-factor-clocksmartreflex0_fckfixed-factor-clocksmartreflex1_fckfixed-factor-clocksha0_fckfixed-factor-clockaes0_fckfixed-factor-clockrng_fckfixed-factor-clockehrpwm0_tbclk@44e10664ti,gate-clock&d!8'8ehrpwm1_tbclk@44e10664ti,gate-clock&d!9'9ehrpwm2_tbclk@44e10664ti,gate-clock&d!:':wkup_m3_ipc@1324ti,am3352-wkup-m3-ipc$$aNo'x()dma-router@f90ti,am335x-edma-crossbar@ *!1'1clockdomainsinterrupt-controller@48200000ti,am33xx-intcH !'edma@49000000ti,edma3-tpccltpccI }edma3_cc a 'edma3_ccintedma3_mperredma3_ccerrint@+,-!*'*tptc@49800000ti,edma3-tptcltptc0Iapedma3_tcerrint!+'+tptc@49900000ti,edma3-tptcltptc1Iaqedma3_tcerrint!,',tptc@49a00000ti,edma3-tptcltptc2Iaredma3_tcerrint!-'-gpio@44e07000ti,omap4-gpiolgpio1 Dpa`gpio@4804c000ti,omap4-gpiolgpio2 Hab!B'Bgpio@481ac000ti,omap4-gpiolgpio3 Ha !G'Ggpio@481ae000ti,omap4-gpiolgpio4 Ha>serial@44e09000ti,am3352-uartti,omap3-uartluart1lD aHokay**"txrx,default:.serial@48022000ti,am3352-uartti,omap3-uartluart2lH aI disabled**"txrxserial@48024000ti,am3352-uartti,omap3-uartluart3lH@ aJ disabled**"txrxserial@481a6000ti,am3352-uartti,omap3-uartluart4lH` a, disabledserial@481a8000ti,am3352-uartti,omap3-uartluart5lH a- disabledserial@481aa000ti,am3352-uartti,omap3-uartluart6lH a. disabledi2c@44e0b000 ti,omap4-i2cli2c1DaFokay,default:/!C'Ctps@2d- ti,tps65910D0P0\0h0t0000regulatorsregulator@0vrtcregulator@1vioregulator@2vdd1vdd_mpu t !'regulator@3vdd2 vdd_core t0 regulator@4vdd3regulator@5vdig1regulator@6vdig2regulator@7vpllregulator@8vdacregulator@9 vaux1regulator@10 vaux2regulator@11 vaux33regulator@12 vmmcregulator@13 vbbeeprom@50 at,24c256Pi2c@4802a000 ti,omap4-i2cli2c2HaG disabledi2c@4819c000 ti,omap4-i2cli2c3Ha disabledmmc@48060000ti,omap4-hsmmclmmc1,C 11"txrxa@&Hokay`0lmmc@481d8000ti,omap4-hsmmclmmc2,**"txrxa&H disabledmmc@47810000ti,omap4-hsmmclmmc3,a&G disabledspinlock@480ca000ti,omap4-hwspinlockH  lspinlockvwdt@44e35000 ti,omap3-wdt lwd_timer2DPa[can@481cc000ti,am3352-d_canld_can0H 2fck Da4 disabledcan@481d0000ti,am3352-d_canld_can1H 3fck Da7 disabledmailbox@480C8000ti,omap4-mailboxH aMlmailbox!('(wkup_m3  !)')timer@44e31000ti,am335x-timer-1msDaCltimer1timer@48040000ti,am335x-timerHaDltimer2timer@48042000ti,am335x-timerH aEltimer3timer@48044000ti,am335x-timerH@a\ltimer4timer@48046000ti,am335x-timerH`a]ltimer5timer@48048000ti,am335x-timerHa^ltimer6timer@4804a000ti,am335x-timerHa_ltimer7rtc@44e3e000ti,am3352-rtcti,da830-rtcDaKLlrtcspi@48030000ti,omap4-mcspiHaAlspi00****"tx0rx0tx1rx1 disabledspi@481a0000ti,omap4-mcspiHa}lspi10***+*,*-"tx0rx0tx1rx1 disabledusb@47400000ti,am33xx-usbG@v lusb_otg_hsokaycontrol@44e10620ti,am335x-usb-ctrl-moduleD DH}phy_ctrlwakeupokay!4'4usb-phy@47401300ti,am335x-usb-phyG@}phyokay4!5'5usb@47401000ti,musb-am33xxokayG@G@ }mccontrolamc"otg*<K [h5h6666666666 6 6 6 6 66666666666 6 6 6 6 6"rx1rx2rx3rx4rx5rx6rx7rx8rx9rx10rx11rx12rx13rx14rx15tx1tx2tx3tx4tx5tx6tx7tx8tx9tx10tx11tx12tx13tx14tx15usb-phy@47401b00ti,am335x-usb-phyG@}phyokay4!7'7usb@47401800ti,musb-am33xxokayG@G@ }mccontrolamc"host*<K [h7h666666666666666666666666666666"rx1rx2rx3rx4rx5rx6rx7rx8rx9rx10rx11rx12rx13rx14rx15tx1tx2tx3tx4tx5tx6tx7tx8tx9tx10tx11tx12tx13tx14tx15dma-controller@47402000ti,am3359-cppi41 G@G@ G@0G@@@#}gluecontrollerschedulerqueuemgragluem{okay!6'6epwmss@48300000ti,am33xx-pwmssH0lepwmss0 disabled$vH0H0H0H0H0H0ecap@48300100ti,am3352-ecapti,am33xx-ecapH0&fckaecap0 disabledpwm@48300200"ti,am3352-ehrpwmti,am33xx-ehrpwmH08& tbclkfck disabledepwmss@48302000ti,am33xx-pwmssH0 lepwmss1 disabled$vH0!H0!H0!H0!H0"H0"ecap@48302100ti,am3352-ecapti,am33xx-ecapH0!&fcka/ecap1 disabledpwm@48302200"ti,am3352-ehrpwmti,am33xx-ehrpwmH0"9& tbclkfck disabledepwmss@48304000ti,am33xx-pwmssH0@lepwmss2 disabled$vH0AH0AH0AH0AH0BH0Becap@48304100ti,am3352-ecapti,am33xx-ecapH0A&fcka=ecap2 disabledpwm@48304200"ti,am3352-ehrpwmti,am33xx-ehrpwmH0B:& tbclkfck disabledethernet@4a100000ti,am335x-cpswti,cpswlcpgmac0;< fckcpts  JJ&a()*+vokaymdio@4a101000ti,cpsw-mdioti,davinci_mdio ldavinci_mdio B@Jokay!='=slave@4a100200"=)rmiislave@4a100300"=)rmiicpsw-phy-sel@44e10650ti,am3352-cpsw-phy-selDP }gmii-sel2ocmcram@40300000 mmio-sram@0elm@48080000ti,am3352-elmH alelmokay!@'@lcdc@4830e000ti,am33xx-tilcdcH0&a$llcdcokaytscadc@44e0d000ti,am3359-tscadcD&aladc_tsc disabledtscti,am3359-tscadcAti,am3359-adcgpmc@50000000ti,am3352-gpmclgpmcSP ad *4"rxtxfr okay,default:>v!?'?nand@0,0ti,omap2-nand &?a ?bch8,,"#,6D(Sa6p@RR(@partition@0SPLpartition@1U-bootpartition@2 U-Boot Env&partition@3Kernel(Ppartition@4 File Systemxsham@53100000ti,omap4-shamlshamSam *$"rxaes@53500000 ti,omap4-aeslaesSPag**"txrxmcasp@48038000ti,am33xx-mcasp-audiolmcasp0H F@}mpudataPQtxrx disabled** "txrxmcasp@4803C000ti,am33xx-mcasp-audiolmcasp1H F@@}mpudataRStxrx disabled* * "txrxrng@48310000 ti,omap4-rnglrngH1 aoleds,default:A gpio-ledsled@0com:green:user B#onfixedregulator@0regulator-fixedvmmc2Z2Z !0'0hdmiti,tilcdc,slave1C ,defaultoff:D5Eokayleds_base,default:F gpio-ledsled@0base:red:user B#offled@1base:green:user G#off #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2serial0serial1serial2serial3serial4serial5d_can0d_can1usb0usb1phy0phy1ethernet0ethernet1device_typeregoperating-points-v2ti,syscon-efuseti,syscon-revclocksclock-namesclock-latencycpu0-supplylinux,phandleopp-hzopp-microvoltopp-supported-hwopp-suspendinterruptsti,hwmodsrangesreg-namesti,pm-firmware#clock-cellsclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-rate-parentti,bit-shiftti,index-power-of-twopinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsti,rprocmboxes#dma-cellsdma-requestsdma-mastersinterrupt-controller#interrupt-cellsinterrupt-namesti,tptcsti,edma-memcpy-channelsgpio-controller#gpio-cellsstatusdmasdma-namespinctrl-namespinctrl-0vcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-compatibleregulator-always-onregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onti,dual-voltti,needs-special-resetti,needs-special-hs-handlingvmmc-supplybus-width#hwlock-cellssyscon-raminit#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-send-noirqti,mbox-txti,mbox-rxti,timer-alwonti,timer-pwmti,spi-num-csti,ctrl_moddr_modementor,multipointmentor,num-epsmentor,ram-bitsmentor,powerphys#dma-channels#dma-requests#pwm-cellscpdma_channelsale_entriesbd_ram_sizeno_bd_rammac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftsysconbus_freqmac-addressphy_idphy-modermii-clock-ext#io-channel-cellsti,no-idle-on-initgpmc,num-csgpmc,num-waitpinsrb-gpiosnand-bus-widthti,nand-ecc-optgpmc,device-widthgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,clk-activation-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsti,elm-idlabeldefault-statei2cpinctrl-1