b8]<(],Merrii A31 Hummingbird+2merrii,a31-hummingbirdallwinner,sun6i-a31chosen=Dserial0:115200n8framebuffer@002allwinner,simple-framebuffersimple-framebufferPde_be0-lcd0-hdmic jdisabledframebuffer@102allwinner,simple-framebuffersimple-framebuffer Pde_be0-lcd0c jdisabledaliases q/soc@01c00000/ethernet@01c30000"{/soc@01c00000/i2c@01c2b400/rtc@51/soc@01c00000/rtc@01f00000/soc@01c00000/serial@01c28000memorymemory@timer2arm,armv7-timer0   n6cpusallwinner,sun6i-a31cpu@02arm,cortex-a7cpuc aO /O SB@ *<GMcpu@12arm,cortex-a7cpucpu@22arm,cortex-a7cpucpu@32arm,cortex-a7cputhermal-zonescpu_thermalUkycooling-mapsmap0 tripscpu_alert0ppassiveGMcpu_crit criticalpmu%2arm,cortex-a7-pmuarm,cortex-a15-pmu0xyz{clocks=osc24M 2fixed-clockn6GMclk@0 2fixed-clockosc32kG M clk@01c200002allwinner,sun6i-a31-pll1-clkcpll1G M clk@01c200282allwinner,sun6i-a31-pll6-clk(c pll6pll6x2GMcpu@01c200502allwinner,sun4i-a10-cpu-clkPc  cpuGMaxi@01c200502allwinner,sun4i-a10-axi-clkPcaxiG M ahb1@01c200542allwinner,sun6i-a31-ahb1-clkTc  ahb1 G M clk@01c20060#2allwinner,sun6i-a31-ahb1-gates-clk`c   $%(+,-./24789:zahb1_mipidsiahb1_ssahb1_dmaahb1_mmc0ahb1_mmc1ahb1_mmc2ahb1_mmc3ahb1_nand1ahb1_nand0ahb1_sdramahb1_gmacahb1_tsahb1_hstimerahb1_spi0ahb1_spi1ahb1_spi2ahb1_spi3ahb1_otgahb1_ehci0ahb1_ehci1ahb1_ohci0ahb1_ohci1ahb1_ohci2ahb1_veahb1_lcd0ahb1_lcd1ahb1_csiahb1_hdmiahb1_de0ahb1_de1ahb1_fe0ahb1_fe1ahb1_mpahb1_gpuahb1_deu0ahb1_deu1ahb1_drc0ahb1_drc1GMapb1@01c200542allwinner,sun4i-a10-apb0-clkTc apb1G M clk@01c20068#2allwinner,sun6i-a31-apb1-gates-clkhc  ?apb1_codecapb1_digital_micapb1_pioapb1_daudio0apb1_daudio1G"M"clk@01c200582allwinner,sun4i-a10-apb1-clkXc apb2GMclk@01c2006c#2allwinner,sun6i-a31-apb2-gates-clklc(japb2_i2c0apb2_i2c1apb2_i2c2apb2_i2c3apb2_uart0apb2_uart1apb2_uart2apb2_uart3apb2_uart4apb2_uart5G#M#clk@01c200882allwinner,sun4i-a10-mmc-clk cmmc0mmc0_outputmmc0_sampleGMclk@01c2008c2allwinner,sun4i-a10-mmc-clk cmmc1mmc1_outputmmc1_sampleGMclk@01c200902allwinner,sun4i-a10-mmc-clk cmmc2mmc2_outputmmc2_sampleGMclk@01c200942allwinner,sun4i-a10-mmc-clk cmmc3mmc3_outputmmc3_sampleGMclk@01c2009c2allwinner,sun4i-a10-mod0-clk cssG.M.clk@01c200a02allwinner,sun4i-a10-mod0-clk cspi0G/M/clk@01c200a42allwinner,sun4i-a10-mod0-clk cspi1G0M0clk@01c200a82allwinner,sun4i-a10-mod0-clk cspi2G1M1clk@01c200ac2allwinner,sun4i-a10-mod0-clk cspi3G2M2clk@01c200cc 2allwinner,sun6i-a31-usb-clkc 9usb_phy0usb_phy1usb_phy2usb_ohci0usb_ohci1usb_ohci2G M clk@1 2fixed-clock}x@ mii_phy_txGMclk@2 2fixed-clocksY@ gmac_int_txGMclk@01c200d02allwinner,sun7i-a20-gmac-clkcgmac_txG*M*soc@01c00000 2simple-bus=dma-controller@01c020002allwinner,sun6i-a31-dma  2cG%M%mmc@01c0f0002allwinner,sun5i-a13-mmc c(ahbmmcoutputsample4ahb <jokay@defaultNXdnwmmc@01c100002allwinner,sun5i-a13-mmc c (ahbmmcoutputsample 4ahb =jokay@defaultNXdmmc@01c110002allwinner,sun5i-a13-mmc c (ahbmmcoutputsample 4ahb > jdisabledmmc@01c120002allwinner,sun5i-a13-mmc  c (ahbmmcoutputsample 4ahb ? jdisabledusb@01c190002allwinner,sun6i-a31-musbc Gmcusb jdisabledphy@01c194002allwinner,sun6i-a31-usb-phyphy_ctrlpmu1pmu2c  (usb0_phyusb1_phyusb2_phy  !4usb0_resetusb1_resetusb2_resetjokay!GMusb@01c1a000&2allwinner,sun6i-a31-ehcigeneric-ehci Hcusbjokayusb@01c1a400&2allwinner,sun6i-a31-ohcigeneric-ohci Ic usbjokayusb@01c1b000&2allwinner,sun6i-a31-ehcigeneric-ehci Jcusb jdisabledusb@01c1b400&2allwinner,sun6i-a31-ohcigeneric-ohci Kc usb jdisabledusb@01c1c400&2allwinner,sun6i-a31-ohcigeneric-ohci Mc  jdisabledpinctrl@01c208002allwinner,sun6i-a31-pinctrl0 c" GMuart0@0 *PH20PH219uart0L\G&M&i2c0@0 *PH14PH159i2c0L\G'M'i2c1@0 *PH16PH179i2c1L\G(M(i2c2@0 *PH18PH199i2c2L\G)M)mmc0@0*PF0PF1PF2PF3PF4PF59mmc0L\GMmmc1@0*PG0PG1PG2PG3PG4PG59mmc1L\GMmmc2@0*PC6PC7PC8PC9PC10PC119mmc2L\mmc2@13*PC6PC7PC8PC9PC10PC11PC12PC13PC14PC15PC249mmc2L\gmac_mii@0T*PA0PA1PA2PA3PA8PA9PA11PA12PA13PA14PA19PA20PA21PA22PA23PA24PA26PA279gmacL\gmac_gmii@0*PA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15PA16PA17PA18PA19PA20PA21PA22PA23PA24PA25PA26PA279gmacL\gmac_rgmii@0F*PA0PA1PA2PA3PA9PA10PA11PA12PA13PA14PA19PA20PA25PA26PA279gmacL\G+M+ahci_pwr_pin@0*PB8 9gpio_outL\G<M<usb0_vbus_pin@0*PB9 9gpio_outL\G=M=usb1_vbus_pin@0*PH24 9gpio_outL\G>M>usb2_vbus_pin@0*PH3 9gpio_outL\G?M?gmac_phy_reset_pin@0*PA21 9gpio_outL\G,M,mmc0_cd_pin@0*PA89gpio_inL\GMwifi_reset_pin@0*PG10 9gpio_outL\GMreset@01c202c0 2allwinner,sun6i-a31-ahb1-reset GMreset@01c202d0  2allwinner,sun6i-a31-clock-resetreset@01c202d8  2allwinner,sun6i-a31-clock-resetG$M$timer@01c20c002allwinner,sun4i-a10-timer <cwatchdog@01c20ca02allwinner,sun6i-a31-wdt lradc@01c228002allwinner,sun4i-a10-lradc-keys(  jdisabledrtp@01c250002allwinner,sun6i-a31-tsP kGMserial@01c280002snps,dw-apb-uart€ c#$%%rxtxjokay@defaultN&serial@01c284002snps,dw-apb-uart„ c#$%%rxtx jdisabledserial@01c288002snps,dw-apb-uartˆ c#$%%rxtx jdisabledserial@01c28c002snps,dw-apb-uartŒ c#$% % rxtx jdisabledserial@01c290002snps,dw-apb-uart c#$% % rxtx jdisabledserial@01c294002snps,dw-apb-uart” c#$%%rxtx jdisabledi2c@01c2ac002allwinner,sun6i-a31-i2c¬ c#$jfailed@defaultN'i2c@01c2b0002allwinner,sun6i-a31-i2c° c#$jokay@defaultN(i2c@01c2b4002allwinner,sun6i-a31-i2c´ c#$jokay@defaultN)rtc@51 2nxp,pcf8563Qi2c@01c2b8002allwinner,sun6i-a31-i2c¸ c#$ jdisabledethernet@01c300002allwinner,sun7i-a20-gmacT Rmacirq c*(stmmacethallwinner_gmac_tx 4stmmacethjokay@defaultN+,-rgmii  'u0ethernet-phy@1G-M-crypto-engine@01c150002allwinner,sun4i-a10-cryptoP P c.(ahbmod4ahbtimer@01c6000082allwinner,sun6i-a31-hstimerallwinner,sun7i-a20-hstimer03456cspi@01c680002allwinner,sun6i-a31-spiƀ A c/(ahbmod%%rxtx jdisabledspi@01c690002allwinner,sun6i-a31-spiƐ B c0(ahbmod%%rxtx jdisabledspi@01c6a0002allwinner,sun6i-a31-spiƠ C c1(ahbmod%%rxtx jdisabledspi@01c6b0002allwinner,sun6i-a31-spiư D c2(ahbmod%%rxtx jdisabledinterrupt-controller@01c81000%2arm,cortex-a7-gicarm,cortex-a15-gic  @ `    GMrtc@01f000002allwinner,sun6i-a31-rtcT()interrupt-controller@01f00c0c2allwinner,sun6i-a31-sc-nmi  8 G;M;prcm@01f014002allwinner,sun6i-a31-prcmar100_clk2allwinner,sun6i-a31-ar100-clkc ar100G3M3ahb0_clk2fixed-factor-clock *c3ahb0G4M4apb0_clk2allwinner,sun6i-a31-apb0-clkc4apb0G5M5apb0_gates_clk#2allwinner,sun6i-a31-apb0-gates-clkc5Dapb0_pioapb0_irapb0_timerapb0_p2wiapb0_uartapb0_1wireapb0_i2cG6M6ir_clk2allwinner,sun4i-a10-mod0-clkc irG7M7apb0_rst 2allwinner,sun6i-a31-clock-reset G8M8cpucfg@01f01c002allwinner,sun6i-a31-cpuconfigir@01f020002allwinner,sun5i-a13-ir c67(apbir8 % @jokay@defaultN9pinctrl@01f02c002allwinner,sun6i-a31-r-pinctrl,-.c68 ir@0*PL49s_irL\G9M9p2wi*PL0PL19s_p2wiL\G:M:i2c@01f034002allwinner,sun6i-a31-p2wi4 'c68@defaultN:jokaypmic@682x-powers,axp221h; regulators5 dcdc1Hvcc-3v0Wk--GMdcdc2Hvdd-gpuk `$@dcdc3Hvdd-cpuWk `$@GMdcdc4 Hvdd-sys-dllWk `$@dcdc5 Hvcc-dramWk``dc1swHdc1swdc5ldo Hvdd-cpusk `$@aldo1 Hvcc-wifik2Z2ZGMaldo2Haldo2aldo3HavccWk)22Zdldo1Hdldo1dldo2Hdldo2dldo3Hdldo3dldo4Hdldo4eldo1Heldo1eldo2Heldo2eldo3Heldo3ldo_io0Hldo_io0ldo_io1Hldo_io1rtc_ldoWk--Hrtc_ldoahci-5v2regulator-fixed@defaultN<Hahci-5vkLK@LK@ jdisabledusb0-vbus2regulator-fixed@defaultN= Husb0-vbuskLK@LK@  jdisabledusb1-vbus2regulator-fixed@defaultN> Husb1-vbuskLK@LK@jokayG!M!usb2-vbus2regulator-fixed@defaultN? Husb2-vbuskLK@LK@ jdisabledvcc3v02regulator-fixedHvcc3v0k--vcc3v32regulator-fixedHvcc3v3k2Z2Zvcc5v02regulator-fixedHvcc5v0kLK@LK@wifi_pwrseq2mmc-pwrseq-simple GM #address-cells#size-cellsinterrupt-parentmodelcompatiblerangesstdout-pathallwinner,pipelineclocksstatusethernet0rtc0rtc1serial0device_typereginterruptsclock-frequencyarm,cpu-registers-not-fw-configuredenable-methodclock-latencyoperating-points#cooling-cellscooling-min-levelcooling-max-levelcpu-supplylinux,phandlepolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresis#clock-cellsclock-output-namesassigned-clocksassigned-clock-parentsclock-indices#reset-cellsresets#dma-cellsclock-namesreset-namespinctrl-namespinctrl-0vmmc-supplybus-widthcd-gpioscd-invertedmmc-pwrseqnon-removableinterrupt-namesphysphy-namesextconreg-names#phy-cellsusb1_vbus-supplygpio-controllerinterrupt-controller#interrupt-cells#gpio-cellsallwinner,pinsallwinner,functionallwinner,driveallwinner,pull#thermal-sensor-cellsreg-shiftreg-io-widthdmasdma-namessnps,pblsnps,fixed-burstsnps,force_sf_dma_modephyphy-modesnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usclock-divclock-multx-powers,dcdc-freqregulator-nameregulator-always-onregulator-min-microvoltregulator-max-microvoltregulator-boot-onenable-active-highreset-gpios