!8$( google,veyron-jaq-rev5google,veyron-jaq-rev4google,veyron-jaq-rev3google,veyron-jaq-rev2google,veyron-jaq-rev1google,veyron-jaqgoogle,veyronrockchip,rk3288& 7Google Jaqchosenaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/spi@ff110000/ec@0/i2c-tunnelmemorymemoryarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12` @p@ @OOa sB@ ~ ' 9  K 0 *@8?KQcpu@501cpuarm,cortex-a12KQcpu@502cpuarm,cortex-a12KQcpu@503cpuarm,cortex-a12KQamba arm,amba-busYdma-controller@ff250000arm,pl330arm,primecell%@`8 kapb_pclkKQdma-controller@ff600000arm,pl330arm,primecell`@`8 kapb_pclk wdisableddma-controller@ffb20000arm,pl330arm,primecell@`8 kapb_pclkKNQNreserved-memoryYdma-unusable@fe000000oscillator fixed-clock~n6xin24mK Q timerarm,armv7-timer0   ~n6timer@ff810000rockchip,rk3288-timer  H 8 a ktimerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 8Drvkbiuciuciu-driveciu-sample  @wokay# 5 >Z\fs defaultdwmmc@ff0d0000rockchip,rk3288-dw-mshcр 8Eswkbiuciuciu-driveciu-sample ! @wokay\default fsdwmmc@ff0e0000rockchip,rk3288-dw-mshcр 8Ftxkbiuciuciu-driveciu-sample "@ wdisableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 8Guykbiuciuciu-driveciu-sample #@wokay>\default saradc@ff100000rockchip,saradc $,8I[ksaradcapb_pclk wdisabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi8ARkspiclkapb_pclk>  Ctxrx ,default !"wokayec@0google,cros-ec-spiM& default#j-i2c-tunnelgoogle,cros-ec-i2c-tunnel|sbs-battery@bsbs,sbs-battery keyboard-controllergoogle,cros-ec-keyb <};0DY1 d>"A#( C  \=@V B |)<?  + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ispi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi8BSkspiclkapb_pclk> Ctxrx -default$%&' wdisabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi8CTkspiclkapb_pclk>Ctxrx .default()*+wokay i2c@ff140000rockchip,rk3288-i2c >ki2c8Mdefault,wokay~2,dtpm@20infineon,slb9645tt Ci2c@ff150000rockchip,rk3288-i2c ?ki2c8Odefault- wdisabledi2c@ff160000rockchip,rk3288-i2c @ki2c8Pdefault.wokay~2,,trackpad@15elan,ekth3000& default/[0fi2c@ff170000rockchip,rk3288-i2c Aki2c8Qdefault1wokay~,,KVQVserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7t~8MUkbaudclkapb_pclkdefault 234wokayMlserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8t~8NVkbaudclkapb_pclkdefault5wokayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9t~8OWkbaudclkapb_pclkdefault6wokayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :t~8PXkbaudclkapb_pclkdefault7 wdisabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;t~8QYkbaudclkapb_pclkdefault8 wdisabledthermal-zonesreserve_thermal9cpu_thermald9tripscpu_alert0ppassiveK:Q:cpu_alert1$passiveK;Q;cpu_crit_ criticalcooling-mapsmap0: map1; gpu_thermald9tripsgpu_alert0ppassiveK<Q<gpu_crit_ criticalcooling-mapsmap0< tsadc@ff280000rockchip,rk3288-tsadc( %8HZktsadcapb_pclk tsadc-apbinitdefaultsleep=>%=/Eswokay\sK9Q9ethernet@ff290000rockchip,rk3288-gmac) macirq?88fgc]Mkstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmaceth wdisabledusb@ff500000 generic-ehciP 8kusbhost@usbwokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 8kotghostA usb2-phywokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 8kotghost@@ B usb2-phywokayz]usb@ff5c0000 generic-ehci\ 8kusbhost wdisabledi2c@ff650000rockchip,rk3288-i2ce <ki2c8LdefaultCwokay~2,dpmic@1brockchip,rk808xin32kwifibt_32kin&Ddefault EFG)fJVbnzH0HH KiQiregulatorsDCDC_REG1vdd_arm q( @qKQregulator-state-memUDCDC_REG2vdd_gpu 5(@qregulator-state-memnB@DCDC_REG3 vcc135_ddrregulator-state-memnDCDC_REG4vcc_18w@(w@KQregulator-state-memnw@LDO_REG1 vcc33_io2Z(2ZK0Q0regulator-state-memn2ZLDO_REG3vdd_10B@(B@regulator-state-memnB@LDO_REG7vdd10_lcd_pwren_h&%(&%regulator-state-memUSWITCH_REG1 vcc33_lcdKhQhregulator-state-memULDO_REG4 vccio_sdw@(2ZKQregulator-state-memULDO_REG5 vcc33_sd2Z(2ZK Q regulator-state-memULDO_REG8 vcc33_ccd2Z(2Zregulator-state-memn2ZLDO_REG2mic_vccw@(w@regulator-state-memUi2c@ff660000rockchip,rk3288-i2cf =ki2c8NdefaultIwokay~2, pwm@ff680000rockchip,rk3288-pwmhdefaultJ8^kpwm wdisabledpwm@ff680010rockchip,rk3288-pwmhdefaultK8^kpwmwokaypwm@ff680020rockchip,rk3288-pwmh defaultL8^kpwm wdisabledpwm@ff680030rockchip,rk3288-pwmh0defaultM8^kpwm wdisabledbus_intmem@ff700000 mmio-sramp Ypsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsKQpower-controller!rockchip,rk3288-power-controllerh KQQQpd_vio 8chgfdehilkjpd_hevc 8oppd_video 8pd_gpu 8syscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv?Hjk$#gׄeрxhрxhKQsyscon@ff770000rockchip,rk3288-grfsysconwK?Q?watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt8p Owokaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif khclkmclk8T>NCtx UdefaultO? wdisabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s U>NNCtxrxki2s_hclki2s_clk8RdefaultP wdisabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 8}kaclkhclksclkapb_pclk crypto-rstwokayvop@ff930000rockchip,rk3288-vop 8kaclk_vopdclk_vophclk_vopQ def axiahbdclk"RwokayportK Q endpoint@0)SKWQWiommu@ff930300rockchip,iommu  vopb_mmuQ 9wokayKRQRvop@ff940000rockchip,rk3288-vop 8kaclk_vopdclk_vophclk_vopQ  axiahbdclk"T wdisabledportK Q endpoint@0)UKXQXiommu@ff940300rockchip,iommu  vopl_mmuQ 9 wdisabledKTQThdmi@ff980000rockchip,rk3288-dw-hdmi~? g8hm kiahbisfrQ wokayFVportsportendpoint@0)WKSQSendpoint@1)XKUQUinterrupt-controller@ffc01000 arm,gic-400Rg  @ `   KQefuse@ffb40000rockchip,rockchip-efuse 8q kpclk_efusecpu_leakage@17phyrockchip,rk3288-usb-phy?wokayusb-phy0x 8]kphyclkKBQBusb-phy1x48^kphyclkK@Q@usb-phy2xH8_kphyclkKAQApinctrlrockchip,rk3288-pinctrl?YdefaultsleepYZY[gpio0@ff750000rockchip,gpio-banku Q8@RgKDQDgpio1@ff780000rockchip,gpio-bankx R8ARggpio2@ff790000rockchip,gpio-banky S8BRgKgQggpio3@ff7a0000rockchip,gpio-bankz T8CRggpio4@ff7b0000rockchip,gpio-bank{ U8DRgKlQlgpio5@ff7c0000rockchip,gpio-bank| V8ERgKoQogpio6@ff7d0000rockchip,gpio-bank} W8FRggpio7@ff7e0000rockchip,gpio-bank~ X8GRgK Q gpio8@ff7f0000rockchip,gpio-bank Y8HRghdmihdmi-ddc \\vcc50-hdmi-en\KpQppcfg-pull-upK]Q]pcfg-pull-downK`Q`pcfg-pull-noneK\Q\pcfg-pull-none-12ma K_Q_sleepglobal-pwroff\KYQYddrio-pwroff\ddr0-retention]ddr1-retention]i2c0i2c0-xfer \\KCQCi2c1i2c1-xfer \\K,Q,i2c2i2c2-xfer  \ \KIQIi2c3i2c3-xfer \\K-Q-i2c4i2c4-xfer \\K.Q.i2c5i2c5-xfer \\K1Q1i2s0i2s0-bus`\\\\\\KPQPsdmmcsdmmc-clk^KQsdmmc-cmd^KQsdmmc-cd]sdmmc-bus1]sdmmc-bus4@^^^^KQsdmmc-cd-disabled\KQsdmmc-cd-gpio\KQsdio0sdio0-bus1]sdio0-bus4@^^^^KQsdio0-cmd^KQsdio0-clk^KQsdio0-cd]sdio0-wp]sdio0-pwr]sdio0-bkpwr]sdio0-int]wifienable-h\KkQkbt-enable-l\KjQjsdio1sdio1-bus1]sdio1-bus4@]]]]sdio1-cd]sdio1-wp]sdio1-bkpwr]sdio1-int]sdio1-cmd]sdio1-clk\sdio1-pwr ]emmcemmc-clk^KQemmc-cmd^KQemmc-pwr ]emmc-bus1]emmc-bus4@]]]]emmc-bus8^^^^^^^^KQemmc-reset \KfQfspi0spi0-clk ]KQspi0-cs0 ]K"Q"spi0-tx]K Q spi0-rx]K!Q!spi0-cs1]spi1spi1-clk ]K$Q$spi1-cs0 ]K'Q'spi1-rx]K&Q&spi1-tx]K%Q%spi2spi2-cs1]spi2-clk]K(Q(spi2-cs0]K+Q+spi2-rx]K*Q*spi2-tx ]K)Q)uart0uart0-xfer ]\K2Q2uart0-cts]K3Q3uart0-rts\K4Q4uart1uart1-xfer ] \K5Q5uart1-cts ]uart1-rts \uart2uart2-xfer ]\K6Q6uart3uart3-xfer ]\K7Q7uart3-cts ]uart3-rts \uart4uart4-xfer  ] \K8Q8uart4-cts]uart4-rts\tsadcotp-gpio \K=Q=otp-out \K>Q>pwm0pwm0-pin\KJQJpwm1pwm1-pin\KKQKpwm2pwm2-pin\KLQLpwm3pwm3-pin\KMQMgmacrgmii-pins\\\\____\\\ __\\rmii-pins\\\\\\\\\\spdifspdif-tx \KOQOpcfg-pull-none-drv-8maK^Q^pcfg-pull-up-drv-8mapcfg-output-highKbQbpcfg-output-lowKaQabuttonspwr-key-l]KcQcap-lid-int-l]KdQdpmicpmic-int-l]KEQEdvs-1 `KFQFdvs-2`KGQGrebootap-warm-reset-h \KeQerecovery-switchrec-mode-l ]tpmtpm-int-h\write-protectfw-wp-ap\chargerac-present-ap]KqQqcros-ecec-int\K#Q#suspendsuspend-l-wakeaKZQZsuspend-l-sleepbK[Q[trackpadtrackpad-int]K/Q/usb-hosthost1-pwr-en \KrQrusbotg-pwren-h \KsQsbacklightbl_pwr_en \KvQvbuck-5vdrv-5v\KnQnedpedp_hpd `lcdlcd-en\KtQtavdd-1v8-disp-en \KuQugpio-keys gpio-keysdefaultcdpowerPower 8D t d lidLid 8D   / gpio-restart gpio-restart 8D defaulte @emmc-pwrseqmmc-pwrseq-emmcfdefault Ig KQio-domains"rockchip,rk3288-io-voltage-domain? U0 _ j x0 0 h  sdio-pwrseqmmc-pwrseq-simple8i kext_clockdefaultjk IlKQvcc-5vregulator-fixedvcc_5vLK@(LK@ m  defaultnKHQHvcc33-sysregulator-fixed vcc33_sys2Z(2Z mKQvcc50-hdmiregulator-fixed vcc50_hdmi H  odefaultpgpio-charger gpio-charger mains 8Ddefaultqvccsysregulator-fixedvccsysKmQmvcc5-host1-regulatorregulator-fixed  D defaultr vcc5_host1vcc5v-otg-regulatorregulator-fixed  D defaults vcc5_host2panel-regulatorregulator-fixed  defaulttpanel_regulator vcc18-lcdregulator-fixed  g defaultu vcc18_lcd backlight-regulatorregulator-fixed  g defaultvbacklight_regulator  : #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2i2c20device_typereginterruptsinterrupt-affinityenable-methodrockchip,pmuresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplylinux,phandleranges#dma-cellsclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsclock-freq-min-maxfifo-depthbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaycd-gpiosrockchip,default-sample-phasenum-slotssd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplydisable-wppinctrl-namespinctrl-0broken-cdcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablemmc-hs200-1_8v#io-channel-cellsdmasdma-namesgoogle,cros-ec-spi-pre-delayspi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymaprx-sample-delay-nsi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedvcc-supplywakeup-sourcereg-shiftreg-io-widthassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicereset-namespinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphysphy-namesneeds-reset-on-resumedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeg-use-dmaassigned-clock-parentsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc9-supplyvcc11-supplydvs-gpiosregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cells#reset-cells#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channelspower-domainsiommusremote-endpoint#iommu-cellsddc-i2c-businterrupt-controller#interrupt-cells#phy-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowlabellinux,codedebounce-intervalgpio-key,wakeuplinux,input-typepriorityreset-gpiosbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplysdcard-supplyvin-supplyenable-active-highgpiocharger-typestartup-delay-us