8(+compulab,omap3-cm-t3517ti,am3517ti,omap3&7CompuLab CM-T3517chosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/serial@4806a000T/ocp/serial@4806c000\/ocp/serial@49020000d/ocp/serial@4809e000memorylmemoryxcpuscpu@0arm,cortex-a8lcpux|cpupmuarm,cortex-a8-pmuxTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2iva disableddsp ti,omap3-c64ocpti,omap3-l3-smxsimple-busxh l3_mainl4@48000000ti,omap3-l4-coresimple-bus Hscm@2000ti,omap3-scmsimple-busx  pinmux@30 ti,omap3-padconfpinctrl-singlex08pinmux_uart3_pins!np5;pinmux_mmc1_pins0!5;pinmux_green_led_pins!5;pinmux_dss_dpi_pins_common!5;pinmux_dss_dpi_pins_cm_t35x0!5;pinmux_ads7846_pins!5;pinmux_mcspi1_pins !5;pinmux_i2c1_pins!5;pinmux_mcbsp2_pins ! 5;pinmux_hsusb1_phy_reset_pins!H5;pinmux_hsusb2_phy_reset_pins!J5;pinmux_otg_drv_vbus!5;pinmux_mmc2_pins0!(*,.025;pinmux_wl12xx_core_pins!F5;pinmux_usb_hub_pins!Tscm_conf@270sysconsimple-busxp0 p05;pbias_regulatorti,pbias-omap3ti,pbias-omapxCpbias_mmc_omap2430Jpbias_mmc_omap2430Yw@q-5;clocksmcbsp5_mux_fckti,composite-mux-clock|xh5;mcbsp5_fckti,composite-clock|mcbsp1_mux_fckti,composite-mux-clock|x5 ; mcbsp1_fckti,composite-clock| mcbsp2_mux_fckti,composite-mux-clock| x5 ; mcbsp2_fckti,composite-clock| mcbsp3_mux_fckti,composite-mux-clock| xh5;mcbsp3_fckti,composite-clock| mcbsp4_mux_fckti,composite-mux-clock| xh5;mcbsp4_fckti,composite-clock|emac_ickti,am35xx-gate-clock|x,5x;xemac_fckti,gate-clock|x, vpfe_ickti,am35xx-gate-clock|x,5y;yvpfe_fckti,gate-clock|x, hsotgusb_ick_am35xxti,am35xx-gate-clock|x,5z;zhsotgusb_fck_am35xxti,gate-clock|x,5{;{hecc_ckti,am35xx-gate-clock|x,5|;|clockdomainspinmux@a00 ti,omap3-padconfpinctrl-singlex \pinmux_wl12xx_wkup_pins!5;aes@480c5000 ti,omap3-aesaesxH PPABtxrxprm@48306000 ti,omap3-prmxH0`@ clocksvirt_16_8m_ck fixed-clockY5;osc_sys_ck ti,mux-clock|x @5;sys_ckti,divider-clock|xp5;sys_clkout1ti,gate-clock|x pdpll3_x2_ckfixed-factor-clock|dpll3_m2x2_ckfixed-factor-clock|5 ; dpll4_x2_ckfixed-factor-clock|corex2_fckfixed-factor-clock| 5!;!wkup_l4_ickfixed-factor-clock|5P;Pcorex2_d3_fckfixed-factor-clock|!5q;qcorex2_d5_fckfixed-factor-clock|!5r;rclockdomainscm@48004000 ti,omap3-cmxH@@clocksdummy_apb_pclk fixed-clockomap_32k_fck fixed-clock5B;Bvirt_12m_ck fixed-clock5;virt_13m_ck fixed-clock]@5;virt_19200000_ck fixed-clock$5;virt_26000000_ck fixed-clock5;virt_38_4m_ck fixed-clockI5;dpll4_ckti,omap3-dpll-per-clock|x D 05;dpll4_m2_ckti,divider-clock|?x H5";"dpll4_m2x2_mul_ckfixed-factor-clock|"5#;#dpll4_m2x2_ckti,gate-clock|#x 5$;$omap_96m_alwon_fckfixed-factor-clock|$5+;+dpll3_ckti,omap3-dpll-core-clock|x @ 05;dpll3_m3_ckti,divider-clock|x@5%;%dpll3_m3x2_mul_ckfixed-factor-clock|%5&;&dpll3_m3x2_ckti,gate-clock|& x 5';'emu_core_alwon_ckfixed-factor-clock|'5d;dsys_altclk fixed-clock50;0mcbsp_clks fixed-clock5;dpll3_m2_ckti,divider-clock|x @5;core_ckfixed-factor-clock|5(;(dpll1_fckti,divider-clock|(x @5);)dpll1_ckti,omap3-dpll-clock|)x  $ @ 45;dpll1_x2_ckfixed-factor-clock|5*;*dpll1_x2m2_ckti,divider-clock|*x D5>;>cm_96m_fckfixed-factor-clock|+5,;,omap_96m_fck ti,mux-clock|,x @5G;Gdpll4_m3_ckti,divider-clock| x@5-;-dpll4_m3x2_mul_ckfixed-factor-clock|-5.;.dpll4_m3x2_ckti,gate-clock|.x 5/;/omap_54m_fck ti,mux-clock|/0x @5:;:cm_96m_d2_fckfixed-factor-clock|,51;1omap_48m_fck ti,mux-clock|10x @52;2omap_12m_fckfixed-factor-clock|25I;Idpll4_m4_ckti,divider-clock| x@53;3dpll4_m4x2_mul_ckti,fixed-factor-clock|3*54;4dpll4_m4x2_ckti,gate-clock|4x *5v;vdpll4_m5_ckti,divider-clock|?x@55;5dpll4_m5x2_mul_ckti,fixed-factor-clock|5*56;6dpll4_m5x2_ckti,gate-clock|6x *dpll4_m6_ckti,divider-clock|?x@57;7dpll4_m6x2_mul_ckfixed-factor-clock|758;8dpll4_m6x2_ckti,gate-clock|8x 59;9emu_per_alwon_ckfixed-factor-clock|95e;eclkout2_src_gate_ck ti,composite-no-wait-gate-clock|(x p5;;;clkout2_src_mux_ckti,composite-mux-clock|(,:x p5<;<clkout2_src_ckti,composite-clock|;<5=;=sys_clkout2ti,divider-clock|=@x p=mpu_ckfixed-factor-clock|>5?;?arm_fckti,divider-clock|?x $emu_mpu_alwon_ckfixed-factor-clock|?5f;fl3_ickti,divider-clock|(x @5@;@l4_ickti,divider-clock|@x @5A;Arm_ickti,divider-clock|Ax @gpt10_gate_fckti,composite-gate-clock| x 5C;Cgpt10_mux_fckti,composite-mux-clock|Bx @5D;Dgpt10_fckti,composite-clock|CDgpt11_gate_fckti,composite-gate-clock| x 5E;Egpt11_mux_fckti,composite-mux-clock|Bx @5F;Fgpt11_fckti,composite-clock|EFcore_96m_fckfixed-factor-clock|G5;mmchs2_fckti,wait-gate-clock|x 5;mmchs1_fckti,wait-gate-clock|x 5;i2c3_fckti,wait-gate-clock|x 5;i2c2_fckti,wait-gate-clock|x 5;i2c1_fckti,wait-gate-clock|x 5;mcbsp5_gate_fckti,composite-gate-clock| x 5;mcbsp1_gate_fckti,composite-gate-clock| x 5;core_48m_fckfixed-factor-clock|25H;Hmcspi4_fckti,wait-gate-clock|Hx 5;mcspi3_fckti,wait-gate-clock|Hx 5;mcspi2_fckti,wait-gate-clock|Hx 5;mcspi1_fckti,wait-gate-clock|Hx 5;uart2_fckti,wait-gate-clock|Hx 5;uart1_fckti,wait-gate-clock|Hx  5;core_12m_fckfixed-factor-clock|I5J;Jhdq_fckti,wait-gate-clock|Jx 5;core_l3_ickfixed-factor-clock|@5K;Ksdrc_ickti,wait-gate-clock|Kx 5w;wgpmc_fckfixed-factor-clock|Kcore_l4_ickfixed-factor-clock|A5L;Lmmchs2_ickti,omap3-interface-clock|Lx 5;mmchs1_ickti,omap3-interface-clock|Lx 5;hdq_ickti,omap3-interface-clock|Lx 5;mcspi4_ickti,omap3-interface-clock|Lx 5;mcspi3_ickti,omap3-interface-clock|Lx 5;mcspi2_ickti,omap3-interface-clock|Lx 5;mcspi1_ickti,omap3-interface-clock|Lx 5;i2c3_ickti,omap3-interface-clock|Lx 5;i2c2_ickti,omap3-interface-clock|Lx 5;i2c1_ickti,omap3-interface-clock|Lx 5;uart2_ickti,omap3-interface-clock|Lx 5;uart1_ickti,omap3-interface-clock|Lx  5;gpt11_ickti,omap3-interface-clock|Lx  5;gpt10_ickti,omap3-interface-clock|Lx  5;mcbsp5_ickti,omap3-interface-clock|Lx  5;mcbsp1_ickti,omap3-interface-clock|Lx  5;omapctrl_ickti,omap3-interface-clock|Lx 5;dss_tv_fckti,gate-clock|:x5;dss_96m_fckti,gate-clock|Gx5;dss2_alwon_fckti,gate-clock|x5;dummy_ck fixed-clockgpt1_gate_fckti,composite-gate-clock|x 5M;Mgpt1_mux_fckti,composite-mux-clock|Bx @5N;Ngpt1_fckti,composite-clock|MNaes2_ickti,omap3-interface-clock|Lx 5;wkup_32k_fckfixed-factor-clock|B5O;Ogpio1_dbckti,gate-clock|Ox 5;sha12_ickti,omap3-interface-clock|Lx 5;wdt2_fckti,wait-gate-clock|Ox 5;wdt2_ickti,omap3-interface-clock|Px 5;wdt1_ickti,omap3-interface-clock|Px 5;gpio1_ickti,omap3-interface-clock|Px 5;omap_32ksync_ickti,omap3-interface-clock|Px 5;gpt12_ickti,omap3-interface-clock|Px 5;gpt1_ickti,omap3-interface-clock|Px 5;per_96m_fckfixed-factor-clock|+5 ; per_48m_fckfixed-factor-clock|25Q;Quart3_fckti,wait-gate-clock|Qx 5};}gpt2_gate_fckti,composite-gate-clock|x5R;Rgpt2_mux_fckti,composite-mux-clock|Bx@5S;Sgpt2_fckti,composite-clock|RSgpt3_gate_fckti,composite-gate-clock|x5T;Tgpt3_mux_fckti,composite-mux-clock|Bx@5U;Ugpt3_fckti,composite-clock|TUgpt4_gate_fckti,composite-gate-clock|x5V;Vgpt4_mux_fckti,composite-mux-clock|Bx@5W;Wgpt4_fckti,composite-clock|VWgpt5_gate_fckti,composite-gate-clock|x5X;Xgpt5_mux_fckti,composite-mux-clock|Bx@5Y;Ygpt5_fckti,composite-clock|XYgpt6_gate_fckti,composite-gate-clock|x5Z;Zgpt6_mux_fckti,composite-mux-clock|Bx@5[;[gpt6_fckti,composite-clock|Z[gpt7_gate_fckti,composite-gate-clock|x5\;\gpt7_mux_fckti,composite-mux-clock|Bx@5];]gpt7_fckti,composite-clock|\]gpt8_gate_fckti,composite-gate-clock| x5^;^gpt8_mux_fckti,composite-mux-clock|Bx@5_;_gpt8_fckti,composite-clock|^_gpt9_gate_fckti,composite-gate-clock| x5`;`gpt9_mux_fckti,composite-mux-clock|Bx@5a;agpt9_fckti,composite-clock|`aper_32k_alwon_fckfixed-factor-clock|B5b;bgpio6_dbckti,gate-clock|bx5~;~gpio5_dbckti,gate-clock|bx5;gpio4_dbckti,gate-clock|bx5;gpio3_dbckti,gate-clock|bx5;gpio2_dbckti,gate-clock|bx 5;wdt3_fckti,wait-gate-clock|bx 5;per_l4_ickfixed-factor-clock|A5c;cgpio6_ickti,omap3-interface-clock|cx5;gpio5_ickti,omap3-interface-clock|cx5;gpio4_ickti,omap3-interface-clock|cx5;gpio3_ickti,omap3-interface-clock|cx5;gpio2_ickti,omap3-interface-clock|cx 5;wdt3_ickti,omap3-interface-clock|cx 5;uart3_ickti,omap3-interface-clock|cx 5;uart4_ickti,omap3-interface-clock|cx5;gpt9_ickti,omap3-interface-clock|cx 5;gpt8_ickti,omap3-interface-clock|cx 5;gpt7_ickti,omap3-interface-clock|cx5;gpt6_ickti,omap3-interface-clock|cx5;gpt5_ickti,omap3-interface-clock|cx5;gpt4_ickti,omap3-interface-clock|cx5;gpt3_ickti,omap3-interface-clock|cx5;gpt2_ickti,omap3-interface-clock|cx5;mcbsp2_ickti,omap3-interface-clock|cx5;mcbsp3_ickti,omap3-interface-clock|cx5;mcbsp4_ickti,omap3-interface-clock|cx5;mcbsp2_gate_fckti,composite-gate-clock|x5 ; mcbsp3_gate_fckti,composite-gate-clock|x5 ; mcbsp4_gate_fckti,composite-gate-clock|x5;emu_src_mux_ck ti,mux-clock|defx@5g;gemu_src_ckti,clkdm-gate-clock|g5h;hpclk_fckti,divider-clock|hx@pclkx2_fckti,divider-clock|hx@atclk_fckti,divider-clock|hx@traceclk_src_fck ti,mux-clock|defx@5i;itraceclk_fckti,divider-clock|i x@secure_32k_fck fixed-clock5j;jgpt12_fckfixed-factor-clock|jwdt1_fckfixed-factor-clock|jipss_ickti,am35xx-interface-clock|Kx 5;rmii_ck fixed-clock5;pclk_ck fixed-clock5;uart4_ick_am35xxti,omap3-interface-clock|Lx uart4_fck_am35xxti,wait-gate-clock|Hx dpll5_ckti,omap3-dpll-clock|x  $ L 4Se5k;kdpll5_m2_ckti,divider-clock|kx P5u;usgx_gate_fckti,composite-gate-clock|(x 5s;score_d3_ckfixed-factor-clock|(5l;lcore_d4_ckfixed-factor-clock|(5m;mcore_d6_ckfixed-factor-clock|(5n;nomap_192m_alwon_fckfixed-factor-clock|$5o;ocore_d2_ckfixed-factor-clock|(5p;psgx_mux_fckti,composite-mux-clock |lmn,opqrx @5t;tsgx_fckti,composite-clock|stsgx_ickti,wait-gate-clock|@x 5;cpefuse_fckti,gate-clock|x 5;ts_fckti,gate-clock|Bx 5;usbtll_fckti,wait-gate-clock|ux 5;usbtll_ickti,omap3-interface-clock|Lx 5;mmchs3_ickti,omap3-interface-clock|Lx 5;mmchs3_fckti,wait-gate-clock|x 5;dss1_alwon_fck_3430es2ti,dss-gate-clock|vx*5;dss_ick_3430es2ti,omap3-dss-interface-clock|Ax5;usbhost_120m_fckti,gate-clock|ux5;usbhost_48m_fckti,dss-gate-clock|2x5;usbhost_ickti,omap3-dss-interface-clock|Ax5;clockdomainscore_l3_clkdmti,clockdomain|wxyz{|dpll3_clkdmti,clockdomain|dpll1_clkdmti,clockdomain|per_clkdmti,clockdomainh|}~emu_clkdmti,clockdomain|hdpll4_clkdmti,clockdomain|wkup_clkdmti,clockdomain |dss_clkdmti,clockdomain|core_l4_clkdmti,clockdomain|dpll5_clkdmti,clockdomain|ksgx_clkdmti,clockdomain|usbhost_clkdmti,clockdomain |counter@48320000ti,omap-counter32kxH2  counter_32kinterrupt-controller@48200000ti,omap3-intcxH 5;dma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaxH` mx `5;gpio@48310000ti,omap3-gpioxH1gpio15;gpio@49050000ti,omap3-gpioxIgpio25;gpio@49052000ti,omap3-gpioxI gpio3gpio@49054000ti,omap3-gpioxI@ gpio4gpio@49056000ti,omap3-gpioxI`!gpio55;gpio@49058000ti,omap3-gpioxI"gpio65;serial@4806a000ti,omap3-uartxH H12txrxuart1lserial@4806c000ti,omap3-uartxHI34txrxuart2lserial@49020000ti,omap3-uartxIJ56txrxuart3ldefaulti2c@48070000 ti,omap3-i2cxH8txrxi2c1defaultat24@50 at24,24c02xPi2c@48072000 ti,omap3-i2cxH 9txrxi2c2i2c@48060000 ti,omap3-i2cxH=txrxi2c3mailbox@48094000ti,omap3-mailboxmailboxxH @ disableddsp % 0spi@48098000ti,omap2-mcspixH Amcspi1;@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3defaultads7846@0default ti,ads7846IxT`& fs| spi@4809a000ti,omap2-mcspixH Bmcspi2; +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspixH [mcspi3; tx0rx0tx1rx1spi@480ba000ti,omap2-mcspixH 0mcspi4;FGtx0rx01w@480b2000 ti,omap3-1wxH :hdq1wmmc@4809c000ti,omap3-hsmmcxH Smmc1=>txrxdefaultmmc@480b4000ti,omap3-hsmmcxH @Vmmc2/0txrxdefault%5Cwlcore@2 ti,wl1271x&VImmc@480ad000ti,omap3-hsmmcxH ^mmc3MNtxrx disabledmmu@480bd400jti,omap2-iommuxH mmu_ispw disabledmmu@5d000000jti,omap2-iommux]mmu_iva disabledwdt@48314000 ti,omap3-wdtxH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspxH@mpu ;< commontxrxmcbsp1 txrx disabledmcbsp@49022000ti,omap3-mcbspxI I mpusidetone>?commontxrxsidetonemcbsp2mcbsp2_sidetone!"txrxokdefaultmcbsp@49024000ti,omap3-mcbspxI@I mpusidetoneYZcommontxrxsidetonemcbsp3mcbsp3_sidetonetxrx disabledmcbsp@49026000ti,omap3-mcbspxI`mpu 67 commontxrxmcbsp4txrx disabledmcbsp@48096000ti,omap3-mcbspxH `mpu QR commontxrxmcbsp5txrx disabledsham@480c3000ti,omap3-shamshamxH 0d1Erxsmartreflex@480cb000ti,omap3-smartreflex-coresmartreflex_corexH smartreflex@480c9000ti,omap3-smartreflex-ivasmartreflex_mpu_ivaxH  disabledtimer@48318000ti,omap3430-timerxH1%timer1timer@49032000ti,omap3430-timerxI &timer2timer@49034000ti,omap3430-timerxI@'timer3timer@49036000ti,omap3430-timerxI`(timer4timer@49038000ti,omap3430-timerxI)timer5timer@4903a000ti,omap3430-timerxI*timer6timer@4903c000ti,omap3430-timerxI+timer7timer@4903e000ti,omap3430-timerxI,timer8timer@49040000ti,omap3430-timerxI-timer9timer@48086000ti,omap3430-timerxH`.timer10timer@48088000ti,omap3430-timerxH/timer11timer@48304000ti,omap3430-timerxH0@_timer12usbhstll@48062000 ti,usbhs-tllxH N usb_tll_hsusbhshost@48064000ti,usbhs-hostxH@ usb_host_hs ehci-phy ehci-phyohci@48064400ti,ohci-omap3xHD&Lehci@48064800 ti,ehci-omapxHH&Mgpmc@6e000000ti,omap3430-gpmcgpmcxnrxtxnand@0,0 x"1CswSaxsxxxZZH<7xHxYkZpartition@0xloaderxpartition@0x80000ubootxpartition@0x260000uboot environmentx&partition@0x2a0000linuxx*@partition@0x6a0000rootfsxjusb_otg_hs@480ab000ti,omap3-musbxH \]mcdma usb_otg_hs dss@48050000 ti,omap3-dssxHok dss_core|fckdefaultdispc@48050400ti,omap3-dispcxH dss_dispc|fckencoder@4804fc00 ti,omap3-dsixHH@H protophypll disabled dss_dsi1| fcksys_clkencoder@48050800ti,omap3-rfbixH disabled dss_rfbi|fckickencoder@48050c00ti,omap3-vencxH ok dss_venc|fckportendpoint5;ssi-controller@48058000 ti,omap3-ssissi disabledxHHsysgddGgdd_mpussi-port@4805a000ti,omap3-ssi-portxHHtxrx&CDssi-port@4805b000ti,omap3-ssi-portxHHtxrx&EFam35x_otg_hs@5c040000ti,omap3-musb am35x_otg_hsokayx\Gmcdefaultethernet@0x5c000000ti,am3517-emac davinci_emacokayx\CDEFC /Bethernet@0x5c030000ti,davinci_mdio davinci_mdiookayx\TB@serial@4809e000ti,omap3-uartuart4 disabledxH T76txrxlpinmux@480025d8 ti,omap3-padconfpinctrl-singlexH%$leds gpio-ledsdefaultledb cm-t3x:green ] cheartbeathsusb1_power_regregulator-fixed Jhsusb1_vbusY2Zq2Zyp5;hsusb2_power_regregulator-fixed Jhsusb2_vbusY2Zq2Zyp5;hsusb1_phyusb-nop-xceivIdefault 5;hsusb2_phyusb-nop-xceivIdefault 5;ads7846-regregulator-fixed Jads7846-regY2Zq2Z5;connector@1svideo-connectortvportendpoint5;regulator-vmmcregulator-fixedJvmmcY2Zq2Z5;wl12xx_vmmc2regulator-fixedJvw1271defaultYw@qw@ nyN 5;wl12xx_vaux2regulator-fixedJvwl1271_vaux2Yw@qw@5; #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2serial0serial1serial2serial3device_typeregclocksclock-namesclock-latencyinterruptsti,hwmodsstatusranges#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinslinux,phandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lock#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedpinctrl-namespinctrl-0pagesize#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repwakeup-sourceti,dual-voltpbias-supplybus-widthvmmc-supplyvmmc_aux-supplynon-removablecap-power-off-cardref-clock-frequency#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport1-modeport2-modephysgpmc,num-csgpmc,num-waitpinsnand-bus-widthgpmc,device-widthti,nand-ecc-optgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,page-burst-access-nsgpmc,access-nsgpmc,cycle2cycle-delay-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabelmultipointnum-epsram-bitsremote-endpointti,channelsti,davinci-ctrl-reg-offsetti,davinci-ctrl-mod-reg-offsetti,davinci-ctrl-ram-offsetti,davinci-ctrl-ram-sizeti,davinci-rmii-enlocal-mac-addressbus_freqgpioslinux,default-triggerstartup-delay-usreset-gpiosenable-active-high