(8$(n$l%Marvell Armada 398 Development Board4!marvell,a398-dbmarvell,armada398marvell,armada390chosen,serial0:115200n8aliases 8/soc/internal-regs/serial@12000 @/soc/internal-regs/serial@12100 H/soc/internal-regs/serial@12200 P/soc/internal-regs/serial@12300memoryXmemorydcpushmarvell,armada-390-smpcpu@0Xcpu!arm,cortex-a9dcpu@1Xcpu!arm,cortex-a9dsoc8!marvell,armada390-mbusmarvell,armadaxp-mbussimple-busv bootrom!marvell,bootrom d internal-regs !simple-buscache-controller@8000!arm,pl310-cachedscu@c000!arm,cortex-a9-scudtimer@c600!arm,cortex-a9-twd-timerd  * 5interrupt-controller@d000!arm,cortex-a9-gic<Mdbhspi@10600)!marvell,armada-390-spimarvell,orion-spidPp *5 {disabledspi@10680)!marvell,armada-390-spimarvell,orion-spidPp *?5{okaydefaultspi-flash@0!n25q128a13jedec,spi-nordopartition@0U-Bootd@partition@400000 Filesystemd@i2c@11000!marvell,mv64xxx-i2cd  *5{okaydefaulti2c@11100!marvell,mv64xxx-i2cd  *5 {disabledi2c@11200!marvell,mv64xxx-i2cd  *5 {disabledi2c@11300!marvell,mv64xxx-i2cd  *5 {disabledserial@12000!snps,dw-apb-uartd  * 5{okaydefaultserial@12100!snps,dw-apb-uartd! * 5{okaydefaultserial@12200!snps,dw-apb-uartd" *5 {disabledserial@12300!snps,dw-apb-uartd# *5 {disabledpinctrl@18000!marvell,mv88f6928-pinctrld i2c0-pins mpp2mpp3i2c0bhuart0-pins mpp0mpp1ua0bhuart1-pins mpp19mpp20ua1bhspi1-pinsmpp56mpp57mpp58mpp59spi1bhnand-pinsNmpp22mpp34mpp23mpp33mpp38mpp28mpp40mpp42mpp35mpp36mpp25mpp30mpp32devb h system-controller@18200M!marvell,armada-390-system-controllermarvell,armada-370-xp-system-controllerdclock-gating-control@18220 !marvell,armada-390-gating-clockd 5b h mvebu-sar@18600!marvell,armada-390-core-clockdbhmbus-controller@20000!marvell,mbus-controllerd Pbhinterrupt-controller@20a00 !marvell,mpicd pX<M *bhtimer@203001!marvell,armada-380-timermarvell,armada-xp-timerd0@0P   5 2nbclkfixedcpurst@20800!marvell,armada-370-cpu-resetdpmsu@220000!marvell,armada-390-pmsumarvell,armada-380-pmsud xor@60800)!marvell,armada-380-xormarvell,orion-xord 5 {okayxor00 *>Lxor01 *>LWxor@60900)!marvell,armada-380-xormarvell,orion-xord  5 {okayxor10 *A>Lxor11 *B>LWflash@d0000!marvell,armada370-nandd T *T5 {okay defaultelpartition@0U-Bootdpartition@800000Linuxdpartition@1000000 Filesystemd?sdhci@d8000!marvell,armada-380-sdhcid   *5  {disabledclock@e4250B!marvell,armada-390-corediv-clockmarvell,armada-380-corediv-clockdBP 5 nandb h pcie-controller!marvell,armada-370-pcie{okayXpci P  @@  pcie@1,0Xpci d<@) <J\5 {okaypcie@2,0Xpci d<@) <!J\5 {okaypcie@3,0Xpci@ d<@) <FJ\5 {okaypcie@4,0Xpci d <@) <GJ\5  {disabledclocksmainpll !fixed-clock;b h  #address-cells#size-cellsmodelcompatiblestdout-pathserial0serial1serial2serial3device_typeregenable-methodcontrollerinterrupt-parentpcie-mem-aperturepcie-io-aperturerangescache-unifiedcache-levelarm,double-linefill-incrarm,double-linefill-wraparm,double-linefillprefetch-datainterruptsclocks#interrupt-cellsinterrupt-controllerlinux,phandlecell-indexstatuspinctrl-0pinctrl-namesspi-max-frequencylabeltimeout-msclock-frequencyreg-shiftreg-io-widthmarvell,pinsmarvell,function#clock-cellsmsi-controllerinterrupts-extendedclock-namesdmacap,memcpydmacap,xordmacap,memsetnum-csmarvell,nand-keep-configmarvell,nand-enable-arbiternand-on-flash-bbtnand-ecc-strengthnand-ecc-step-sizemrvl,clk-delay-cyclesclock-output-namesmsi-parentbus-rangeassigned-addressesinterrupt-map-maskinterrupt-mapmarvell,pcie-portmarvell,pcie-lane