8Ԥ( Ul'DH electronics STM32MP153C DHCOM DRC02B!dh,stm32mp153c-dhcom-drc02dh,stm32mp153c-dhcom-somst,stm32mp153cpuscpu@0!arm,cortex-a7,&68rxtx disabledaudio-controller@4000c000!st,stm32h7-i2svH@ T3 3=>8rxtx disabledaudio-controller@4000d000!st,stm32h7-spdifrxvH@ 'kclk Ta 3]^ 8rxrx-ctrl disabledserial@4000e000!st,stm32h7-uartH@ T&  disabledserial@4000f000!st,stm32h7-uartH@ T' okaydefault serial@40010000!st,stm32h7-uartH@ T4 okaydefault serial@40011000!st,stm32h7-uartH@ T5  disabledi2c@40012000!st,stm32mp15-i2cH@  eventerrorT  oL a disabledi2c@40013000!st,stm32mp15-i2cH@0 eventerrorT!" oL aokaydefault eeprom@50 !atmel,24c04HPi2c@40014000!st,stm32mp15-i2cH@@ eventerrorTHI oL a disabledi2c@40015000!st,stm32mp15-i2cH@P eventerrorTkl oL aokaydefault cec@40016000 !st,stm32-cecH@` T^    'cechdmi-cec disableddac@40017000!st,stm32h7-dac-coreH@p 'pclk disableddefaultdac@1 !st,stm32-dacHokaydac@2 !st,stm32-dacHokayserial@40018000!st,stm32h7-uartH@ TR  disabledserial@40019000!st,stm32h7-uartH@ TS okaydefault 4timer@44000000!st,stm32-timersHD 'intp3   8ch1ch2ch3ch4uptrigcom disabledpwm !st,stm32-pwmB disabledtimer@0!st,stm32h7-timer-triggerH disabledcounter!st,stm32-timer-counter disabledtimer@44001000!st,stm32-timersHD 'intp3/0123458ch1ch2ch3ch4uptrigcom disabledpwm !st,stm32-pwmB disabledtimer@7!st,stm32h7-timer-triggerH disabledcounter!st,stm32-timer-counter disabledserial@44003000!st,stm32h7-uartHD0 TG  disabledspi@44004000!st,stm32h7-spiHD@ T# oLH disableddefault >audio-controller@44004000!st,stm32h7-i2svHD@ T# 3%&8rxtx disabledspi@44005000!st,stm32h7-spiHDP TT oLI 3ST8rxtx disabledtimer@44006000!st,stm32-timersHD` 'int@3ijkl8ch1uptrigcom disabledpwm !st,stm32-pwmB disabledtimer@14!st,stm32h7-timer-triggerH disabledtimer@44007000!st,stm32-timersHDp 'int 3mn8ch1up disabledpwm !st,stm32-pwmB disabledtimer@15!st,stm32h7-timer-triggerH disabledtimer@44008000!st,stm32-timersHD 'int 3op8ch1up disabledpwm !st,stm32-pwmB disabledtimer@16!st,stm32h7-timer-triggerH disabledspi@44009000!st,stm32h7-spiHD TU oLJ 3UV8rxtx disabledsai@4400a000!st,stm32h7-sai DHDD TWoLP disabledaudio-controller@4400a004v!st,stm32-sai-sub-aH 'sai_ck3W disabledaudio-controller@4400a024v!st,stm32-sai-sub-bH$ 'sai_ck3X disabledsai@4400b000!st,stm32h7-sai DHDD T[oLQ disabledaudio-controller@4400b004v!st,stm32-sai-sub-aH 'sai_ck3Y disabledaudio-controller@4400b024v!st,stm32-sai-sub-bH$ 'sai_ck3Z disabledsai@4400c000!st,stm32h7-sai DHDD TroLR disabledaudio-controller@4400c004v!st,stm32-sai-sub-aH 'sai_ck3q disabledaudio-controller@4400c024v!st,stm32-sai-sub-bH$ 'sai_ck3r disableddfsdm@4400d000!st,stm32mp1-dfsdmHD 'dfsdm disabledfilter@0!st,stm32-dfsdm-adcH Tn3e8rx disabledfilter@1!st,stm32-dfsdm-adcH To3f8rx disabledfilter@2!st,stm32-dfsdm-adcH Tp3g8rx disabledfilter@3!st,stm32-dfsdm-adcH Tq3h8rx disabledfilter@4!st,stm32-dfsdm-adcH Ts3[8rx disabledfilter@5!st,stm32-dfsdm-adcH T~3\8rx disableddma-controller@48000000 !st,stm32-dmaHH`T   / GoLGR]Ldma-controller@48001000 !st,stm32-dmaHH`T89:;<DEF HoLGR]Ldma-router@48002000!st,stm32h7-dmamuxHH @G]jv IoLLadc@48003000!st,stm32mp1-adc-coreHH0TZ J'busadc disabledLadc@0!st,stm32mp1-adcHrT3 8rxokayadc@100!st,stm32mp1-adcHrT3 8rxokaysdmmc@48004000!arm,pl18xarm,primecell%1HH@ Tcmd_irq x 'apb_pclkoL'okaydefaultopendrainsleep +5AN [ dusb-otg@49000000!st,stm32mp15-hsotgsnps,dwc2HI 'otgoLodwc2 Tb{  otg disabledmailbox@4c001000!st,stm32mp1-ipccHL,Mde= rxtxwakeup SaokayLOdcmi@4c006000!st,stm32-dcmiHL` TNoM M'mclk3K8tx disabledrcc@50000000!st,stm32mp1-rccsysconHPLpwr@50001000!st,stm32mp1,pwr-regHPreg11reg11 !L;reg18reg18 w@!w@L<usb33usb33 2Z!2ZLpwr_mcu@50001014!st,stm32mp151-pwr-mcusysconHPLGinterrupt-controller@5000d000!st,stm32mp1-extisysconHPLsyscon@50020000!st,stm32mp157-syscfgsysconHP 3Ltimer@50021000!st,stm32-lptimerHP M0 'muxa disabledpwm!st,stm32-pwm-lpB disabledtrigger@1!st,stm32-lptimer-triggerH disabledcounter!st,stm32-lptimer-counter disabledtimer@50022000!st,stm32-lptimerHP  M2 'muxa disabledpwm!st,stm32-pwm-lpB disabledtrigger@2!st,stm32-lptimer-triggerH disabledtimer@50023000!st,stm32-lptimerHP0 M4 'muxa disabledpwm!st,stm32-pwm-lpB disabledtimer@50024000!st,stm32-lptimerHP@ M5 'muxa disabledpwm!st,stm32-pwm-lpB disabledvrefbuf@50025000!st,stm32-vrefbufHPP `!&% 4 disabledsai@50027000!st,stm32h7-sai PpHPpPs ToL disabledaudio-controller@50027004v!st,stm32-sai-sub-aH 'sai_ck3c disabledaudio-controller@50027024v!st,stm32-sai-sub-bH$ 'sai_ck3d disabledthermal@50028000!st,stm32-thermalHP T 5'pclk9okayLhash@54002000!st,stm32f756-hashHT  TP ao 3  8inO disabledrng@54003000 !st,stm32-rngHT0 |o okaydma-controller@58000000!st,stm32h7-mdmaHX Tz do Gv ]0L memory-controller@58002000!st,stm32mp1-fmc2-ebiHX  yo okayP`dhldefaultsleep! "nand-controller@4,0!st,stm32mp1-fmc2-nfcHH   T0H3       8txrxecc disabledks8851mll@1,0!micrel,ks8851-mllHr#T\g-6Rx-spi@58003000!st,stm32f469-qspiHX0p  qspiqspi_mm T\03  8txrx zo okaydefaultsleep$% &'mx66l51235l@0!jedec,spi-norH$osdmmc@58005000!arm,pl18xarm,primecell%1HXP T1cmd_irq v 'apb_pclko 'okaydefaultopendrainsleep() *)+, [-d6A+5.sdmmc@58007000!arm,pl18xarm,primecell%1HXp T|cmd_irq w 'apb_pclko 'okaydefaultopendrainsleep/0 1023M[a+5ANcrc@58009000!st,stm32f7-crcHX n disabledstmmac-axi-configiyL4ethernet@5800a000#!st,stm32mp1-dwmacsnps,dwmac-4.20aHX   stmmacethM=macirq.'stmmacethmac-clk-txmac-clk-rxeth-ckethstp( igh{p4okay5 6defaultsleeprmiid7  8mdio0!snps,dwmac-mdioethernet-phy@1HrT L7usb@5800c000 !generic-ohciHX oo  TJ disabledL9usb@5800d000 !generic-ehciHX oo  TK,9okay6:display-controller@5a001000!st,stm32-ltdcHZTXY 'lcdo  disabledportwatchdog@5a002000!st,stm32mp1-iwdgHZ  : 'pclklsiokay; usbphyc@5a006000!st,stm32mp1-usbphycHZ` o okayusb-phy@0GHR];l<L:usb-phy@1GHserial@5c000000!st,stm32h7-uartH\ T%  disabledspi@5c001000!st,stm32h7-spiH\ TV o @03 " #8rxtx disabledi2c@5c002000!st,stm32mp15-i2cH\  eventerrorT_` o B aokaydefault=rtc@32!microcrystal,rv8803H2stpmic@33 !st,stpmic1H3 M>okayregulators!st,stpmic1-regulators{?@@buck1vddcore 5!pbuck2vdd_ddr p!pL?buck3vdd 2Z!2Z"Lbuck4v3v3 2Z!2ZLldo1vdda ,@ !,@ TLldo2v2v8 *!*Tldo3vtt_ddr  ! qldo4vdd_usb 2Z!2ZTLldo5vdd_sd ,@ !,@ T0L.ldo6v1v8 w@!w@Tvref_ddr vref_ddrboostbst_outTL@pwr_sw1 vbus_otgT pwr_sw2vbus_swT Bonkey!st,stpmic1-onkeyTonkey-fallingonkey-rising] okaywatchdog!st,stpmic1-wdt disabledtouchscreen@49 !ti,tsc2004HIp M8 disabledeeprom@50 !atmel,24c02HPrtc@5c004000!st,stm32mp1-rtcH\@ A 'pclkrtc_ck Tokayefuse@5c005000!st,stm32mp15-bsecH\Pcalib@5cH\calib@5eH^i2c@5c009000!st,stm32mp15-i2cH\ eventerrorT o C  a disabledtamp@5c00a000 !st,stm32-tampsysconsimple-mfdH\LHpin-controller@50002000!st,stm32mp157-pinctrl P r `{LAgpio@50002000H TGPIOAokayAL>gpio@50003000H UGPIOBokayArs485-rx-en-hog8 rs485-rx-engpio@50004000H  VGPIOCokayA L#gpio@50005000H0 WGPIODokayA0Out1Out2gpio@50006000H@ XGPIOEokayA@Lgpio@50007000HP YGPIOFokayAPgpio@50008000H` ZGPIOGokayA`L-gpio@50009000Hp [GPIOHokayApL8gpio@5000a000H \GPIOIokayAIn1In2Lusb-hub-hog8 usb-hub-resetgpio@5000b000H ]GPIOJokayAgpio@5000c000H ^GPIOKokayAadc1-in6-0pins \adc12-ain-0pins #\]^adc12-ain-1pins \]adc12-usb-cc-pins-0pins cec-0pins   " 3cec-sleep-0pins cec-1pins   " 3cec-sleep-1pins dac-ch1-0Lpins dac-ch2-0Lpins dcmi-0pins< xyz{|~Fw dcmi-sleep-0pins< xyz{|~Fwrgmii-0pins1 e d m n " B  !   = 3pins2    = 3pins3 $ %      rgmii-sleep-0pins1< edmn"B!$%rgmii-1pins1 e d m n " B  !   = 3pins2    = 3pins3 $ % v w    rgmii-sleep-1pins1< edmn"B!$%vwrgmii-2pins1 e d  n " B k !   = 3pins2    = 3pins3 $ % v     rgmii-sleep-2pins1< edn"Bk!$%vrmii-0L5pins1 m n   !   = 3pins2 $ %   rmii-sleep-0L6pins1$ mn!$%fmc-0pins14 4 5 ; < > ? 0 1 G H I J i   = 3pins2 6  Mfmc-sleep-0pins8 45;<>?01GHIJ6ifmc-1L!pinsT 4 5  > ? 0 1 G H I J K L M N O 8 9 : i l   = 3fmc-sleep-1L"pinsT 45>?01GHIJKLMNO89:ili2c1-0pins <_  " 3i2c1-sleep-0pins <_i2c1-1pins ^_  " 3i2c1-sleep-1pins ^_i2c2-0L pins tu  " 3i2c2-sleep-0pins tui2c2-1pins u  " 3i2c2-sleep-1pins ui2c2-2pins Qu  " 3i2c2-sleep-2pins Qui2c5-0L pins     " 3i2c5-sleep-0pins   i2c5-1pins 01  " 3i2c5-sleep-1pins 01i2s2-0pins   3 = i2s2-sleep-0pins  ltdc-0pinsp gZrsxyz |OEF}~9lj:8  = 3ltdc-sleep-0pinsp gZrsxyz |OEF}~9lj:8ltdc-1pinsp   = 3ltdc-sleep-1pinsp ltdc-2pins1T   36:KLMOt xyz}  = 3pins2 N  = 3ltdc-sleep-2pins1X  36:KLMOtxyz}Nltdc-3pins1 g  = 3pins2l Mmsxy{|OE}Kt h9lj:L  = 3ltdc-sleep-3pinsp gMmsxy{|OE}Kth9lj:Lm-can1-0LCpins1 }  3 = pins2   m_can1-sleep-0LDpins }m-can1-1pins1   3 = pins2   m_can1-sleep-1pins   m-can2-0LEpins1   3 = pins2   m_can2-sleep-0LFpins pwm1-0pins IKN Z = 3pwm1-sleep-0pins IKNpwm2-0pins  Z = 3pwm2-sleep-0pins pwm3-0pins ' Z = 3pwm3-sleep-0pins 'pwm3-1pins   = 3pwm3-sleep-1pins pwm4-0pins >? Z = 3pwm4-sleep-0pins >?pwm4-1pins = Z = 3pwm4-sleep-1pins =pwm5-0pins { Z = 3pwm5-sleep-0pins {pwm5-1pins {|  = 3pwm5-sleep-1pins {|pwm8-0pins  Z = 3pwm8-sleep-0pins pwm12-0pins v Z = 3pwm12-sleep-0pins vqspi-clk-0L$pins Z   = 3qspi-clk-sleep-0L&pins Zqspi-bk1-0L%pins1 X Y W V   = 3pins2   M = 3qspi-bk1-sleep-0L'pins XYWVqspi-bk2-0pins1 r s j g   = 3pins2   M = 3qspi-bk2-sleep-0pins rsjg sai2a-0pins  @  3 = sai2a-sleep-0pins @sai2a-1pins1  =  3 = sai2a-sleep-1pins =sai2a-4pins = ; <  3 = pins1 [  sai2a-5pins =;<sai2b-0pins1 L M N  3 = pins2 [  sai2b-sleep-0pins [LMNsai2b-1pins [  sai2b-sleep-1pins [sai2a-sleep-5pins [sai4a-0pins   3 = sai4a-sleep-0pins sdmmc1-b4-0L(pins1 ( ) * + 2  3 = pins2 ,  3 = sdmmc1-b4-od-0L*pins1 ( ) * +  3 = pins2 ,  3 = pins3 2  3 " sdmmc1-b4-sleep-0L+pins ()*+,2sdmmc1-dir-0L)pins1 R '   3 = Mpins2 D  Msdmmc1-dir-sleep-0L,pins R'Dsdmmc1-dir-1pins1 R N   3 = Mpins2 D  Msdmmc1-dir-sleep-1pins RNDsdmmc2-b4-0L/pins1     f  3 = Mpins2 C  3 = Msdmmc2-b4-od-0L1pins1      3 = Mpins2 C  3 = Mpins3 f  3 " Msdmmc2-b4-sleep-0L2pins Cfsdmmc2-b4-1pins1     f  3 = pins2 C  3 = sdmmc2-b4-od-1pins1      3 = pins2 C  3 = pins3 f  3 " sdmmc2-d47-0L0pins  E 3  3 = Msdmmc2-d47-sleep-0L3pins  E3sdmmc2-d47-1pins  & '  3 = sdmmc2-d47-sleep-1pins  &'sdmmc2-d47-2pins   & '  3 = Msdmmc2-d47-sleep-2pins &'sdmmc2-d47-3pins  E ' sdmmc2-d47-sleep-3pins  E'sdmmc3-b4-0Lpins1 P T U 7 Q  3 = Mpins2 o  3 = Msdmmc3-b4-od-0Lpins1 P T U 7  3 = Mpins2 o  3 = Mpins3 Q  3 " Msdmmc3-b4-sleep-0Lpins PTU7oQsdmmc3-b4-1pins1 P T 5 7 0  3 = Mpins2 o  3 = Msdmmc3-b4-od-1pins1 P T 5 7  3 = Mpins2 o  3 = Mpins3 0  3 " Msdmmc3-b4-sleep-1pins PT57o0spdifrx-0pins l  spdifrx-sleep-0pins lspi2-0pins1   = 3pins2  spi4-0pins LF  = 3pins2 M stusb1600-0pins  Muart4-0L pins1 k  = 3pins2   uart4-idle-0pins1 kpins2   uart4-sleep-0pins kuart4-1pins1 1   = 3pins2   uart4-2pins1 k  = 3pins2   uart7-0pins1 H  = 3pins2 GJI uart7-1pins1 W  = 3pins2 V uart7-2pins1 H  = 3pins2 G uart7-idle-2pins1 Hpins2 G uart7-sleep-2pins HGuart8-0Lpins1 A   = 3pins2 @  uart8rtscts-0pins g j  usart2-0pins1 U4  = 3pins2 63 usart2-sleep-0pins U463usart2-1pins1 U  = 3pins2 TO usart2-sleep-1pins UTOusart2-2pins1 54  = 3pins2 63 usart2-idle-2pins1 543pins2 6 usart2-sleep-2pins 5463usart3-0L pins1   = 3pins2   usart3-1pins1 h   = 3pins2   usart3-idle-1pins1 hpins2   usart3-sleep-1pins husart3-2pins1 h   = 3pins2   usart3-idle-2pins1 hpins2   usart3-sleep-2pins husbotg-hs-0pins  usbotg-fs-dp-dm-0pins   pin-controller-z@54004000!st,stm32mp157-z-pinctrl T@{r `LBgpio@54004000H _GPIOZ i okayBLi2c2-0pins   " 3i2c2-sleep-0pins i2c4-0L=pins   " 3i2c4-sleep-0pins spi1-0Lpins1   = 3pins2  can@4400e000 !bosch,m_canHDD m_canmessage_ramT int0int1  'hclkcclk x okaydefaultsleepC Dcan@4400f000 !bosch,m_canHDD( m_canmessage_ramT int0int1  'hclkcclk x okaydefaultsleepE Fcryp@54001000!st,stm32mp1-crypHT TO `o  disabledahb!st,mlahbsimple-bus$ 800m4@10000000!st,stm32mp1-m4H08o !    G HD HHokay IJKLMN OOO vq0vq1shutdownrTDaliases /soc/ethernet@5800a000. /soc/memory-controller@58002000/ks8851mll@1,0 /soc/serial@40010000 "/soc/serial@4000f000 */soc/serial@40019000memory@c0000000chosen Iserial0:115200n8 #address-cells#size-cellsmodelcompatibleclock-frequencydevice_typeregphandleinterruptsinterrupt-affinityinterrupt-parentmethod#interrupt-cellsinterrupt-controller#clock-cellspolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresisst,syscfgstatusrangesclocksclock-namesdmasdma-names#pwm-cellsinterrupts-extendedwakeup-sourceresets#sound-dai-cellspinctrl-namespinctrl-0interrupt-namesst,syscfg-fmpi2c-scl-rising-time-nsi2c-scl-falling-time-nspagesizevref-supply#io-channel-cellslinux,rs485-enabled-at-boot-timerts-gpioscs-gpios#dma-cellsst,mem2memdma-requestsdma-mastersdma-channelsvdd-supplyvdda-supplyst,min-sample-time-nsecsst,adc-channelsarm,primecell-periphidcap-sd-highspeedcap-mmc-highspeedmax-frequencypinctrl-1pinctrl-2st,neg-edgebus-widthvmmc-supplyvqmmc-supplymmc-ddr-3_3vcd-gpiosdisable-wpreset-namesg-rx-fifo-sizeg-np-tx-fifo-sizeg-tx-fifo-sizedr_modeusb33d-supply#mbox-cellsst,proc-id#reset-cellsvdd_3v3_usbfs-supplyregulator-nameregulator-min-microvoltregulator-max-microvolt#thermal-sensor-cellsdma-maxburstbank-widthst,fmc2-ebi-cs-mux-enablest,fmc2-ebi-cs-transaction-typest,fmc2-ebi-cs-buswidthst,fmc2-ebi-cs-address-setup-nsst,fmc2-ebi-cs-address-hold-nsst,fmc2-ebi-cs-bus-turnaround-nsst,fmc2-ebi-cs-data-setup-nsst,fmc2-ebi-cs-data-hold-nsst,fmc2-ebi-cs-write-address-setup-nsst,fmc2-ebi-cs-write-address-hold-nsst,fmc2-ebi-cs-write-bus-turnaround-nsst,fmc2-ebi-cs-write-data-setup-nsst,fmc2-ebi-cs-write-data-hold-nsreg-namesspi-rx-bus-widthspi-max-frequencyst,sig-dirst,use-ckinnon-removableno-sdno-sdiosnps,wr_osr_lmtsnps,rd_osr_lmtsnps,blenst,sysconsnps,mixed-burstsnps,pblsnps,en-tx-lpi-clockgatingsnps,axi-configsnps,tsophy-modemax-speedphy-handlest,eth-ref-clk-selphy-reset-gpioscompanionphystimeout-sec#phy-cellsphy-supplyvdda1v1-supplyvdda1v8-supplyldo1-supplyldo2-supplyldo3-supplyldo5-supplyldo6-supplypwr_sw1-supplypwr_sw2-supplyregulator-always-onregulator-initial-moderegulator-over-current-protectionst,mask-resetregulator-boot-onregulator-active-dischargepower-off-time-secvio-supplypins-are-numberedst,packagegpio-controller#gpio-cellsst,bank-namengpiosgpio-rangesgpio-hogoutput-lowline-namegpio-line-namesoutput-highpinmuxbias-disabledrive-open-drainslew-ratedrive-push-pullbias-pull-upbias-pull-downst,bank-ioportbosch,mram-cfgdma-rangesst,syscfg-holdbootst,syscfg-tzst,syscfg-pddsst,syscfg-rsc-tblst,syscfg-m4-statememory-regionmboxesmbox-namesethernet0ethernet1serial0serial1serial2no-mapgpiovin-supplystdout-path